bslathi19/super6502
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

Fix uart status multiple drivers

Browse Source
This commit is contained in:
Byron Lathi
2023-09-27 23:02:53 -07:00
parent 4d0abbb508
commit 4925354f53
1 changed files with 19 additions and 16 deletions
Download Patch File Download Diff File Expand all files Collapse all files

33
hw/efinix_fpga/src/uart_wrapper.sv
View File

@@ -48,30 +48,33 @@ always_ff @(posedge clk_50) begin
if (reset) begin
state <= READY;
irqb <= '1;
status <= '0;
end else begin
state <= next_state;
end
end
always_ff @(negedge clk) begin
status[1] <= tx_busy | tx_en;
if (reset) begin
status <= '0;
end else begin
status[1] <= tx_busy | tx_en;
status[0] <= status[0] | rx_data_valid;
if (cs & ~addr & rwb) begin
status[0] <= 0;
end
status[0] <= status[0] | rx_data_valid;
if (cs & ~addr & rwb) begin
status[0] <= 0;
end
if (cs & ~rwb) begin
case (addr)
1'b0: begin
tx_data <= i_data;
end
if (cs & ~rwb) begin
case (addr)
1'b0: begin
tx_data <= i_data;
end
1'b1: begin
control <= i_data;
end
endcase
1'b1: begin
control <= i_data;
end
endcase
end
end
end