From 4fb73f8e9746a8b41a322b8981f55b524c65e767 Mon Sep 17 00:00:00 2001 From: Byron Lathi Date: Mon, 14 Mar 2022 10:56:10 -0500 Subject: [PATCH] Update cs_testbench.sv Add uart_cs and fix error messages --- hw/fpga/hvl/cs_testbench.sv | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/hw/fpga/hvl/cs_testbench.sv b/hw/fpga/hvl/cs_testbench.sv index b552abb..b764c0f 100644 --- a/hw/fpga/hvl/cs_testbench.sv +++ b/hw/fpga/hvl/cs_testbench.sv @@ -8,8 +8,9 @@ logic [15:0] addr; logic ram_cs; logic rom_cs; logic hex_cs; +logic uart_cs; -int cs_count = ram_cs + rom_cs + hex_cs; +int cs_count = ram_cs + rom_cs + hex_cs + uart_cs; addr_decode dut(.*); @@ -29,7 +30,12 @@ initial begin : TEST_VECTORS if (i >= 16'h7ff0 && i < 16'h7ff4) begin assert(hex_cs == '1) else - $error("Bad CS! addr=%4x should have io_cs!", addr); + $error("Bad CS! addr=%4x should have hex_cs!", addr); + end + if (i >= 16'h7ff4 && i < 16'6) begin + assert(uart_cs == '1) + else + $error("Bad CS! addr=%4x should have uart_cs!", addr); end if (i >= 2**15) begin assert(rom_cs == '1)