Add uart2 test program

Reads input from uart and then writes it back out again immediately.
2023-01-12 14:05:13 -06:00
parent d5bccd46e3
commit 519cd19739
7 changed files with 53 additions and 23 deletions
--- a/hw/efinix_fpga/test_programs/Makefile
+++ b/hw/efinix_fpga/test_programs/Makefile
@@ -1,4 +1,4 @@
-TARGETS=stacktest runram timer timer_irq multiplier divider uart
+TARGETS=stacktest runram timer timer_irq multiplier divider uart uart2
 SRC=$(wildcard *.s)
 DIR=../ip/bram