diff --git a/hw/efinix_fpga/simulation/Makefile b/hw/efinix_fpga/simulation/Makefile
index 10a0f01..e59b38c 100644
--- a/hw/efinix_fpga/simulation/Makefile
+++ b/hw/efinix_fpga/simulation/Makefile
@@ -24,7 +24,12 @@ all: sim
 sim: $(TARGET)
 	vvp $(TARGET) -fst
 
-$(TARGET): $(SD_IMAGE) $(INIT_MEM) $(SRCS)
+.PHONY: full_sim
+full_sim: $(TARGET) $(SD_IMAGE)
+	vvp $(TARGET) -fst
+
+
+$(TARGET): $(INIT_MEM) $(SRCS)
 	iverilog -g2005-sv $(FLAGS) -s $(TOP_MODULE) -o $(TARGET) $(INC) $(SRCS)
 
 $(INIT_MEM):