bslathi19/super6502
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

Get SD card working in SPI

Browse Source
This commit is contained in:
Byron Lathi
2023-07-23 14:55:14 -07:00
parent 6a1a76db35
commit 5ca5fca29b
23 changed files with 1257 additions and 1931 deletions
Download Patch File Download Diff File Expand all files Collapse all files

BIN
hw/efinix_fpga/ip/uart/ipm/component.pickle
View File

Binary file not shown.

BIN
hw/efinix_fpga/ip/uart/ipm/graph.pickle
View File

Binary file not shown.

23
hw/efinix_fpga/ip/uart/settings.json
View File

@@ -19,31 +19,16 @@
"ENABLE_PARITY": "1'b0",
"FIX_BAUDRATE": "1'b1",
"PARITY_MODE": "1'b0",
"BOOTUP_CHECK": "1'b1"
"BOOTUP_CHECK": "1'b0"
},
"output": {
"external_source_source": [
"/home/byron/Projects/super6502/hw/efinix_fpga/ip/uart/uart_define.vh",
"/home/byron/Projects/super6502/hw/efinix_fpga/ip/uart/uart_tmpl.v",
"/home/byron/Projects/super6502/hw/efinix_fpga/ip/uart/uart.v",
"/home/byron/Projects/super6502/hw/efinix_fpga/ip/uart/uart_tmpl.vhd"
],
"external_example_example": [
"/home/byron/Projects/super6502/hw/efinix_fpga/ip/uart/T20F256_devkit/command_state.v",
"/home/byron/Projects/super6502/hw/efinix_fpga/ip/uart/T20F256_devkit/decoder.v",
"/home/byron/Projects/super6502/hw/efinix_fpga/ip/uart/T20F256_devkit/encoder.v",
"/home/byron/Projects/super6502/hw/efinix_fpga/ip/uart/T20F256_devkit/led_ctl.v",
"/home/byron/Projects/super6502/hw/efinix_fpga/ip/uart/T20F256_devkit/resets.v",
"/home/byron/Projects/super6502/hw/efinix_fpga/ip/uart/T20F256_devkit/uart_defines.v",
"/home/byron/Projects/super6502/hw/efinix_fpga/ip/uart/T20F256_devkit/uart_demo_top.v",
"/home/byron/Projects/super6502/hw/efinix_fpga/ip/uart/T20F256_devkit/user_register.v",
"/home/byron/Projects/super6502/hw/efinix_fpga/ip/uart/T20F256_devkit/uart_demo.peri.xml",
"/home/byron/Projects/super6502/hw/efinix_fpga/ip/uart/T20F256_devkit/uart_demo.xml",
"/home/byron/Projects/super6502/hw/efinix_fpga/ip/uart/T20F256_devkit/uart_timing_T20.sdc",
"/home/byron/Projects/super6502/hw/efinix_fpga/ip/uart/T20F256_devkit/uart.v",
"/home/byron/Projects/super6502/hw/efinix_fpga/ip/uart/T20F256_devkit/uart_define.vh"
"/home/byron/Projects/super6502/hw/efinix_fpga/ip/uart/uart_tmpl.vhd",
"/home/byron/Projects/super6502/hw/efinix_fpga/ip/uart/uart_define.vh"
]
},
"sw_version": "2023.1.150",
"generated_date": "2023-07-16T20:20:12.259229"
"generated_date": "2023-07-23T03:23:04.338270"
}

4
hw/efinix_fpga/ip/uart/uart.v
View File

@@ -43,7 +43,7 @@
//
////////////////////////////////////////////////////////////////////////////////
`define IP_UUID _d1961caf8b8d4ca092806671a99095c2
`define IP_UUID _8d7ceb45e0e64e208e634a02f6a59365
`define IP_NAME_CONCAT(a,b) a``b
`define IP_MODULE_NAME(name) `IP_NAME_CONCAT(name,`IP_UUID)
module uart (
@@ -69,7 +69,7 @@ input [7:0] tx_data
.ENABLE_PARITY (1'b0),
.FIX_BAUDRATE (1'b1),
.PARITY_MODE (1'b0),
.BOOTUP_CHECK (1'b1)
.BOOTUP_CHECK (1'b0)
) u_top_uart(
.tx_o ( tx_o ),
.rx_i ( rx_i ),

2
hw/efinix_fpga/ip/uart/uart_define.vh
View File

@@ -49,4 +49,4 @@ localparam BAUD = 115200;
localparam ENABLE_PARITY = 1'b0;
localparam FIX_BAUDRATE = 1'b1;
localparam PARITY_MODE = 1'b0;
localparam BOOTUP_CHECK = 1'b1;
localparam BOOTUP_CHECK = 1'b0;