From 5e8d91be53fc3fd60a8cee21521e5e3f8a3c5a7a Mon Sep 17 00:00:00 2001 From: Byron Lathi Date: Sun, 13 Oct 2024 19:50:02 -0700 Subject: [PATCH] Remove inferred latches --- hw/super6502_fpga/src/sub/my-fifos | 2 +- .../src/sub/network_processor/src/tcp.sv | 2 ++ .../network_processor/src/tcp_dest_decap.sv | 9 +++++++ .../src/tcp_packet_generator.sv | 24 ++++++++++++++++++- .../sub/network_processor/src/tcp_parser.sv | 7 ++++++ .../sub/network_processor/src/tcp_rx_ctrl.sv | 5 ++++ .../sub/network_processor/src/tcp_tx_ctrl.sv | 6 +++-- hw/super6502_fpga/src/sub/stream_dmas | 2 +- hw/super6502_fpga/super6502_fpga.xml | 2 +- 9 files changed, 53 insertions(+), 6 deletions(-) diff --git a/hw/super6502_fpga/src/sub/my-fifos b/hw/super6502_fpga/src/sub/my-fifos index a19156c..8d960ab 160000 --- a/hw/super6502_fpga/src/sub/my-fifos +++ b/hw/super6502_fpga/src/sub/my-fifos @@ -1 +1 @@ -Subproject commit a19156c9cd559faa020ea7223a9995e68b41f8c2 +Subproject commit 8d960ab4bfa1a49a00594d7ee89c4d874ccd55cc diff --git a/hw/super6502_fpga/src/sub/network_processor/src/tcp.sv b/hw/super6502_fpga/src/sub/network_processor/src/tcp.sv index 6843df1..1745cb9 100644 --- a/hw/super6502_fpga/src/sub/network_processor/src/tcp.sv +++ b/hw/super6502_fpga/src/sub/network_processor/src/tcp.sv @@ -205,6 +205,8 @@ logic [$clog2(NUM_TCP)-1:0] tcp_demux_sel; logic [15:0] tcp_dests [NUM_TCP]; always_comb begin : TCP_DEST_SEL + tcp_demux_sel = '0; + for (int i = 0; i < NUM_TCP; i++) begin if (tcp_dest == tcp_dests[i]) begin tcp_demux_sel = i; diff --git a/hw/super6502_fpga/src/sub/network_processor/src/tcp_dest_decap.sv b/hw/super6502_fpga/src/sub/network_processor/src/tcp_dest_decap.sv index 0ec4796..d6f6147 100644 --- a/hw/super6502_fpga/src/sub/network_processor/src/tcp_dest_decap.sv +++ b/hw/super6502_fpga/src/sub/network_processor/src/tcp_dest_decap.sv @@ -100,6 +100,15 @@ always_comb begin s_ip.ip_payload_axis_tready = '0; + valid = '0; + + m_ip.ip_payload_axis_tdata = '0; + m_ip.ip_payload_axis_tvalid = '0; + m_ip.ip_payload_axis_tlast = '0; + m_ip.ip_payload_axis_tuser = '0; + m_ip.ip_payload_axis_tid = '0; + m_ip.ip_payload_axis_tdest = '0; + case (state) PORTS: begin s_ip.ip_payload_axis_tready = 1; diff --git a/hw/super6502_fpga/src/sub/network_processor/src/tcp_packet_generator.sv b/hw/super6502_fpga/src/sub/network_processor/src/tcp_packet_generator.sv index cd301ce..da36efe 100644 --- a/hw/super6502_fpga/src/sub/network_processor/src/tcp_packet_generator.sv +++ b/hw/super6502_fpga/src/sub/network_processor/src/tcp_packet_generator.sv @@ -92,9 +92,31 @@ always_ff @(posedge i_clk) begin end always_comb begin + state_next = state; + m_ip.ip_hdr_valid = '0; + m_ip.ip_dscp = '0; + m_ip.ip_ecn = '0; + m_ip.ip_length = '0; + m_ip.ip_ttl = '0; + m_ip.ip_protocol = '0; + m_ip.ip_source_ip = '0; + m_ip.ip_dest_ip = '0; + + m_ip.ip_payload_axis_tdata = '0; m_ip.ip_payload_axis_tvalid = '0; - m_ip.ip_payload_axis_tlast = '0; + m_ip.ip_payload_axis_tlast = '0; + m_ip.ip_payload_axis_tuser = '0; + m_ip.ip_payload_axis_tid = '0; + m_ip.ip_payload_axis_tdest = '0; + + post_checksum_data.tready = '0; + + checksum_counter_next = checksum_counter; + checksum_data = '0; + + counter_next = counter; + o_packet_done = '0; checksum_clear = '0; checksum_enable = '0; diff --git a/hw/super6502_fpga/src/sub/network_processor/src/tcp_parser.sv b/hw/super6502_fpga/src/sub/network_processor/src/tcp_parser.sv index feb98b2..cd368da 100644 --- a/hw/super6502_fpga/src/sub/network_processor/src/tcp_parser.sv +++ b/hw/super6502_fpga/src/sub/network_processor/src/tcp_parser.sv @@ -66,6 +66,13 @@ always_comb begin checksum_next = checksum; hdr_valid = '0; + counter_next = counter; + + state_next = state; + + s_ip.ip_hdr_ready = '0; + s_ip.ip_payload_axis_tready = '0; + case (state) HEADER: begin s_ip.ip_hdr_ready = '1; diff --git a/hw/super6502_fpga/src/sub/network_processor/src/tcp_rx_ctrl.sv b/hw/super6502_fpga/src/sub/network_processor/src/tcp_rx_ctrl.sv index 8417779..767acbb 100644 --- a/hw/super6502_fpga/src/sub/network_processor/src/tcp_rx_ctrl.sv +++ b/hw/super6502_fpga/src/sub/network_processor/src/tcp_rx_ctrl.sv @@ -38,6 +38,11 @@ always_ff @(posedge i_clk) begin end always_comb begin + rx_msg_next = RX_MSG_NOP; + rx_msg_valid_next = '0; + + ack_num_next = ack_num; + if (i_hdr_valid) begin if (i_flags == 8'h12) begin rx_msg_next = RX_MSG_RECV_SYNACK; diff --git a/hw/super6502_fpga/src/sub/network_processor/src/tcp_tx_ctrl.sv b/hw/super6502_fpga/src/sub/network_processor/src/tcp_tx_ctrl.sv index b5e54c1..752d3cb 100644 --- a/hw/super6502_fpga/src/sub/network_processor/src/tcp_tx_ctrl.sv +++ b/hw/super6502_fpga/src/sub/network_processor/src/tcp_tx_ctrl.sv @@ -25,8 +25,8 @@ module tcp_tx_ctrl( ); axis_pipeline_register_wrapper u_m2s_reg ( - .clk(clk), - .rst(rst), + .clk(i_clk), + .rst(i_rst), .s_axis(s_axis), .m_axis(m_axis) @@ -60,6 +60,8 @@ always_comb begin state_next = state; o_no_data = '0; + o_tx_ctrl_ack = '0; + o_ack_number = '0; o_flags = '0; o_window_size = 16'h100; diff --git a/hw/super6502_fpga/src/sub/stream_dmas b/hw/super6502_fpga/src/sub/stream_dmas index 92ef12a..cbd06e5 160000 --- a/hw/super6502_fpga/src/sub/stream_dmas +++ b/hw/super6502_fpga/src/sub/stream_dmas @@ -1 +1 @@ -Subproject commit 92ef12aed9a11bb4418fe20646eb819d4ce0aacf +Subproject commit cbd06e5af4f80b6dadf12395f521d83ca85b4aae diff --git a/hw/super6502_fpga/super6502_fpga.xml b/hw/super6502_fpga/super6502_fpga.xml index f8437ea..730db5d 100644 --- a/hw/super6502_fpga/super6502_fpga.xml +++ b/hw/super6502_fpga/super6502_fpga.xml @@ -1,5 +1,5 @@ - +