From 642dfcbeb185aa89b71a77032e56016667743168 Mon Sep 17 00:00:00 2001
From: Byron Lathi <bslathi19@gmail.com>
Date: Thu, 29 Dec 2022 11:51:07 -0500
Subject: [PATCH] change to asynchronous read

---
 hw/efinix_fpga/leds.sv | 11 +++--------
 1 file changed, 3 insertions(+), 8 deletions(-)

diff --git a/hw/efinix_fpga/leds.sv b/hw/efinix_fpga/leds.sv
index 06fd580..385614d 100644
--- a/hw/efinix_fpga/leds.sv
+++ b/hw/efinix_fpga/leds.sv
@@ -9,19 +9,14 @@ module leds
     output logic [7:0] o_leds
 );
 
-logic re, we;
-assign re = rwb & cs;
-assign we = ~rwb & cs;
-
 logic [7:0] _data;
 
 assign o_leds = ~_data;
 
+assign o_data = _data;
+
 always @(negedge clk) begin
-    if (re) begin
-        o_data <= _data;
-    end 
-    else if (we) begin
+    if (~rwb & cs) begin
         _data <= i_data;
     end
 end