From 69e443d22352151f3ce82e6848f1915edc2cefbd Mon Sep 17 00:00:00 2001 From: Byron Lathi Date: Wed, 18 Oct 2023 08:54:23 -0700 Subject: [PATCH] Add mapped address output and test --- hw/efinix_fpga/simulation/tbs/mapper_tb.sv | 13 +++++++++++++ hw/efinix_fpga/src/mapper.sv | 8 ++++++++ 2 files changed, 21 insertions(+) diff --git a/hw/efinix_fpga/simulation/tbs/mapper_tb.sv b/hw/efinix_fpga/simulation/tbs/mapper_tb.sv index 0f82882..f413529 100644 --- a/hw/efinix_fpga/simulation/tbs/mapper_tb.sv +++ b/hw/efinix_fpga/simulation/tbs/mapper_tb.sv @@ -63,6 +63,8 @@ int errors; int rnd_values [16]; +int rnd_addr; + initial begin for (int i = 0; i < 16; i++) begin rnd_values[i] = $urandom(); @@ -95,6 +97,17 @@ initial begin end end + for (int i = 0; i < 16; i++) begin + rnd_addr = $urandom(); + addr = i << 12 | rnd_addr[11:0]; + #1 // Neccesary for this assertion to work + assert (map_addr == {rnd_values[i][12:0], rnd_addr[11:0]}) else begin + $error("Expected %x got %x", {rnd_values[i][12:0], rnd_addr[11:0]}, map_addr); + end + + @(posedge r_clk_cpu); + end + if (errors != 0) begin $finish_and_return(-1); end else begin diff --git a/hw/efinix_fpga/src/mapper.sv b/hw/efinix_fpga/src/mapper.sv index 83f7a07..8197032 100644 --- a/hw/efinix_fpga/src/mapper.sv +++ b/hw/efinix_fpga/src/mapper.sv @@ -13,12 +13,20 @@ logic [15:0] mm [16]; logic [31:0] we; + +// TODO These have basically the same name. logic [15:0] mm_sel; +logic [15:0] selected_mm; + always_comb begin we = (i_we << i_cpu_addr[4:0]); + mm_sel = (1 << i_cpu_addr[4:1]); o_data = mm_sel[8*i_cpu_addr[0] +: 8]; + + selected_mm = mm[i_cpu_addr[15:12]]; + o_mapped_addr = {selected_mm[12:0], i_cpu_addr[11:0]}; end always_ff @(negedge i_clk or posedge i_reset) begin