Increase TCP count to 2
After removing all the inferred latches, we have enough space to have 2 TCP streams instead of just 1. Also we have way more timing slack. Lesson learned, inferred latches are *really* bad and you should remove them first before anything else.
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@@ -526,7 +526,7 @@ logic network_processor_reset;
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always_ff @(posedge i_sysclk) network_processor_reset <= ~master_resetn;
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always_ff @(posedge i_sysclk) network_processor_reset <= ~master_resetn;
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network_processor #(
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network_processor #(
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.NUM_TCP(1)
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.NUM_TCP(2)
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) u_network_processor (
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) u_network_processor (
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.i_clk (i_sysclk),
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.i_clk (i_sysclk),
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.i_rst (network_processor_reset),
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.i_rst (network_processor_reset),
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@@ -1,5 +1,5 @@
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<?xml version="1.0" encoding="UTF-8"?>
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<?xml version="1.0" encoding="UTF-8"?>
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<efx:project name="super6502_fpga" description="" last_change="1728874118" sw_version="2024.1.163" last_run_state="pass" last_run_flow="bitstream" config_result_in_sync="sync" design_ood="sync" place_ood="sync" route_ood="sync" xmlns:efx="http://www.efinixinc.com/enf_proj" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.efinixinc.com/enf_proj enf_proj.xsd">
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<efx:project name="super6502_fpga" description="" last_change="1728874681" sw_version="2024.1.163" last_run_state="pass" last_run_flow="bitstream" config_result_in_sync="sync" design_ood="sync" place_ood="sync" route_ood="sync" xmlns:efx="http://www.efinixinc.com/enf_proj" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.efinixinc.com/enf_proj enf_proj.xsd">
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<efx:device_info>
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<efx:device_info>
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<efx:family name="Trion"/>
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<efx:family name="Trion"/>
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<efx:device name="T20F256"/>
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<efx:device name="T20F256"/>
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