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Add basic m2s code

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Byron Lathi
2024-08-20 19:01:37 -07:00
parent 9030f4b71d
commit 6f8e976a08
3 changed files with 3 additions and 2 deletions
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3
hw/super6502_fpga/sources.list
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@@ -5,4 +5,5 @@ src/sub/network_processor/sources.list
src/sub/rtl-common/sources.list src/sub/rtl-common/sources.list
src/sub/sd_controller_wrapper/sources.list src/sub/sd_controller_wrapper/sources.list
src/sub/wb2axip/sources.list src/sub/wb2axip/sources.list
src/sub/verilog-ethernet/sources.list src/sub/verilog-ethernet/sources.list
src/sub/stream_dmas/sources.list

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hw/super6502_fpga/src/sub/network_processor/src/m2s_dma.sv
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2
hw/super6502_fpga/src/sub/stream_dmas

Submodule hw/super6502_fpga/src/sub/stream_dmas updated: bc059c4327...e65b6c607f