From 7682dffe3c95837c93e199971c88214df28376a8 Mon Sep 17 00:00:00 2001 From: Byron Lathi Date: Thu, 12 Jan 2023 21:45:13 -0600 Subject: [PATCH] Change test program to use correct args Seems to work, when you run the test program it resets the card and sends the voltage and test pattern, and it does receive a response from the card. --- hw/efinix_fpga/debug_profile.wizard.json | 114 ++++++++++++--------- hw/efinix_fpga/ip/bram/bram_ini.vh | 38 +++---- hw/efinix_fpga/ip/bram/init_hex.mem | 122 +++++++++++------------ hw/efinix_fpga/super6502.xml | 2 +- hw/efinix_fpga/test_programs/sdcard.s | 52 +++++----- 5 files changed, 172 insertions(+), 156 deletions(-) diff --git a/hw/efinix_fpga/debug_profile.wizard.json b/hw/efinix_fpga/debug_profile.wizard.json index 5d55d9a..209e41f 100644 --- a/hw/efinix_fpga/debug_profile.wizard.json +++ b/hw/efinix_fpga/debug_profile.wizard.json @@ -3,7 +3,7 @@ { "name": "la0", "type": "la", - "uuid": "cb44f83ddf674d66b2dd550675cad77d", + "uuid": "0b8b4dbc24484e29a3931c7539b99820", "trigin_en": false, "trigout_en": false, "auto_inserted": true, @@ -11,26 +11,11 @@ "data_depth": 1024, "input_pipeline": 1, "probes": [ - { - "name": "sd_data_OUT", - "width": 1, - "probe_type": 1 - }, { "name": "sd_cmd_IN", "width": 1, "probe_type": 1 }, - { - "name": "sd_data_OE", - "width": 1, - "probe_type": 1 - }, - { - "name": "sd_data_IN", - "width": 1, - "probe_type": 1 - }, { "name": "sd_cmd_OE", "width": 1, @@ -41,10 +26,30 @@ "width": 1, "probe_type": 1 }, + { + "name": "sd_data_IN", + "width": 1, + "probe_type": 1 + }, + { + "name": "sd_data_OE", + "width": 1, + "probe_type": 1 + }, + { + "name": "sd_data_OUT", + "width": 1, + "probe_type": 1 + }, { "name": "w_sdcard_cs", "width": 1, "probe_type": 1 + }, + { + "name": "sd_clk", + "width": 1, + "probe_type": 1 } ] } @@ -177,17 +182,17 @@ }, { "name": "la0_probe0", - "net": "sd_data_OUT", - "path": [] - }, - { - "name": "la0_probe1", "net": "sd_cmd_IN", "path": [] }, + { + "name": "la0_probe1", + "net": "sd_cmd_OE", + "path": [] + }, { "name": "la0_probe2", - "net": "sd_data_OE", + "net": "sd_cmd_OUT", "path": [] }, { @@ -197,18 +202,23 @@ }, { "name": "la0_probe4", - "net": "sd_cmd_OE", + "net": "sd_data_OE", "path": [] }, { "name": "la0_probe5", - "net": "sd_cmd_OUT", + "net": "sd_data_OUT", "path": [] }, { "name": "la0_probe6", "net": "w_sdcard_cs", "path": [] + }, + { + "name": "la0_probe7", + "net": "sd_clk", + "path": [] } ] } @@ -225,14 +235,6 @@ "data_depth": 1024, "capture_control": false, "selected_nets": [ - { - "name": "sd_data_OUT", - "width": 1, - "clk_domain": "clk_2", - "selected_probe_type": "DATA AND TRIGGER", - "child": [], - "path": [] - }, { "name": "sd_cmd_IN", "width": 1, @@ -241,22 +243,6 @@ "child": [], "path": [] }, - { - "name": "sd_data_OE", - "width": 1, - "clk_domain": "clk_2", - "selected_probe_type": "DATA AND TRIGGER", - "child": [], - "path": [] - }, - { - "name": "sd_data_IN", - "width": 1, - "clk_domain": "clk_2", - "selected_probe_type": "DATA AND TRIGGER", - "child": [], - "path": [] - }, { "name": "sd_cmd_OE", "width": 1, @@ -273,6 +259,30 @@ "child": [], "path": [] }, + { + "name": "sd_data_IN", + "width": 1, + "clk_domain": "clk_2", + "selected_probe_type": "DATA AND TRIGGER", + "child": [], + "path": [] + }, + { + "name": "sd_data_OE", + "width": 1, + "clk_domain": "clk_2", + "selected_probe_type": "DATA AND TRIGGER", + "child": [], + "path": [] + }, + { + "name": "sd_data_OUT", + "width": 1, + "clk_domain": "clk_2", + "selected_probe_type": "DATA AND TRIGGER", + "child": [], + "path": [] + }, { "name": "w_sdcard_cs", "width": 1, @@ -280,6 +290,14 @@ "selected_probe_type": "DATA AND TRIGGER", "child": [], "path": [] + }, + { + "name": "sd_clk", + "width": 1, + "clk_domain": "clk_2", + "selected_probe_type": "DATA AND TRIGGER", + "child": [], + "path": [] } ], "top_module": "super6502", diff --git a/hw/efinix_fpga/ip/bram/bram_ini.vh b/hw/efinix_fpga/ip/bram/bram_ini.vh index 31553a5..2eadece 100644 --- a/hw/efinix_fpga/ip/bram/bram_ini.vh +++ b/hw/efinix_fpga/ip/bram/bram_ini.vh @@ -4,25 +4,25 @@ input integer index;//Mode type input integer val_; //Port A index, Port B Index, Number of Items in Loop, Port A Start, Port B Start, reserved case (index) 0: bram_ini_table= -(val_== 0)?256'h001000085000aa000a9000ea000ff0002b0002000000000a9000ff0002200020: -(val_== 1)?256'h07b0002000000000a200010000a9000ff0002b0002000008000a900011000e60: -(val_== 2)?256'h6400011000640001000064000fd00080000cb000ea000f000010000a5000ff00: -(val_== 3)?256'h90008e000ef000d80008d000ff000d3000200004800060000130006400012000: -(val_== 4)?256'h00068000ef000db0008d00003000a5000ef000da0008d00002000a5000ef000d: -(val_== 5)?256'h0029000ef000dc000ad000090008600008000850005a00060000ef000dc0008d: -(val_== 6)?256'h0ef000d9000ad000080009100000000a0000ef000d8000ad000f9000f0000010: -(val_== 7)?256'hc8000ef000db000ad0000800091000c8000ef000da000ad0000800091000c800: -(val_== 8)?256'hc000ad000480006000000000a2000ef000dd000ad000600007a0000800091000: -(val_== 9)?256'h000090008600008000850005a0006000068000f9000f00000200029000ef000d: -(val_==10)?256'h00c80000800091000c80000800091000c8000080009100000000a000000000a9: -(val_==11)?256'h0f00000100029000ef000dc000ad00026000f00008800009000a000008000910: -(val_==12)?256'h91000c8000ef000d9000ad000080009100000000a0000ef000d8000ad000f600: -(val_==13)?256'h800091000c8000ef000db000ad0000800091000c8000ef000da000ad00008000: -(val_==14)?256'h00060000ff000a2000ff000a90007a0006000000000a200000000a90007a0000: -(val_==15)?256'h006800001000e6000020009000000000850000000065000980001800048000c8: -(val_==16)?256'h088000030008500000000b100003000a0000ff000c10004c00004000a0000600: -(val_==17)?256'hce0004c00000000b100088000aa00000000b100088000020008500000000b100: -(val_==18)?256'h00000000000000000000000000000000000000000000000000000000000ff000: +(val_== 0)?256'h00d00003a00018000a9000ea000ff000300002000000000a9000ff0002700020: +(val_== 1)?256'h0a9000ff000300002000008000a900011000e60001000085000aa000a9000fd0: +(val_== 2)?256'hfd00080000cb000ea000f000010000a5000ff000800002000000000a20001000: +(val_== 3)?256'hd00010000a500048000600001300064000120006400011000640001000064000: +(val_== 4)?256'h000ef000da0008d00012000a5000ef000d90008d00011000a5000ef000d80008: +(val_== 5)?256'h0008000850005a00060000ef000dc0008d00068000ef000db0008d00013000a5: +(val_== 6)?256'h091000c80000800091000c8000080009100000000a000000000a900009000860: +(val_== 7)?256'hd8000ad000f9000f00000100029000ef000dc000ad0000800091000c80000800: +(val_== 8)?256'ha000ad0000800091000c8000ef000d9000ad000080009100000000a0000ef000: +(val_== 9)?256'h000600007a0000800091000c8000ef000db000ad0000800091000c8000ef000d: +(val_==10)?256'h0091000c8000080009100000000a000000000a9000090008600008000850005a: +(val_==11)?256'h0ad00026000f00008800012000a00000800091000c80000800091000c8000080: +(val_==12)?256'h080009100000000a0000ef000d8000ad000f6000f00000100029000ef000dc00: +(val_==13)?256'hd0000800091000c8000ef000da000ad0000800091000c8000ef000d9000ad000: +(val_==14)?256'h0007a0006000000000a200000000a90007a0000800091000c8000ef000db000a: +(val_==15)?256'h00000000000000000000000000000000000000000060000ff000a2000ff000a9: +(val_==16)?256'h0000000000000000000000000000000000000000000000000000000000000000: +(val_==17)?256'h0000000000000000000000000000000000000000000000000000000000000000: +(val_==18)?256'h0000000000000000000000000000000000000000000000000000000000000000: (val_==19)?256'h000ff00000000ff00000000ff000000000000000000000000000000000000000: (val_==20)?256'h0000000000000000000000000000000000000000000000000000000000000000: (val_==21)?256'h0000000000000000000000000000000000000000000000000000000000000000: diff --git a/hw/efinix_fpga/ip/bram/init_hex.mem b/hw/efinix_fpga/ip/bram/init_hex.mem index 5083c1e..99f7af1 100644 --- a/hw/efinix_fpga/ip/bram/init_hex.mem +++ b/hw/efinix_fpga/ip/bram/init_hex.mem @@ -1,13 +1,18 @@ 20 -22 +27 ff a9 00 20 -2b +30 ff ea a9 +18 +3a +d0 +fd +a9 aa 85 10 @@ -16,14 +21,14 @@ e6 a9 08 20 -2b +30 ff a9 10 a2 00 20 -7b +80 ff a5 10 @@ -42,22 +47,23 @@ fd 13 60 48 -20 -d3 -ff +a5 +10 8d d8 ef -8e +a5 +11 +8d d9 ef a5 -02 +12 8d da ef a5 -03 +13 8d db ef @@ -71,6 +77,21 @@ ef 08 86 09 +a9 +00 +a0 +00 +91 +08 +c8 +91 +08 +c8 +91 +08 +c8 +91 +08 ad dc ef @@ -105,22 +126,6 @@ c8 08 7a 60 -ad -dd -ef -a2 -00 -60 -48 -ad -dc -ef -29 -02 -f0 -f9 -68 -60 5a 85 08 @@ -142,7 +147,7 @@ c8 91 08 a0 -09 +12 88 f0 26 @@ -190,46 +195,41 @@ ff a2 ff 60 -c8 -48 -18 -98 -65 00 -85 00 -90 -02 -e6 -01 -68 -60 -a0 -04 -4c -c1 -ff -a0 -03 -b1 00 -85 -03 -88 -b1 00 -85 -02 -88 -b1 00 -aa -88 -b1 00 -4c -ce -ff +00 +00 +00 +00 +00 +00 +00 +00 +00 +00 +00 +00 +00 +00 +00 +00 +00 +00 +00 +00 +00 +00 +00 +00 +00 +00 +00 +00 +00 00 00 00 diff --git a/hw/efinix_fpga/super6502.xml b/hw/efinix_fpga/super6502.xml index 4d38d40..f3a3f61 100644 --- a/hw/efinix_fpga/super6502.xml +++ b/hw/efinix_fpga/super6502.xml @@ -1,5 +1,5 @@ - + diff --git a/hw/efinix_fpga/test_programs/sdcard.s b/hw/efinix_fpga/test_programs/sdcard.s index 97bd17e..095b433 100644 --- a/hw/efinix_fpga/test_programs/sdcard.s +++ b/hw/efinix_fpga/test_programs/sdcard.s @@ -2,8 +2,6 @@ .export _sd_card_command .export _sd_card_resp -.export _sd_card_read_byte -.export _sd_card_wait_for_data .autoimport on @@ -24,6 +22,11 @@ main: jsr _sd_card_command nop ; no resp, so need to wait for cmd to finish + lda #$18 +@delay: dec + bne @delay + + @cmd8: lda #$aa sta tmp1 @@ -50,28 +53,36 @@ stztmp: rts ; Send sd card command. -; command is in A register, the args are on the stack -; I think the order is high byte first? +; command is in A register, the args are in tmp1-4 le _sd_card_command: - pha - - jsr popeax + pha ; store cmd + lda tmp1 ; write args sta SD_ARG - stx SD_ARG+1 - lda sreg + lda tmp2 + sta SD_ARG+1 + lda tmp3 sta SD_ARG+2 - lda sreg+1 + lda tmp4 sta SD_ARG+3 - - pla + pla ; write cmd sta SD_CMD rts + ; void sd_card_resp(uint32_t* resp); _sd_card_resp: phy sta ptr1 ; store pointer stx ptr1+1 + lda #$0 + ldy #$0 + sta (ptr1),y + iny + sta (ptr1),y + iny + sta (ptr1),y + iny + sta (ptr1),y @1: lda SD_CMD ; wait for status flag and #$01 beq @1 @@ -90,20 +101,7 @@ _sd_card_resp: ply rts -_sd_card_read_byte: - lda SD_DATA - ldx #$00 - rts - -_sd_card_wait_for_data: - pha -@1: lda SD_CMD ; wait for status flag - and #$02 - beq @1 - pla - rts - - + ; int sd_card_resp_timeout(uint32_t* resp); _sd_card_resp_timeout: phy @@ -118,7 +116,7 @@ _sd_card_resp_timeout: sta (ptr1),y iny sta (ptr1),y - ldy #$9 + ldy #$12 @1: dey beq @timeout lda SD_CMD ; wait for status flag