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remove sim submodule

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Byron Lathi
2023-09-23 09:59:09 -07:00
parent bc0ab7eb54
commit 77dd4f1002
5 changed files with 1 additions and 2819 deletions
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5
.gitmodules vendored
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@@ -1,6 +1,3 @@
[submodule "sw/cc65"]
path = sw/cc65
url = https://git.byronlathi.com/bslathi19/cc65
[submodule "hw/efinix_fpga/simulation/verilog-6502"]
path = hw/efinix_fpga/simulation/verilog-6502
url = https://git.byronlathi.com/bslathi19/verilog-6502
url = https://git.byronlathi.com/bslathi19/cc65