Use sram instead of sdram in sim, fully switch to verilator
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@@ -1,7 +1,10 @@
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FPGA_SRCS_LIST=../../sources.list
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SIM_SRCS_LIST=sources.list
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BAD_SOURCES_LIST=stubs.list
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SUPER6502_FPGA_SOURCES=$(shell rtl-manifest $(FPGA_SRCS_LIST))
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BAD_SOURCES=$(shell rtl-manifest $(BAD_SOURCES_LIST))
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GOOD_FPGA_SOURCES=$(filter-out $(BAD_SOURCES), $(SUPER6502_FPGA_SOURCES))
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SIM_SOURCES=$(shell cat $(SIM_SRCS_LIST))
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INCLUDE=include/sdram_controller_define.vh
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@@ -24,7 +27,7 @@ waves: $(TB_NAME)
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$(TB_NAME): $(SUPER6502_FPGA_SOURCES) $(SIM_SOURCES) $(COPY_FILES) $(SD_IMAGE)
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# $(IVERILOG) -g2005-sv $(FLAGS) -s $@ -o $@ $(INCLUDE) $(SUPER6502_FPGA_SOURCES) $(SIM_SOURCES) -I ../../
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verilator --binary $(FLAGS) $(INCLUDE) $(SUPER6502_FPGA_SOURCES) $(SIM_SOURCES) +incdir+../../ -Wno-BLKANDNBLK -Wno-fatal -j 16 --top sim_top --trace-fst -Wno-ASSIGNDLY
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verilator --binary $(FLAGS) $(INCLUDE) $(GOOD_FPGA_SOURCES) $(SIM_SOURCES) +incdir+../../ -Wno-BLKANDNBLK -Wno-fatal -j 16 --top sim_top --trace-fst -Wno-ASSIGNDLY
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$(SD_IMAGE):
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