From 8be97b45ae4b418bbc2c20516140bffa69443d90 Mon Sep 17 00:00:00 2001 From: Byron Lathi Date: Mon, 9 Sep 2024 22:59:59 -0700 Subject: [PATCH] Move to 4 TCP units for synthesis Otherwise it does not fit in the T20 --- hw/super6502_fpga/src/rtl/super_6502_fpga.sv | 38 +++++++++---------- .../src/regs/ntw_top_regfile.sv | 6 +-- .../src/regs/ntw_top_regfile_pkg.sv | 2 +- .../src/regs/tcp_top_regfile.sv | 26 ++++++------- .../src/regs/tcp_top_regfile_pkg.sv | 6 +-- .../src/regs/tcp_top_regs.rdl | 2 +- .../src/sub/network_processor/src/tcp.sv | 22 +++++------ hw/super6502_fpga/super6502_fpga.xml | 2 +- 8 files changed, 52 insertions(+), 52 deletions(-) diff --git a/hw/super6502_fpga/src/rtl/super_6502_fpga.sv b/hw/super6502_fpga/src/rtl/super_6502_fpga.sv index 2c61004..f8dbc20 100644 --- a/hw/super6502_fpga/src/rtl/super_6502_fpga.sv +++ b/hw/super6502_fpga/src/rtl/super_6502_fpga.sv @@ -260,7 +260,7 @@ cpu_wrapper u_cpu_wrapper_0( axilxbar #( - .NM(2), + .NM(3), .NS(5), .SLAVE_ADDR({ {32'h000001ff, 32'h00000000}, @@ -273,23 +273,23 @@ axilxbar #( .S_AXI_ACLK (i_sysclk), .S_AXI_ARESETN (master_resetn), - .S_AXI_ARADDR ({cpu0_ARADDR, sd_controller_dma_ARADDR }), - .S_AXI_ARVALID ({cpu0_ARVALID, sd_controller_dma_ARVALID }), - .S_AXI_ARREADY ({cpu0_ARREADY, sd_controller_dma_ARREADY }), - .S_AXI_RDATA ({cpu0_RDATA, sd_controller_dma_RDATA }), - .S_AXI_RRESP ({cpu0_RRESP, sd_controller_dma_RRESP }), - .S_AXI_RVALID ({cpu0_RVALID, sd_controller_dma_RVALID }), - .S_AXI_RREADY ({cpu0_RREADY, sd_controller_dma_RREADY }), - .S_AXI_AWADDR ({cpu0_AWADDR, sd_controller_dma_AWADDR }), - .S_AXI_AWREADY ({cpu0_AWREADY, sd_controller_dma_AWREADY }), - .S_AXI_AWVALID ({cpu0_AWVALID, sd_controller_dma_AWVALID }), - .S_AXI_WVALID ({cpu0_WVALID, sd_controller_dma_WVALID }), - .S_AXI_WREADY ({cpu0_WREADY, sd_controller_dma_WREADY }), - .S_AXI_WDATA ({cpu0_WDATA, sd_controller_dma_WDATA }), - .S_AXI_WSTRB ({cpu0_WSTRB, sd_controller_dma_WSTRB }), - .S_AXI_BRESP ({cpu0_BRESP, sd_controller_dma_BRESP }), - .S_AXI_BVALID ({cpu0_BVALID, sd_controller_dma_BVALID }), - .S_AXI_BREADY ({cpu0_BREADY, sd_controller_dma_BREADY }), + .S_AXI_ARADDR ({cpu0_ARADDR, sd_controller_dma_ARADDR, ntw_dma.araddr }), + .S_AXI_ARVALID ({cpu0_ARVALID, sd_controller_dma_ARVALID, ntw_dma.arvalid }), + .S_AXI_ARREADY ({cpu0_ARREADY, sd_controller_dma_ARREADY, ntw_dma.arready }), + .S_AXI_RDATA ({cpu0_RDATA, sd_controller_dma_RDATA, ntw_dma.rdata }), + .S_AXI_RRESP ({cpu0_RRESP, sd_controller_dma_RRESP, ntw_dma.rresp }), + .S_AXI_RVALID ({cpu0_RVALID, sd_controller_dma_RVALID, ntw_dma.rvalid }), + .S_AXI_RREADY ({cpu0_RREADY, sd_controller_dma_RREADY, ntw_dma.rready }), + .S_AXI_AWADDR ({cpu0_AWADDR, sd_controller_dma_AWADDR, ntw_dma.awaddr }), + .S_AXI_AWVALID ({cpu0_AWVALID, sd_controller_dma_AWVALID, ntw_dma.awvalid }), + .S_AXI_AWREADY ({cpu0_AWREADY, sd_controller_dma_AWREADY, ntw_dma.awready }), + .S_AXI_WVALID ({cpu0_WVALID, sd_controller_dma_WVALID, ntw_dma.wvalid }), + .S_AXI_WDATA ({cpu0_WDATA, sd_controller_dma_WDATA, ntw_dma.wdata }), + .S_AXI_WREADY ({cpu0_WREADY, sd_controller_dma_WREADY, ntw_dma.wready }), + .S_AXI_WSTRB ({cpu0_WSTRB, sd_controller_dma_WSTRB, ntw_dma.wstrb }), + .S_AXI_BRESP ({cpu0_BRESP, sd_controller_dma_BRESP, ntw_dma.bresp }), + .S_AXI_BVALID ({cpu0_BVALID, sd_controller_dma_BVALID, ntw_dma.bvalid }), + .S_AXI_BREADY ({cpu0_BREADY, sd_controller_dma_BREADY, ntw_dma.bready }), .M_AXI_ARADDR ({ram_araddr, rom_araddr, sdram_ARADDR, sd_controller_ctrl_ARADDR, ntw_reg.araddr }), .M_AXI_ARVALID ({ram_arvalid, rom_arvalid, sdram_ARVALID, sd_controller_ctrl_ARVALID, ntw_reg.arvalid }), .M_AXI_ARREADY ({ram_arready, rom_arready, sdram_ARREADY, sd_controller_ctrl_ARREADY, ntw_reg.arready }), @@ -507,7 +507,7 @@ sd_controller_wrapper #( ); network_processor #( - .NUM_TCP(8) + .NUM_TCP(4) ) u_network_processor ( .i_clk (i_sysclk), .i_rst (~master_resetn), diff --git a/hw/super6502_fpga/src/sub/network_processor/src/regs/ntw_top_regfile.sv b/hw/super6502_fpga/src/sub/network_processor/src/regs/ntw_top_regfile.sv index b4eaf50..6dc267e 100644 --- a/hw/super6502_fpga/src/sub/network_processor/src/regs/ntw_top_regfile.sv +++ b/hw/super6502_fpga/src/sub/network_processor/src/regs/ntw_top_regfile.sv @@ -262,8 +262,8 @@ module ntw_top_regfile ( is_external = '0; decoded_reg_strb.mac = cpuif_req_masked & (cpuif_addr >= 10'h0) & (cpuif_addr <= 10'h0 + 10'h7); is_external |= cpuif_req_masked & (cpuif_addr >= 10'h0) & (cpuif_addr <= 10'h0 + 10'h7); - decoded_reg_strb.tcp_top = cpuif_req_masked & (cpuif_addr >= 10'h200) & (cpuif_addr <= 10'h200 + 10'h1ff); - is_external |= cpuif_req_masked & (cpuif_addr >= 10'h200) & (cpuif_addr <= 10'h200 + 10'h1ff); + decoded_reg_strb.tcp_top = cpuif_req_masked & (cpuif_addr >= 10'h200) & (cpuif_addr <= 10'h200 + 10'hff); + is_external |= cpuif_req_masked & (cpuif_addr >= 10'h200) & (cpuif_addr <= 10'h200 + 10'hff); decoded_strb_is_external = is_external; external_req = is_external; end @@ -289,7 +289,7 @@ module ntw_top_regfile ( assign hwif_out.mac.wr_data = decoded_wr_data; assign hwif_out.mac.wr_biten = decoded_wr_biten; assign hwif_out.tcp_top.req = decoded_reg_strb.tcp_top; - assign hwif_out.tcp_top.addr = decoded_addr[9:0]; + assign hwif_out.tcp_top.addr = decoded_addr[8:0]; assign hwif_out.tcp_top.req_is_wr = decoded_req_is_wr; assign hwif_out.tcp_top.wr_data = decoded_wr_data; assign hwif_out.tcp_top.wr_biten = decoded_wr_biten; diff --git a/hw/super6502_fpga/src/sub/network_processor/src/regs/ntw_top_regfile_pkg.sv b/hw/super6502_fpga/src/sub/network_processor/src/regs/ntw_top_regfile_pkg.sv index 1f5c4e1..f8939d2 100644 --- a/hw/super6502_fpga/src/sub/network_processor/src/regs/ntw_top_regfile_pkg.sv +++ b/hw/super6502_fpga/src/sub/network_processor/src/regs/ntw_top_regfile_pkg.sv @@ -33,7 +33,7 @@ package ntw_top_regfile_pkg; typedef struct { logic req; - logic [8:0] addr; + logic [7:0] addr; logic req_is_wr; logic [31:0] wr_data; logic [31:0] wr_biten; diff --git a/hw/super6502_fpga/src/sub/network_processor/src/regs/tcp_top_regfile.sv b/hw/super6502_fpga/src/sub/network_processor/src/regs/tcp_top_regfile.sv index 7134e46..4427758 100644 --- a/hw/super6502_fpga/src/sub/network_processor/src/regs/tcp_top_regfile.sv +++ b/hw/super6502_fpga/src/sub/network_processor/src/regs/tcp_top_regfile.sv @@ -7,7 +7,7 @@ module tcp_top_regfile ( input wire s_cpuif_req, input wire s_cpuif_req_is_wr, - input wire [8:0] s_cpuif_addr, + input wire [7:0] s_cpuif_addr, input wire [31:0] s_cpuif_wr_data, input wire [31:0] s_cpuif_wr_biten, output wire s_cpuif_req_stall_wr, @@ -27,7 +27,7 @@ module tcp_top_regfile ( //-------------------------------------------------------------------------- logic cpuif_req; logic cpuif_req_is_wr; - logic [8:0] cpuif_addr; + logic [7:0] cpuif_addr; logic [31:0] cpuif_wr_data; logic [31:0] cpuif_wr_biten; logic cpuif_req_stall_wr; @@ -83,12 +83,12 @@ module tcp_top_regfile ( // Address Decode //-------------------------------------------------------------------------- typedef struct { - logic tcp_streams[8]; + logic tcp_streams[4]; } decoded_reg_strb_t; decoded_reg_strb_t decoded_reg_strb; logic decoded_strb_is_external; - logic [8:0] decoded_addr; + logic [7:0] decoded_addr; logic decoded_req; logic decoded_req_is_wr; @@ -98,9 +98,9 @@ module tcp_top_regfile ( always_comb begin automatic logic is_external; is_external = '0; - for(int i0=0; i0<8; i0++) begin - decoded_reg_strb.tcp_streams[i0] = cpuif_req_masked & (cpuif_addr >= 9'h0 + i0*9'h40) & (cpuif_addr <= 9'h0 + i0*9'h40 + 9'h2f); - is_external |= cpuif_req_masked & (cpuif_addr >= 9'h0 + i0*9'h40) & (cpuif_addr <= 9'h0 + i0*9'h40 + 9'h2f); + for(int i0=0; i0<4; i0++) begin + decoded_reg_strb.tcp_streams[i0] = cpuif_req_masked & (cpuif_addr >= 8'h0 + i0*8'h40) & (cpuif_addr <= 8'h0 + i0*8'h40 + 8'h2f); + is_external |= cpuif_req_masked & (cpuif_addr >= 8'h0 + i0*8'h40) & (cpuif_addr <= 8'h0 + i0*8'h40 + 8'h2f); end decoded_strb_is_external = is_external; external_req = is_external; @@ -121,7 +121,7 @@ module tcp_top_regfile ( - for(genvar i0=0; i0<8; i0++) begin + for(genvar i0=0; i0<4; i0++) begin assign hwif_out.tcp_streams[i0].req = decoded_reg_strb.tcp_streams[i0]; assign hwif_out.tcp_streams[i0].addr = decoded_addr[5:0]; assign hwif_out.tcp_streams[i0].req_is_wr = decoded_req_is_wr; @@ -135,7 +135,7 @@ module tcp_top_regfile ( always_comb begin automatic logic wr_ack; wr_ack = '0; - for(int i0=0; i0<8; i0++) begin + for(int i0=0; i0<4; i0++) begin wr_ack |= hwif_in.tcp_streams[i0].wr_ack; end external_wr_ack = wr_ack; @@ -151,7 +151,7 @@ module tcp_top_regfile ( always_comb begin automatic logic rd_ack; rd_ack = '0; - for(int i0=0; i0<8; i0++) begin + for(int i0=0; i0<4; i0++) begin rd_ack |= hwif_in.tcp_streams[i0].rd_ack; end readback_external_rd_ack_c = rd_ack; @@ -166,8 +166,8 @@ module tcp_top_regfile ( logic [31:0] readback_data; // Assign readback values to a flattened array - logic [31:0] readback_array[8]; - for(genvar i0=0; i0<8; i0++) begin + logic [31:0] readback_array[4]; + for(genvar i0=0; i0<4; i0++) begin assign readback_array[i0*1 + 0] = hwif_in.tcp_streams[i0].rd_ack ? hwif_in.tcp_streams[i0].rd_data : '0; end @@ -177,7 +177,7 @@ module tcp_top_regfile ( readback_done = decoded_req & ~decoded_req_is_wr & ~decoded_strb_is_external; readback_err = '0; readback_data_var = '0; - for(int i=0; i<8; i++) readback_data_var |= readback_array[i]; + for(int i=0; i<4; i++) readback_data_var |= readback_array[i]; readback_data = readback_data_var; end diff --git a/hw/super6502_fpga/src/sub/network_processor/src/regs/tcp_top_regfile_pkg.sv b/hw/super6502_fpga/src/sub/network_processor/src/regs/tcp_top_regfile_pkg.sv index e8699fb..5c03621 100644 --- a/hw/super6502_fpga/src/sub/network_processor/src/regs/tcp_top_regfile_pkg.sv +++ b/hw/super6502_fpga/src/sub/network_processor/src/regs/tcp_top_regfile_pkg.sv @@ -4,7 +4,7 @@ package tcp_top_regfile_pkg; localparam TCP_TOP_REGFILE_DATA_WIDTH = 32; - localparam TCP_TOP_REGFILE_MIN_ADDR_WIDTH = 9; + localparam TCP_TOP_REGFILE_MIN_ADDR_WIDTH = 8; typedef struct { logic rd_ack; @@ -13,7 +13,7 @@ package tcp_top_regfile_pkg; } tcp_stream_regs__external__in_t; typedef struct { - tcp_stream_regs__external__in_t tcp_streams[8]; + tcp_stream_regs__external__in_t tcp_streams[4]; } tcp_top_regfile__in_t; typedef struct { @@ -25,6 +25,6 @@ package tcp_top_regfile_pkg; } tcp_stream_regs__external__out_t; typedef struct { - tcp_stream_regs__external__out_t tcp_streams[8]; + tcp_stream_regs__external__out_t tcp_streams[4]; } tcp_top_regfile__out_t; endpackage diff --git a/hw/super6502_fpga/src/sub/network_processor/src/regs/tcp_top_regs.rdl b/hw/super6502_fpga/src/sub/network_processor/src/regs/tcp_top_regs.rdl index a2c774a..e32e8f4 100644 --- a/hw/super6502_fpga/src/sub/network_processor/src/regs/tcp_top_regs.rdl +++ b/hw/super6502_fpga/src/sub/network_processor/src/regs/tcp_top_regs.rdl @@ -1,3 +1,3 @@ addrmap tcp_top_regfile{ - external tcp_stream_regs tcp_streams[8] += 0x40; + external tcp_stream_regs tcp_streams[4] += 0x40; }; \ No newline at end of file diff --git a/hw/super6502_fpga/src/sub/network_processor/src/tcp.sv b/hw/super6502_fpga/src/sub/network_processor/src/tcp.sv index 65e2b02..6843df1 100644 --- a/hw/super6502_fpga/src/sub/network_processor/src/tcp.sv +++ b/hw/super6502_fpga/src/sub/network_processor/src/tcp.sv @@ -124,17 +124,17 @@ axilxbar #( .S_AXI_RDATA ({xbar_s_m2s_axi_rdata, xbar_s_s2m_axi_rdata }), .S_AXI_RRESP ({xbar_s_m2s_axi_rresp, xbar_s_s2m_axi_rresp }), - .M_AXI_AWADDR (), - .M_AXI_AWPROT (), - .M_AXI_AWVALID (), - .M_AXI_AWREADY ('0), - .M_AXI_WDATA (), - .M_AXI_WSTRB (), - .M_AXI_WVALID (), - .M_AXI_WREADY ('0), - .M_AXI_BRESP ('0), - .M_AXI_BVALID ('0), - .M_AXI_BREADY (), + .M_AXI_AWADDR (m_dma_axil.awaddr), + .M_AXI_AWPROT (m_dma_axil.awprot), + .M_AXI_AWVALID (m_dma_axil.awvalid), + .M_AXI_AWREADY (m_dma_axil.awready), + .M_AXI_WDATA (m_dma_axil.wdata), + .M_AXI_WSTRB (m_dma_axil.wstrb), + .M_AXI_WVALID (m_dma_axil.wvalid), + .M_AXI_WREADY (m_dma_axil.wready), + .M_AXI_BRESP (m_dma_axil.bresp), + .M_AXI_BVALID (m_dma_axil.bvalid), + .M_AXI_BREADY (m_dma_axil.bready), .M_AXI_ARADDR (m_dma_axil.araddr), .M_AXI_ARPROT (m_dma_axil.arprot), diff --git a/hw/super6502_fpga/super6502_fpga.xml b/hw/super6502_fpga/super6502_fpga.xml index 8023c3f..b8447dc 100644 --- a/hw/super6502_fpga/super6502_fpga.xml +++ b/hw/super6502_fpga/super6502_fpga.xml @@ -1,4 +1,4 @@ - +