From 9b50dab855bc4e265c91003cb57f51bc1c551f8e Mon Sep 17 00:00:00 2001
From: Byron Lathi <bslathi19@gmail.com>
Date: Fri, 15 Mar 2024 21:02:53 -0700
Subject: [PATCH] Update submodules, update sources

---
 hw/super6502_fpga/src/sim/hvl/sim_top.sv          | 4 +++-
 hw/super6502_fpga/src/sim/sources.list            | 3 ++-
 hw/super6502_fpga/src/sim/sub/verilog-sd-emulator | 2 +-
 hw/super6502_fpga/src/sub/rtl-common              | 2 +-
 4 files changed, 7 insertions(+), 4 deletions(-)

diff --git a/hw/super6502_fpga/src/sim/hvl/sim_top.sv b/hw/super6502_fpga/src/sim/hvl/sim_top.sv
index e5da831..c8ba47e 100644
--- a/hw/super6502_fpga/src/sim/hvl/sim_top.sv
+++ b/hw/super6502_fpga/src/sim/hvl/sim_top.sv
@@ -168,7 +168,9 @@ sd_card_emu u_sd_card_emu(
     .clk(o_sd_clk),
     .rst(~button_reset),
     .i_cmd(o_sd_cmd),
-    .o_cmd(i_sd_cmd)
+    .o_cmd(i_sd_cmd),
+    .i_dat(o_sd_dat),
+    .o_dat(i_sd_dat)
 );
 
 initial begin
diff --git a/hw/super6502_fpga/src/sim/sources.list b/hw/super6502_fpga/src/sim/sources.list
index ecb3cfb..76909da 100644
--- a/hw/super6502_fpga/src/sim/sources.list
+++ b/hw/super6502_fpga/src/sim/sources.list
@@ -4,4 +4,5 @@ sub/verilog-6502/cpu_65c02.v
 sub/sim_sdram/generic_sdr.v
 sub/verilog-sd-emulator/src/sd_card_command.sv
 sub/verilog-sd-emulator/src/sd_card_emu.sv
-sub/verilog-sd-emulator/src/sd_card_state_controller.sv
\ No newline at end of file
+sub/verilog-sd-emulator/src/sd_card_state_controller.sv
+sub/verilog-sd-emulator/src/sd_card_data.sv
\ No newline at end of file
diff --git a/hw/super6502_fpga/src/sim/sub/verilog-sd-emulator b/hw/super6502_fpga/src/sim/sub/verilog-sd-emulator
index c64eff4..265c636 160000
--- a/hw/super6502_fpga/src/sim/sub/verilog-sd-emulator
+++ b/hw/super6502_fpga/src/sim/sub/verilog-sd-emulator
@@ -1 +1 @@
-Subproject commit c64eff4f3658ed1545c6f6942979c83c4c42493b
+Subproject commit 265c636c86076662e1b6405dd47a71a6077d51d0
diff --git a/hw/super6502_fpga/src/sub/rtl-common b/hw/super6502_fpga/src/sub/rtl-common
index 1417722..bdf655b 160000
--- a/hw/super6502_fpga/src/sub/rtl-common
+++ b/hw/super6502_fpga/src/sub/rtl-common
@@ -1 +1 @@
-Subproject commit 14177224f6726b67ff5743a3ae54d190be607826
+Subproject commit bdf655b77bfaddc832b1bdf748cb516b91446a48