From 9d26265bb50bee1db5f59ce2c12b32649a939819 Mon Sep 17 00:00:00 2001 From: Byron Lathi Date: Sun, 22 Oct 2023 16:45:41 -0700 Subject: [PATCH] Update to use new binary sd card image --- hw/efinix_fpga/simulation/Makefile | 6 +++--- hw/efinix_fpga/simulation/src/verilog-sd-emulator | 2 +- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/hw/efinix_fpga/simulation/Makefile b/hw/efinix_fpga/simulation/Makefile index a59949e..5b97507 100644 --- a/hw/efinix_fpga/simulation/Makefile +++ b/hw/efinix_fpga/simulation/Makefile @@ -9,16 +9,16 @@ TEST_PROGRAM_NAME?=loop_test TEST_FOLDER?=$(REPO_TOP)/sw/test_code/$(TEST_PROGRAM_NAME) TEST_PROGRAM?=$(REPO_TOP)/sw/test_code/$(TEST_PROGRAM_NAME)/$(TEST_PROGRAM_NAME).hex -SD_IMAGE_PATH?=$(REPO_TOP)/sw/script/fs.fat.hex - #TODO implement something like sources.list TOP_MODULE=sim_top TARGET=sim_top INIT_MEM=init_hex.mem -SD_IMAGE=sd_image.mem +SD_IMAGE=fs.fat FLAGS=-DSIM -DRTL_SIM +SD_IMAGE_PATH?=$(REPO_TOP)/sw/script/$(SD_IMAGE) + all: sim .PHONY: sim diff --git a/hw/efinix_fpga/simulation/src/verilog-sd-emulator b/hw/efinix_fpga/simulation/src/verilog-sd-emulator index 390b722..72a7868 160000 --- a/hw/efinix_fpga/simulation/src/verilog-sd-emulator +++ b/hw/efinix_fpga/simulation/src/verilog-sd-emulator @@ -1 +1 @@ -Subproject commit 390b7221dbcd176d3875d95f78ef84ccbd2ada1f +Subproject commit 72a7868fa926a8bdc612dddbcd1921aa75abe7c6