Merge branch '22-organize-project-better' into 'master'

Resolve "Organize Project Better"

Closes #22

See merge request bslathi19/super6502!22

hw/efinix_fpga/Makefile

@@ -0,0 +1,21 @@
+PROJECT=super6502
+BITSTREAM=outflow/$(PROJECT).bit
+
+SRCS=$(shell find src/ -type f -name "*.sv")
+
+all: $(BITSTREAM)
+
+$(BITSTREAM): $(PROJECT).peri.xml $(SRCS)
+	efx_run.py $(PROJECT).xml
+
+install: $(BITSTREAM)
+	efx_run.py $(PROJECT).xml --flow program --pgm_opts mode=jtag
+
+install_spi: $(BITSTREAM)
+	efx_run.py $(PROJECT).xml --flow program --pgm_opts
+
+clean:
+	rm -rf work_pnr
+	rm -rf work_syn
+	rm -rf work_pt
+	rm -rf outflow

hw/efinix_fpga/debug_profile.wizard.json

@@ -3,7 +3,7 @@
         {
             "name": "la0",
             "type": "la",
-            "uuid": "d9fdd9521e234ab2a085f0e0ef437289",
+            "uuid": "426fe3342997403e8dbac6dd07d86e1e",
             "trigin_en": false,
             "trigout_en": false,
             "auto_inserted": true,

hw/efinix_fpga/init_env.sh

@@ -0,0 +1,27 @@
+# # This stuff will install efinity per machine, per project.
+# # That would be a lot of wasted storage
+
+# ENV=".env/$HOSTNAME"
+
+# if [ ! -d "$ENV" ]; then
+#     mkdir -p "$ENV"
+# fi
+
+# if [ ! -f "$ENV/efinity-2023.1.150-rhe-x64.tar.bz2" ]; then
+#     scp 192.168.50.101:/export/scratch/efinity-2023.1.150-rhe-x64.tar.bz2 "$ENV"
+# fi
+
+# if [ ! -d "$ENV/efinity" ]; then
+#     pv "$ENV/efinity-2023.1.150-rhe-x64.tar.bz2" | tar xj --directory "$ENV"
+#     scp 192.168.50.101:/export/scratch/libffi.so.6 "$ENV/efinity/2023.1/lib/"
+# fi
+
+# source "$ENV/efinity/2023.1/bin/setup.sh"
+# export PATH=$PATH:"$EFXPT_HOME/bin"
+
+source $EFX_SETUP
+
+# python -m venv .user_venv --system-site-packages
+# . .user_venv/bin/activate
+
+# pip install -r requirements.txt

hw/efinix_fpga/super6502.xml

@@ -1,5 +1,4 @@
-<?xml version="1.0" encoding="UTF-8"?>
+<efx:project xmlns:efx="http://www.efinixinc.com/enf_proj" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" name="super6502" description="" last_change_date="Mon Sep 18 2023 07:52:10 PM" location="/home/byron/ServerProjects/super6502/hw/efinix_fpga" sw_version="2023.1.150" last_run_state="pass" last_run_tool="efx_pgm" last_run_flow="bitstream" config_result_in_sync="sync" design_ood="sync" place_ood="sync" route_ood="sync" xsi:schemaLocation="http://www.efinixinc.com/enf_proj enf_proj.xsd">
-<efx:project name="super6502" description="" last_change_date="Mon September 4 2023 13:53:28" location="/home/byron/Projects/super6502/hw/efinix_fpga" sw_version="2023.1.150" last_run_state="pass" last_run_tool="efx_pgm" last_run_flow="bitstream" config_result_in_sync="true" design_ood="sync" place_ood="sync" route_ood="sync" xmlns:efx="http://www.efinixinc.com/enf_proj" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.efinixinc.com/enf_proj enf_proj.xsd">
     <efx:device_info>
         <efx:family name="Trion" />
         <efx:device name="T20F256" />
@@ -7,23 +6,23 @@
     </efx:device_info>
     <efx:design_info def_veri_version="sv_09" def_vhdl_version="vhdl_2008">
         <efx:top_module name="super6502" />
-        <efx:design_file name="super6502.sv" version="default" library="default"/>
+        <efx:design_file name="src/super6502.sv" version="default" library="default" />
-        <efx:design_file name="leds.sv" version="default" library="default"/>
+        <efx:design_file name="src/leds.sv" version="default" library="default" />
-        <efx:design_file name="addr_decode.sv" version="default" library="default"/>
+        <efx:design_file name="src/addr_decode.sv" version="default" library="default" />
-        <efx:design_file name="sdram_adapter.sv" version="default" library="default"/>
+        <efx:design_file name="src/sdram_adapter.sv" version="default" library="default" />
-        <efx:design_file name="timer.sv" version="default" library="default"/>
+        <efx:design_file name="src/timer.sv" version="default" library="default" />
-        <efx:design_file name="interrupt_controller.sv" version="default" library="default"/>
+        <efx:design_file name="src/interrupt_controller.sv" version="default" library="default" />
-        <efx:design_file name="multiplier.sv" version="default" library="default"/>
+        <efx:design_file name="src/multiplier.sv" version="default" library="default" />
-        <efx:design_file name="divider_wrapper.sv" version="default" library="default"/>
+        <efx:design_file name="src/divider_wrapper.sv" version="default" library="default" />
-        <efx:design_file name="uart_wrapper.sv" version="default" library="default"/>
+        <efx:design_file name="src/uart_wrapper.sv" version="default" library="default" />
-        <efx:design_file name="sd_controller.sv" version="default" library="default"/>
+        <efx:design_file name="src/sd_controller.sv" version="default" library="default" />
-        <efx:design_file name="crc7.sv" version="default" library="default"/>
+        <efx:design_file name="src/crc7.sv" version="default" library="default" />
-        <efx:design_file name="rom.sv" version="default" library="default"/>
+        <efx:design_file name="src/rom.sv" version="default" library="default" />
-        <efx:design_file name="spi_controller.sv" version="default" library="default"/>
+        <efx:design_file name="src/spi_controller.sv" version="default" library="default" />
         <efx:top_vhdl_arch name="" />
     </efx:design_info>
     <efx:constraint_info>
-        <efx:sdc_file name="super6502.pt.sdc"/>
+        <efx:sdc_file name="constraints/super6502.pt.sdc" />
         <efx:inter_file name="" />
     </efx:constraint_info>
     <efx:sim_info />