bslathi19/super6502
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

Update irq test code

Browse Source
This commit is contained in:
Byron Lathi
2023-11-21 20:04:06 -08:00
parent 102c4dfe8a
commit b7b852ae4a
4 changed files with 7 additions and 263 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
sw/test_code/devices_setup_test/Makefile
View File

@@ -13,7 +13,7 @@ HEX=$(NAME).hex
LISTS=lists
KERNEL_SRCS=rtc.s interrupt_controller.s
KERNEL_OBJS=$(patsubst %.s,%.o,$(filter %s,$(KERNEL_SRCS)))
# KERNEL_OBJS=$(patsubst %.s,%.o,$(filter %s,$(KERNEL_SRCS)))
SRCS=$(wildcard *.s) $(wildcard *.c)
SRCS+=$(wildcard **/*.s) $(wildcard **/*.c)
@@ -28,8 +28,8 @@ all: $(KERNEL_SRCS) $(HEX)
$(HEX): $(BIN)
objcopy --input-target=binary --output-target=verilog $(BIN) $(HEX)
$(BIN): $(OBJS) $(KERNEL_OBJS)
$(CC) $(CFLAGS) $(LDFLAGS) $(OBJS) $(KERNEL_OBJS) -o $@
$(BIN): $(OBJS)
$(CC) $(CFLAGS) $(LDFLAGS) $(OBJS) -o $@
%.o: %.c $(LISTS)
$(CC) $(CFLAGS) -l $(LISTS)/$<.list -c $< -o $@