diff --git a/hw/fpga/output_files/stp1.stp b/hw/fpga/output_files/stp1.stp
deleted file mode 100644
index a989a59..0000000
--- a/hw/fpga/output_files/stp1.stp
+++ /dev/null
@@ -1,469 +0,0 @@
-<session jtag_chain="USB-Blaster [1-2.4]" jtag_device="@1: 10M50DA(.|ES)/10M50DC (0x031050DD)" sof_file="">
-  <display_tree gui_logging_enabled="0">
-    <display_branch instance="auto_signaltap_0" log="USE_GLOBAL_TEMP" signal_set="USE_GLOBAL_TEMP" trigger="USE_GLOBAL_TEMP"/>
-  </display_tree>
-  <instance enabled="true" entity_name="sld_signaltap" is_auto_node="yes" is_expanded="true" name="auto_signaltap_0" source_file="sld_signaltap.vhd">
-    <node_ip_info instance_id="0" mfg_id="110" node_id="0" version="6"/>
-    <position_info>
-      <single attribute="active tab" value="0"/>
-      <single attribute="data horizontal scroll position" value="82"/>
-      <single attribute="data vertical scroll position" value="0"/>
-      <single attribute="setup horizontal scroll position" value="0"/>
-      <single attribute="setup vertical scroll position" value="0"/>
-      <single attribute="zoom level denominator" value="1"/>
-      <single attribute="zoom level numerator" value="256"/>
-      <single attribute="zoom offset denominator" value="1"/>
-      <single attribute="zoom offset numerator" value="508"/>
-      <multi attribute="timebars" size="1" value="815"/>
-    </position_info>
-    <signal_set global_temp="1" name="signal_set: 2022/03/11 22:22:36  #0">
-      <clock name="cpu_clk:cpu_clk|altpll:altpll_component|cpu_clk_altpll:auto_generated|wire_pll1_clk[0]~clkctrl" polarity="posedge" tap_mode="probeonly"/>
-      <config pipeline_level="0" ram_type="AUTO" reserved_data_nodes="0" reserved_storage_qualifier_nodes="0" reserved_trigger_nodes="0" sample_depth="1024" trigger_in_enable="no" trigger_out_enable="no"/>
-      <top_entity/>
-      <signal_vec>
-        <trigger_input_vec>
-          <wire name="SevenSeg:segs|_data[0][0]" tap_mode="classic"/>
-          <wire name="SevenSeg:segs|_data[0][1]" tap_mode="classic"/>
-          <wire name="SevenSeg:segs|_data[0][2]" tap_mode="classic"/>
-          <wire name="SevenSeg:segs|_data[0][3]" tap_mode="classic"/>
-          <wire name="SevenSeg:segs|_data[0][4]" tap_mode="classic"/>
-          <wire name="SevenSeg:segs|_data[0][5]" tap_mode="classic"/>
-          <wire name="SevenSeg:segs|_data[0][6]" tap_mode="classic"/>
-          <wire name="SevenSeg:segs|_data[0][7]" tap_mode="classic"/>
-          <wire name="SevenSeg:segs|_data[1][0]" tap_mode="classic"/>
-          <wire name="SevenSeg:segs|_data[1][1]" tap_mode="classic"/>
-          <wire name="SevenSeg:segs|_data[1][2]" tap_mode="classic"/>
-          <wire name="SevenSeg:segs|_data[1][3]" tap_mode="classic"/>
-          <wire name="SevenSeg:segs|_data[1][4]" tap_mode="classic"/>
-          <wire name="SevenSeg:segs|_data[1][5]" tap_mode="classic"/>
-          <wire name="SevenSeg:segs|_data[1][6]" tap_mode="classic"/>
-          <wire name="SevenSeg:segs|_data[1][7]" tap_mode="classic"/>
-          <wire name="SevenSeg:segs|addr" tap_mode="classic"/>
-          <wire name="SevenSeg:segs|clk" tap_mode="classic"/>
-          <wire name="SevenSeg:segs|cs" tap_mode="classic"/>
-          <wire name="SevenSeg:segs|rst" tap_mode="classic"/>
-          <wire name="SevenSeg:segs|rw" tap_mode="classic"/>
-          <wire name="cpu_addr[0]" tap_mode="classic"/>
-          <wire name="cpu_addr[10]" tap_mode="classic"/>
-          <wire name="cpu_addr[11]" tap_mode="classic"/>
-          <wire name="cpu_addr[12]" tap_mode="classic"/>
-          <wire name="cpu_addr[13]" tap_mode="classic"/>
-          <wire name="cpu_addr[14]" tap_mode="classic"/>
-          <wire name="cpu_addr[15]" tap_mode="classic"/>
-          <wire name="cpu_addr[1]" tap_mode="classic"/>
-          <wire name="cpu_addr[2]" tap_mode="classic"/>
-          <wire name="cpu_addr[3]" tap_mode="classic"/>
-          <wire name="cpu_addr[4]" tap_mode="classic"/>
-          <wire name="cpu_addr[5]" tap_mode="classic"/>
-          <wire name="cpu_addr[6]" tap_mode="classic"/>
-          <wire name="cpu_addr[7]" tap_mode="classic"/>
-          <wire name="cpu_addr[8]" tap_mode="classic"/>
-          <wire name="cpu_addr[9]" tap_mode="classic"/>
-          <wire name="cpu_data_in[0]" tap_mode="classic"/>
-          <wire name="cpu_data_in[1]" tap_mode="classic"/>
-          <wire name="cpu_data_in[2]" tap_mode="classic"/>
-          <wire name="cpu_data_in[3]" tap_mode="classic"/>
-          <wire name="cpu_data_in[4]" tap_mode="classic"/>
-          <wire name="cpu_data_in[5]" tap_mode="classic"/>
-          <wire name="cpu_data_in[6]" tap_mode="classic"/>
-          <wire name="cpu_data_in[7]" tap_mode="classic"/>
-          <wire name="cpu_data_out[0]" tap_mode="classic"/>
-          <wire name="cpu_data_out[1]" tap_mode="classic"/>
-          <wire name="cpu_data_out[2]" tap_mode="classic"/>
-          <wire name="cpu_data_out[3]" tap_mode="classic"/>
-          <wire name="cpu_data_out[4]" tap_mode="classic"/>
-          <wire name="cpu_data_out[5]" tap_mode="classic"/>
-          <wire name="cpu_data_out[6]" tap_mode="classic"/>
-          <wire name="cpu_data_out[7]" tap_mode="classic"/>
-          <wire name="cpu_phi2" tap_mode="classic"/>
-          <wire name="cpu_rwb" tap_mode="classic"/>
-          <wire name="cpu_sync" tap_mode="classic"/>
-          <wire name="cpu_vpb" tap_mode="classic"/>
-          <wire name="rst_n" tap_mode="classic"/>
-        </trigger_input_vec>
-        <data_input_vec>
-          <wire name="SevenSeg:segs|_data[0][0]" tap_mode="classic"/>
-          <wire name="SevenSeg:segs|_data[0][1]" tap_mode="classic"/>
-          <wire name="SevenSeg:segs|_data[0][2]" tap_mode="classic"/>
-          <wire name="SevenSeg:segs|_data[0][3]" tap_mode="classic"/>
-          <wire name="SevenSeg:segs|_data[0][4]" tap_mode="classic"/>
-          <wire name="SevenSeg:segs|_data[0][5]" tap_mode="classic"/>
-          <wire name="SevenSeg:segs|_data[0][6]" tap_mode="classic"/>
-          <wire name="SevenSeg:segs|_data[0][7]" tap_mode="classic"/>
-          <wire name="SevenSeg:segs|_data[1][0]" tap_mode="classic"/>
-          <wire name="SevenSeg:segs|_data[1][1]" tap_mode="classic"/>
-          <wire name="SevenSeg:segs|_data[1][2]" tap_mode="classic"/>
-          <wire name="SevenSeg:segs|_data[1][3]" tap_mode="classic"/>
-          <wire name="SevenSeg:segs|_data[1][4]" tap_mode="classic"/>
-          <wire name="SevenSeg:segs|_data[1][5]" tap_mode="classic"/>
-          <wire name="SevenSeg:segs|_data[1][6]" tap_mode="classic"/>
-          <wire name="SevenSeg:segs|_data[1][7]" tap_mode="classic"/>
-          <wire name="SevenSeg:segs|addr" tap_mode="classic"/>
-          <wire name="SevenSeg:segs|clk" tap_mode="classic"/>
-          <wire name="SevenSeg:segs|cs" tap_mode="classic"/>
-          <wire name="SevenSeg:segs|rst" tap_mode="classic"/>
-          <wire name="SevenSeg:segs|rw" tap_mode="classic"/>
-          <wire name="cpu_addr[0]" tap_mode="classic"/>
-          <wire name="cpu_addr[10]" tap_mode="classic"/>
-          <wire name="cpu_addr[11]" tap_mode="classic"/>
-          <wire name="cpu_addr[12]" tap_mode="classic"/>
-          <wire name="cpu_addr[13]" tap_mode="classic"/>
-          <wire name="cpu_addr[14]" tap_mode="classic"/>
-          <wire name="cpu_addr[15]" tap_mode="classic"/>
-          <wire name="cpu_addr[1]" tap_mode="classic"/>
-          <wire name="cpu_addr[2]" tap_mode="classic"/>
-          <wire name="cpu_addr[3]" tap_mode="classic"/>
-          <wire name="cpu_addr[4]" tap_mode="classic"/>
-          <wire name="cpu_addr[5]" tap_mode="classic"/>
-          <wire name="cpu_addr[6]" tap_mode="classic"/>
-          <wire name="cpu_addr[7]" tap_mode="classic"/>
-          <wire name="cpu_addr[8]" tap_mode="classic"/>
-          <wire name="cpu_addr[9]" tap_mode="classic"/>
-          <wire name="cpu_data_in[0]" tap_mode="classic"/>
-          <wire name="cpu_data_in[1]" tap_mode="classic"/>
-          <wire name="cpu_data_in[2]" tap_mode="classic"/>
-          <wire name="cpu_data_in[3]" tap_mode="classic"/>
-          <wire name="cpu_data_in[4]" tap_mode="classic"/>
-          <wire name="cpu_data_in[5]" tap_mode="classic"/>
-          <wire name="cpu_data_in[6]" tap_mode="classic"/>
-          <wire name="cpu_data_in[7]" tap_mode="classic"/>
-          <wire name="cpu_data_out[0]" tap_mode="classic"/>
-          <wire name="cpu_data_out[1]" tap_mode="classic"/>
-          <wire name="cpu_data_out[2]" tap_mode="classic"/>
-          <wire name="cpu_data_out[3]" tap_mode="classic"/>
-          <wire name="cpu_data_out[4]" tap_mode="classic"/>
-          <wire name="cpu_data_out[5]" tap_mode="classic"/>
-          <wire name="cpu_data_out[6]" tap_mode="classic"/>
-          <wire name="cpu_data_out[7]" tap_mode="classic"/>
-          <wire name="cpu_phi2" tap_mode="classic"/>
-          <wire name="cpu_rwb" tap_mode="classic"/>
-          <wire name="cpu_sync" tap_mode="classic"/>
-          <wire name="cpu_vpb" tap_mode="classic"/>
-          <wire name="rst_n" tap_mode="classic"/>
-        </data_input_vec>
-        <storage_qualifier_input_vec>
-          <wire name="SevenSeg:segs|_data[0][0]" tap_mode="classic"/>
-          <wire name="SevenSeg:segs|_data[0][1]" tap_mode="classic"/>
-          <wire name="SevenSeg:segs|_data[0][2]" tap_mode="classic"/>
-          <wire name="SevenSeg:segs|_data[0][3]" tap_mode="classic"/>
-          <wire name="SevenSeg:segs|_data[0][4]" tap_mode="classic"/>
-          <wire name="SevenSeg:segs|_data[0][5]" tap_mode="classic"/>
-          <wire name="SevenSeg:segs|_data[0][6]" tap_mode="classic"/>
-          <wire name="SevenSeg:segs|_data[0][7]" tap_mode="classic"/>
-          <wire name="SevenSeg:segs|_data[1][0]" tap_mode="classic"/>
-          <wire name="SevenSeg:segs|_data[1][1]" tap_mode="classic"/>
-          <wire name="SevenSeg:segs|_data[1][2]" tap_mode="classic"/>
-          <wire name="SevenSeg:segs|_data[1][3]" tap_mode="classic"/>
-          <wire name="SevenSeg:segs|_data[1][4]" tap_mode="classic"/>
-          <wire name="SevenSeg:segs|_data[1][5]" tap_mode="classic"/>
-          <wire name="SevenSeg:segs|_data[1][6]" tap_mode="classic"/>
-          <wire name="SevenSeg:segs|_data[1][7]" tap_mode="classic"/>
-          <wire name="SevenSeg:segs|addr" tap_mode="classic"/>
-          <wire name="SevenSeg:segs|clk" tap_mode="classic"/>
-          <wire name="SevenSeg:segs|cs" tap_mode="classic"/>
-          <wire name="SevenSeg:segs|rst" tap_mode="classic"/>
-          <wire name="SevenSeg:segs|rw" tap_mode="classic"/>
-          <wire name="cpu_addr[0]" tap_mode="classic"/>
-          <wire name="cpu_addr[10]" tap_mode="classic"/>
-          <wire name="cpu_addr[11]" tap_mode="classic"/>
-          <wire name="cpu_addr[12]" tap_mode="classic"/>
-          <wire name="cpu_addr[13]" tap_mode="classic"/>
-          <wire name="cpu_addr[14]" tap_mode="classic"/>
-          <wire name="cpu_addr[15]" tap_mode="classic"/>
-          <wire name="cpu_addr[1]" tap_mode="classic"/>
-          <wire name="cpu_addr[2]" tap_mode="classic"/>
-          <wire name="cpu_addr[3]" tap_mode="classic"/>
-          <wire name="cpu_addr[4]" tap_mode="classic"/>
-          <wire name="cpu_addr[5]" tap_mode="classic"/>
-          <wire name="cpu_addr[6]" tap_mode="classic"/>
-          <wire name="cpu_addr[7]" tap_mode="classic"/>
-          <wire name="cpu_addr[8]" tap_mode="classic"/>
-          <wire name="cpu_addr[9]" tap_mode="classic"/>
-          <wire name="cpu_data_in[0]" tap_mode="classic"/>
-          <wire name="cpu_data_in[1]" tap_mode="classic"/>
-          <wire name="cpu_data_in[2]" tap_mode="classic"/>
-          <wire name="cpu_data_in[3]" tap_mode="classic"/>
-          <wire name="cpu_data_in[4]" tap_mode="classic"/>
-          <wire name="cpu_data_in[5]" tap_mode="classic"/>
-          <wire name="cpu_data_in[6]" tap_mode="classic"/>
-          <wire name="cpu_data_in[7]" tap_mode="classic"/>
-          <wire name="cpu_data_out[0]" tap_mode="classic"/>
-          <wire name="cpu_data_out[1]" tap_mode="classic"/>
-          <wire name="cpu_data_out[2]" tap_mode="classic"/>
-          <wire name="cpu_data_out[3]" tap_mode="classic"/>
-          <wire name="cpu_data_out[4]" tap_mode="classic"/>
-          <wire name="cpu_data_out[5]" tap_mode="classic"/>
-          <wire name="cpu_data_out[6]" tap_mode="classic"/>
-          <wire name="cpu_data_out[7]" tap_mode="classic"/>
-          <wire name="cpu_phi2" tap_mode="classic"/>
-          <wire name="cpu_rwb" tap_mode="classic"/>
-          <wire name="cpu_sync" tap_mode="classic"/>
-          <wire name="cpu_vpb" tap_mode="classic"/>
-          <wire name="rst_n" tap_mode="classic"/>
-        </storage_qualifier_input_vec>
-      </signal_vec>
-      <presentation>
-        <unified_setup_data_view>
-          <node is_selected="false" level-0="alt_or" name="cpu_addr[15..0]" order="msb_to_lsb" state="collapse" storage-0="alt_or" storage-1="alt_or" storage-2="alt_or" type="input pin">
-            <node data_index="27" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" level-0="dont_care" name="cpu_addr[15]" pwr_level-0="dont_care" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="27" tap_mode="classic" trigger_index="27" type="unknown"/>
-            <node data_index="26" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" level-0="dont_care" name="cpu_addr[14]" pwr_level-0="dont_care" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="26" tap_mode="classic" trigger_index="26" type="unknown"/>
-            <node data_index="25" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" level-0="dont_care" name="cpu_addr[13]" pwr_level-0="dont_care" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="25" tap_mode="classic" trigger_index="25" type="unknown"/>
-            <node data_index="24" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" level-0="dont_care" name="cpu_addr[12]" pwr_level-0="dont_care" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="24" tap_mode="classic" trigger_index="24" type="unknown"/>
-            <node data_index="23" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" level-0="dont_care" name="cpu_addr[11]" pwr_level-0="dont_care" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="23" tap_mode="classic" trigger_index="23" type="unknown"/>
-            <node data_index="22" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" level-0="dont_care" name="cpu_addr[10]" pwr_level-0="dont_care" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="22" tap_mode="classic" trigger_index="22" type="unknown"/>
-            <node data_index="36" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" level-0="dont_care" name="cpu_addr[9]" pwr_level-0="dont_care" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="36" tap_mode="classic" trigger_index="36" type="unknown"/>
-            <node data_index="35" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" level-0="dont_care" name="cpu_addr[8]" pwr_level-0="dont_care" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="35" tap_mode="classic" trigger_index="35" type="unknown"/>
-            <node data_index="34" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" level-0="dont_care" name="cpu_addr[7]" pwr_level-0="dont_care" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="34" tap_mode="classic" trigger_index="34" type="unknown"/>
-            <node data_index="33" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" level-0="dont_care" name="cpu_addr[6]" pwr_level-0="dont_care" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="33" tap_mode="classic" trigger_index="33" type="unknown"/>
-            <node data_index="32" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" level-0="dont_care" name="cpu_addr[5]" pwr_level-0="dont_care" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="32" tap_mode="classic" trigger_index="32" type="unknown"/>
-            <node data_index="31" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" level-0="dont_care" name="cpu_addr[4]" pwr_level-0="dont_care" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="31" tap_mode="classic" trigger_index="31" type="unknown"/>
-            <node data_index="30" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" level-0="dont_care" name="cpu_addr[3]" pwr_level-0="dont_care" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="30" tap_mode="classic" trigger_index="30" type="unknown"/>
-            <node data_index="29" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" level-0="dont_care" name="cpu_addr[2]" pwr_level-0="dont_care" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="29" tap_mode="classic" trigger_index="29" type="unknown"/>
-            <node data_index="28" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" level-0="dont_care" name="cpu_addr[1]" pwr_level-0="dont_care" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="28" tap_mode="classic" trigger_index="28" type="unknown"/>
-            <node data_index="21" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" level-0="dont_care" name="cpu_addr[0]" pwr_level-0="dont_care" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="21" tap_mode="classic" trigger_index="21" type="unknown"/>
-          </node>
-          <node is_selected="false" level-0="alt_or" name="cpu_data_in[7..0]" order="msb_to_lsb" state="collapse" storage-0="alt_or" storage-1="alt_or" storage-2="alt_or" type="combinatorial">
-            <node data_index="44" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" level-0="dont_care" name="cpu_data_in[7]" pwr_level-0="dont_care" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="44" tap_mode="classic" trigger_index="44" type="unknown"/>
-            <node data_index="43" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" level-0="dont_care" name="cpu_data_in[6]" pwr_level-0="dont_care" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="43" tap_mode="classic" trigger_index="43" type="unknown"/>
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-            <node data_index="9" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" name="SevenSeg:segs|_data[1][1]" storage_index="9" tap_mode="classic" trigger_index="9" type="unknown"/>
-            <node data_index="10" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" name="SevenSeg:segs|_data[1][2]" storage_index="10" tap_mode="classic" trigger_index="10" type="unknown"/>
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-            <node data_index="13" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" name="SevenSeg:segs|_data[1][5]" storage_index="13" tap_mode="classic" trigger_index="13" type="unknown"/>
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-            <net data_index="34" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" level-0="dont_care" name="cpu_addr[7]" pwr_level-0="dont_care" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="34" tap_mode="classic" trigger_index="34" type="unknown"/>
-            <net data_index="33" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" level-0="dont_care" name="cpu_addr[6]" pwr_level-0="dont_care" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="33" tap_mode="classic" trigger_index="33" type="unknown"/>
-            <net data_index="32" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" level-0="dont_care" name="cpu_addr[5]" pwr_level-0="dont_care" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="32" tap_mode="classic" trigger_index="32" type="unknown"/>
-            <net data_index="31" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" level-0="dont_care" name="cpu_addr[4]" pwr_level-0="dont_care" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="31" tap_mode="classic" trigger_index="31" type="unknown"/>
-            <net data_index="30" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" level-0="dont_care" name="cpu_addr[3]" pwr_level-0="dont_care" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="30" tap_mode="classic" trigger_index="30" type="unknown"/>
-            <net data_index="29" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" level-0="dont_care" name="cpu_addr[2]" pwr_level-0="dont_care" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="29" tap_mode="classic" trigger_index="29" type="unknown"/>
-            <net data_index="28" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" level-0="dont_care" name="cpu_addr[1]" pwr_level-0="dont_care" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="28" tap_mode="classic" trigger_index="28" type="unknown"/>
-            <net data_index="21" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" level-0="dont_care" name="cpu_addr[0]" pwr_level-0="dont_care" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="21" tap_mode="classic" trigger_index="21" type="unknown"/>
-          </bus>
-          <bus is_selected="false" level-0="alt_or" name="cpu_data_in[7..0]" order="msb_to_lsb" state="collapse" storage-0="alt_or" storage-1="alt_or" storage-2="alt_or" type="combinatorial">
-            <net data_index="44" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" level-0="dont_care" name="cpu_data_in[7]" pwr_level-0="dont_care" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="44" tap_mode="classic" trigger_index="44" type="unknown"/>
-            <net data_index="43" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" level-0="dont_care" name="cpu_data_in[6]" pwr_level-0="dont_care" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="43" tap_mode="classic" trigger_index="43" type="unknown"/>
-            <net data_index="42" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" level-0="dont_care" name="cpu_data_in[5]" pwr_level-0="dont_care" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="42" tap_mode="classic" trigger_index="42" type="unknown"/>
-            <net data_index="41" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" level-0="dont_care" name="cpu_data_in[4]" pwr_level-0="dont_care" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="41" tap_mode="classic" trigger_index="41" type="unknown"/>
-            <net data_index="40" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" level-0="dont_care" name="cpu_data_in[3]" pwr_level-0="dont_care" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="40" tap_mode="classic" trigger_index="40" type="unknown"/>
-            <net data_index="39" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" level-0="dont_care" name="cpu_data_in[2]" pwr_level-0="dont_care" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="39" tap_mode="classic" trigger_index="39" type="unknown"/>
-            <net data_index="38" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" level-0="dont_care" name="cpu_data_in[1]" pwr_level-0="dont_care" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="38" tap_mode="classic" trigger_index="38" type="unknown"/>
-            <net data_index="37" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" level-0="dont_care" name="cpu_data_in[0]" pwr_level-0="dont_care" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="37" tap_mode="classic" trigger_index="37" type="unknown"/>
-          </bus>
-          <bus is_selected="false" level-0="alt_or" name="cpu_data_out[7..0]" order="msb_to_lsb" storage-0="alt_or" storage-1="alt_or" storage-2="alt_or" type="combinatorial">
-            <net data_index="52" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" level-0="dont_care" name="cpu_data_out[7]" pwr_level-0="dont_care" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="52" tap_mode="classic" trigger_index="52" type="unknown"/>
-            <net data_index="51" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" level-0="dont_care" name="cpu_data_out[6]" pwr_level-0="dont_care" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="51" tap_mode="classic" trigger_index="51" type="unknown"/>
-            <net data_index="50" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" level-0="dont_care" name="cpu_data_out[5]" pwr_level-0="dont_care" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="50" tap_mode="classic" trigger_index="50" type="unknown"/>
-            <net data_index="49" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" level-0="dont_care" name="cpu_data_out[4]" pwr_level-0="dont_care" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="49" tap_mode="classic" trigger_index="49" type="unknown"/>
-            <net data_index="48" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" level-0="dont_care" name="cpu_data_out[3]" pwr_level-0="dont_care" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="48" tap_mode="classic" trigger_index="48" type="unknown"/>
-            <net data_index="47" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" level-0="dont_care" name="cpu_data_out[2]" pwr_level-0="dont_care" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="47" tap_mode="classic" trigger_index="47" type="unknown"/>
-            <net data_index="46" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" level-0="dont_care" name="cpu_data_out[1]" pwr_level-0="dont_care" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="46" tap_mode="classic" trigger_index="46" type="unknown"/>
-            <net data_index="45" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" level-0="dont_care" name="cpu_data_out[0]" pwr_level-0="dont_care" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="45" tap_mode="classic" trigger_index="45" type="unknown"/>
-          </bus>
-          <net data_index="54" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" level-0="dont_care" name="cpu_rwb" pwr_level-0="dont_care" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="54" tap_mode="classic" trigger_index="54" type="unknown"/>
-          <net data_index="55" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" level-0="dont_care" name="cpu_sync" pwr_level-0="dont_care" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="55" tap_mode="classic" trigger_index="55" type="unknown"/>
-          <net data_index="57" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" level-0="dont_care" name="rst_n" pwr_level-0="dont_care" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="57" tap_mode="classic" trigger_index="57" type="unknown"/>
-          <net data_index="56" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" level-0="dont_care" name="cpu_vpb" pwr_level-0="dont_care" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="56" tap_mode="classic" trigger_index="56" type="unknown"/>
-          <net data_index="53" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" level-0="dont_care" name="cpu_phi2" pwr_level-0="dont_care" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="53" tap_mode="classic" trigger_index="53" type="unknown"/>
-          <net data_index="16" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" name="SevenSeg:segs|addr" storage_index="16" tap_mode="classic" trigger_index="16" type="unknown"/>
-          <net data_index="17" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" name="SevenSeg:segs|clk" storage_index="17" tap_mode="classic" trigger_index="17" type="unknown"/>
-          <net data_index="18" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="true" is_storage_input="true" is_trigger_input="true" level-0="rising edge" name="SevenSeg:segs|cs" storage_index="18" tap_mode="classic" trigger_index="18" type="unknown"/>
-          <net data_index="19" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" name="SevenSeg:segs|rst" storage_index="19" tap_mode="classic" trigger_index="19" type="unknown"/>
-          <net data_index="20" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" name="SevenSeg:segs|rw" storage_index="20" tap_mode="classic" trigger_index="20" type="unknown"/>
-          <bus is_selected="false" level-0="alt_or" name="SevenSeg:segs|_data[0][0..7]" order="lsb_to_msb" type="register">
-            <net data_index="0" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" name="SevenSeg:segs|_data[0][0]" storage_index="0" tap_mode="classic" trigger_index="0" type="unknown"/>
-            <net data_index="1" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" name="SevenSeg:segs|_data[0][1]" storage_index="1" tap_mode="classic" trigger_index="1" type="unknown"/>
-            <net data_index="2" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" name="SevenSeg:segs|_data[0][2]" storage_index="2" tap_mode="classic" trigger_index="2" type="unknown"/>
-            <net data_index="3" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" name="SevenSeg:segs|_data[0][3]" storage_index="3" tap_mode="classic" trigger_index="3" type="unknown"/>
-            <net data_index="4" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" name="SevenSeg:segs|_data[0][4]" storage_index="4" tap_mode="classic" trigger_index="4" type="unknown"/>
-            <net data_index="5" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" name="SevenSeg:segs|_data[0][5]" storage_index="5" tap_mode="classic" trigger_index="5" type="unknown"/>
-            <net data_index="6" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" name="SevenSeg:segs|_data[0][6]" storage_index="6" tap_mode="classic" trigger_index="6" type="unknown"/>
-            <net data_index="7" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" name="SevenSeg:segs|_data[0][7]" storage_index="7" tap_mode="classic" trigger_index="7" type="unknown"/>
-          </bus>
-          <bus is_selected="false" level-0="alt_or" name="SevenSeg:segs|_data[1][0..7]" order="lsb_to_msb" type="register">
-            <net data_index="8" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" name="SevenSeg:segs|_data[1][0]" storage_index="8" tap_mode="classic" trigger_index="8" type="unknown"/>
-            <net data_index="9" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" name="SevenSeg:segs|_data[1][1]" storage_index="9" tap_mode="classic" trigger_index="9" type="unknown"/>
-            <net data_index="10" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" name="SevenSeg:segs|_data[1][2]" storage_index="10" tap_mode="classic" trigger_index="10" type="unknown"/>
-            <net data_index="11" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" name="SevenSeg:segs|_data[1][3]" storage_index="11" tap_mode="classic" trigger_index="11" type="unknown"/>
-            <net data_index="12" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" name="SevenSeg:segs|_data[1][4]" storage_index="12" tap_mode="classic" trigger_index="12" type="unknown"/>
-            <net data_index="13" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" name="SevenSeg:segs|_data[1][5]" storage_index="13" tap_mode="classic" trigger_index="13" type="unknown"/>
-            <net data_index="14" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" name="SevenSeg:segs|_data[1][6]" storage_index="14" tap_mode="classic" trigger_index="14" type="unknown"/>
-            <net data_index="15" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" name="SevenSeg:segs|_data[1][7]" storage_index="15" tap_mode="classic" trigger_index="15" type="unknown"/>
-          </bus>
-        </data_view>
-        <setup_view>
-          <bus is_selected="false" level-0="alt_or" name="cpu_addr[15..0]" order="msb_to_lsb" state="collapse" storage-0="alt_or" storage-1="alt_or" storage-2="alt_or" type="input pin">
-            <net data_index="27" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" level-0="dont_care" name="cpu_addr[15]" pwr_level-0="dont_care" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="27" tap_mode="classic" trigger_index="27" type="unknown"/>
-            <net data_index="26" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" level-0="dont_care" name="cpu_addr[14]" pwr_level-0="dont_care" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="26" tap_mode="classic" trigger_index="26" type="unknown"/>
-            <net data_index="25" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" level-0="dont_care" name="cpu_addr[13]" pwr_level-0="dont_care" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="25" tap_mode="classic" trigger_index="25" type="unknown"/>
-            <net data_index="24" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" level-0="dont_care" name="cpu_addr[12]" pwr_level-0="dont_care" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="24" tap_mode="classic" trigger_index="24" type="unknown"/>
-            <net data_index="23" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" level-0="dont_care" name="cpu_addr[11]" pwr_level-0="dont_care" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="23" tap_mode="classic" trigger_index="23" type="unknown"/>
-            <net data_index="22" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" level-0="dont_care" name="cpu_addr[10]" pwr_level-0="dont_care" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="22" tap_mode="classic" trigger_index="22" type="unknown"/>
-            <net data_index="36" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" level-0="dont_care" name="cpu_addr[9]" pwr_level-0="dont_care" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="36" tap_mode="classic" trigger_index="36" type="unknown"/>
-            <net data_index="35" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" level-0="dont_care" name="cpu_addr[8]" pwr_level-0="dont_care" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="35" tap_mode="classic" trigger_index="35" type="unknown"/>
-            <net data_index="34" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" level-0="dont_care" name="cpu_addr[7]" pwr_level-0="dont_care" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="34" tap_mode="classic" trigger_index="34" type="unknown"/>
-            <net data_index="33" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" level-0="dont_care" name="cpu_addr[6]" pwr_level-0="dont_care" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="33" tap_mode="classic" trigger_index="33" type="unknown"/>
-            <net data_index="32" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" level-0="dont_care" name="cpu_addr[5]" pwr_level-0="dont_care" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="32" tap_mode="classic" trigger_index="32" type="unknown"/>
-            <net data_index="31" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" level-0="dont_care" name="cpu_addr[4]" pwr_level-0="dont_care" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="31" tap_mode="classic" trigger_index="31" type="unknown"/>
-            <net data_index="30" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" level-0="dont_care" name="cpu_addr[3]" pwr_level-0="dont_care" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="30" tap_mode="classic" trigger_index="30" type="unknown"/>
-            <net data_index="29" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" level-0="dont_care" name="cpu_addr[2]" pwr_level-0="dont_care" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="29" tap_mode="classic" trigger_index="29" type="unknown"/>
-            <net data_index="28" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" level-0="dont_care" name="cpu_addr[1]" pwr_level-0="dont_care" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="28" tap_mode="classic" trigger_index="28" type="unknown"/>
-            <net data_index="21" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" level-0="dont_care" name="cpu_addr[0]" pwr_level-0="dont_care" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="21" tap_mode="classic" trigger_index="21" type="unknown"/>
-          </bus>
-          <bus is_selected="false" level-0="alt_or" name="cpu_data_in[7..0]" order="msb_to_lsb" state="collapse" storage-0="alt_or" storage-1="alt_or" storage-2="alt_or" type="combinatorial">
-            <net data_index="44" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" level-0="dont_care" name="cpu_data_in[7]" pwr_level-0="dont_care" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="44" tap_mode="classic" trigger_index="44" type="unknown"/>
-            <net data_index="43" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" level-0="dont_care" name="cpu_data_in[6]" pwr_level-0="dont_care" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="43" tap_mode="classic" trigger_index="43" type="unknown"/>
-            <net data_index="42" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" level-0="dont_care" name="cpu_data_in[5]" pwr_level-0="dont_care" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="42" tap_mode="classic" trigger_index="42" type="unknown"/>
-            <net data_index="41" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" level-0="dont_care" name="cpu_data_in[4]" pwr_level-0="dont_care" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="41" tap_mode="classic" trigger_index="41" type="unknown"/>
-            <net data_index="40" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" level-0="dont_care" name="cpu_data_in[3]" pwr_level-0="dont_care" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="40" tap_mode="classic" trigger_index="40" type="unknown"/>
-            <net data_index="39" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" level-0="dont_care" name="cpu_data_in[2]" pwr_level-0="dont_care" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="39" tap_mode="classic" trigger_index="39" type="unknown"/>
-            <net data_index="38" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" level-0="dont_care" name="cpu_data_in[1]" pwr_level-0="dont_care" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="38" tap_mode="classic" trigger_index="38" type="unknown"/>
-            <net data_index="37" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" level-0="dont_care" name="cpu_data_in[0]" pwr_level-0="dont_care" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="37" tap_mode="classic" trigger_index="37" type="unknown"/>
-          </bus>
-          <bus is_selected="false" level-0="alt_or" name="cpu_data_out[7..0]" order="msb_to_lsb" storage-0="alt_or" storage-1="alt_or" storage-2="alt_or" type="combinatorial">
-            <net data_index="52" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" level-0="dont_care" name="cpu_data_out[7]" pwr_level-0="dont_care" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="52" tap_mode="classic" trigger_index="52" type="unknown"/>
-            <net data_index="51" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" level-0="dont_care" name="cpu_data_out[6]" pwr_level-0="dont_care" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="51" tap_mode="classic" trigger_index="51" type="unknown"/>
-            <net data_index="50" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" level-0="dont_care" name="cpu_data_out[5]" pwr_level-0="dont_care" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="50" tap_mode="classic" trigger_index="50" type="unknown"/>
-            <net data_index="49" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" level-0="dont_care" name="cpu_data_out[4]" pwr_level-0="dont_care" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="49" tap_mode="classic" trigger_index="49" type="unknown"/>
-            <net data_index="48" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" level-0="dont_care" name="cpu_data_out[3]" pwr_level-0="dont_care" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="48" tap_mode="classic" trigger_index="48" type="unknown"/>
-            <net data_index="47" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" level-0="dont_care" name="cpu_data_out[2]" pwr_level-0="dont_care" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="47" tap_mode="classic" trigger_index="47" type="unknown"/>
-            <net data_index="46" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" level-0="dont_care" name="cpu_data_out[1]" pwr_level-0="dont_care" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="46" tap_mode="classic" trigger_index="46" type="unknown"/>
-            <net data_index="45" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" level-0="dont_care" name="cpu_data_out[0]" pwr_level-0="dont_care" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="45" tap_mode="classic" trigger_index="45" type="unknown"/>
-          </bus>
-          <net data_index="54" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" level-0="dont_care" name="cpu_rwb" pwr_level-0="dont_care" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="54" tap_mode="classic" trigger_index="54" type="unknown"/>
-          <net data_index="55" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" level-0="dont_care" name="cpu_sync" pwr_level-0="dont_care" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="55" tap_mode="classic" trigger_index="55" type="unknown"/>
-          <net data_index="57" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" level-0="dont_care" name="rst_n" pwr_level-0="dont_care" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="57" tap_mode="classic" trigger_index="57" type="unknown"/>
-          <net data_index="56" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" level-0="dont_care" name="cpu_vpb" pwr_level-0="dont_care" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="56" tap_mode="classic" trigger_index="56" type="unknown"/>
-          <net data_index="53" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" level-0="dont_care" name="cpu_phi2" pwr_level-0="dont_care" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="53" tap_mode="classic" trigger_index="53" type="unknown"/>
-          <net data_index="16" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" name="SevenSeg:segs|addr" storage_index="16" tap_mode="classic" trigger_index="16" type="unknown"/>
-          <net data_index="17" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" name="SevenSeg:segs|clk" storage_index="17" tap_mode="classic" trigger_index="17" type="unknown"/>
-          <net data_index="18" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="true" is_storage_input="true" is_trigger_input="true" level-0="rising edge" name="SevenSeg:segs|cs" storage_index="18" tap_mode="classic" trigger_index="18" type="unknown"/>
-          <net data_index="19" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" name="SevenSeg:segs|rst" storage_index="19" tap_mode="classic" trigger_index="19" type="unknown"/>
-          <net data_index="20" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" name="SevenSeg:segs|rw" storage_index="20" tap_mode="classic" trigger_index="20" type="unknown"/>
-          <bus is_selected="false" level-0="alt_or" name="SevenSeg:segs|_data[0][0..7]" order="lsb_to_msb" type="register">
-            <net data_index="0" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" name="SevenSeg:segs|_data[0][0]" storage_index="0" tap_mode="classic" trigger_index="0" type="unknown"/>
-            <net data_index="1" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" name="SevenSeg:segs|_data[0][1]" storage_index="1" tap_mode="classic" trigger_index="1" type="unknown"/>
-            <net data_index="2" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" name="SevenSeg:segs|_data[0][2]" storage_index="2" tap_mode="classic" trigger_index="2" type="unknown"/>
-            <net data_index="3" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" name="SevenSeg:segs|_data[0][3]" storage_index="3" tap_mode="classic" trigger_index="3" type="unknown"/>
-            <net data_index="4" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" name="SevenSeg:segs|_data[0][4]" storage_index="4" tap_mode="classic" trigger_index="4" type="unknown"/>
-            <net data_index="5" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" name="SevenSeg:segs|_data[0][5]" storage_index="5" tap_mode="classic" trigger_index="5" type="unknown"/>
-            <net data_index="6" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" name="SevenSeg:segs|_data[0][6]" storage_index="6" tap_mode="classic" trigger_index="6" type="unknown"/>
-            <net data_index="7" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" name="SevenSeg:segs|_data[0][7]" storage_index="7" tap_mode="classic" trigger_index="7" type="unknown"/>
-          </bus>
-          <bus is_selected="false" level-0="alt_or" name="SevenSeg:segs|_data[1][0..7]" order="lsb_to_msb" type="register">
-            <net data_index="8" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" name="SevenSeg:segs|_data[1][0]" storage_index="8" tap_mode="classic" trigger_index="8" type="unknown"/>
-            <net data_index="9" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" name="SevenSeg:segs|_data[1][1]" storage_index="9" tap_mode="classic" trigger_index="9" type="unknown"/>
-            <net data_index="10" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" name="SevenSeg:segs|_data[1][2]" storage_index="10" tap_mode="classic" trigger_index="10" type="unknown"/>
-            <net data_index="11" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" name="SevenSeg:segs|_data[1][3]" storage_index="11" tap_mode="classic" trigger_index="11" type="unknown"/>
-            <net data_index="12" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" name="SevenSeg:segs|_data[1][4]" storage_index="12" tap_mode="classic" trigger_index="12" type="unknown"/>
-            <net data_index="13" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" name="SevenSeg:segs|_data[1][5]" storage_index="13" tap_mode="classic" trigger_index="13" type="unknown"/>
-            <net data_index="14" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" name="SevenSeg:segs|_data[1][6]" storage_index="14" tap_mode="classic" trigger_index="14" type="unknown"/>
-            <net data_index="15" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" name="SevenSeg:segs|_data[1][7]" storage_index="15" tap_mode="classic" trigger_index="15" type="unknown"/>
-          </bus>
-        </setup_view>
-        <trigger_in_editor/>
-        <trigger_out_editor/>
-      </presentation>
-      <trigger CRC="CD2E3C2A" attribute_mem_mode="false" gap_record="true" global_temp="1" name="trigger: 2022/03/11 22:22:36  #1" position="pre" power_up_trigger_mode="false" record_data_gap="true" segment_size="64" storage_mode="off" storage_qualifier_disabled="no" storage_qualifier_port_is_pin="false" storage_qualifier_port_name="auto_stp_external_storage_qualifier" storage_qualifier_port_tap_mode="classic" trigger_type="circular">
-        <power_up_trigger position="pre" storage_qualifier_disabled="no"/>
-        <events use_custom_flow_control="no">
-          <level enabled="yes" name="condition1" type="basic">'SevenSeg:segs|cs' == rising edge
-            <power_up enabled="yes">
-            </power_up>
-            <op_node/>
-          </level>
-        </events>
-        <storage_qualifier_events>
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-          <extradata>11111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111T1111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111</extradata>
-        </log>
-      </trigger>
-    </signal_set>
-  </instance>
-  <mnemonics/>
-  <static_plugin_mnemonics/>
-  <global_info>
-    <single attribute="active instance" value="0"/>
-    <single attribute="config widget visible" value="1"/>
-    <single attribute="data log widget visible" value="1"/>
-    <single attribute="hierarchy widget visible" value="1"/>
-    <single attribute="instance widget visible" value="1"/>
-    <single attribute="jtag widget visible" value="1"/>
-    <single attribute="lock mode" value="0"/>
-    <multi attribute="frame size" size="2" value="1274,1550"/>
-    <multi attribute="jtag widget size" size="2" value="417,160"/>
-    <multi attribute="column width" size="23" value="34,34,220,74,68,78,95,96,98,98,88,88,110,101,101,101,101,101,101,101,101,107,193"/>
-  </global_info>
-</session>
diff --git a/hw/fpga/super6502.qsf b/hw/fpga/super6502.qsf
index d9f579b..5907dbf 100644
--- a/hw/fpga/super6502.qsf
+++ b/hw/fpga/super6502.qsf
@@ -197,7 +197,7 @@ set_instance_assignment -name IO_STANDARD "2.5 V" -to cpu_rwb
 set_instance_assignment -name IO_STANDARD "2.5 V" -to cpu_sob
 set_instance_assignment -name IO_STANDARD "2.5 V" -to cpu_sync
 set_instance_assignment -name IO_STANDARD "2.5 V" -to clk_50
-set_global_assignment -name ENABLE_SIGNALTAP ON
+set_global_assignment -name ENABLE_SIGNALTAP OFF
 set_global_assignment -name USE_SIGNALTAP_FILE output_files/stp1.stp
 set_global_assignment -name SIGNALTAP_FILE output_files/stp1.stp
 set_global_assignment -name SLD_NODE_CREATOR_ID 110 -section_id auto_signaltap_0