diff --git a/hw/fpga/output_files/super6502.sld b/hw/fpga/output_files/super6502.sld index f7d3ed7..9fbd92d 100644 --- a/hw/fpga/output_files/super6502.sld +++ b/hw/fpga/output_files/super6502.sld @@ -1 +1,9 @@ - + + + + + + + + + diff --git a/hw/fpga/rom.qip b/hw/fpga/rom.qip new file mode 100644 index 0000000..a1a10d2 --- /dev/null +++ b/hw/fpga/rom.qip @@ -0,0 +1,4 @@ +set_global_assignment -name IP_TOOL_NAME "ROM: 1-PORT" +set_global_assignment -name IP_TOOL_VERSION "18.1" +set_global_assignment -name IP_GENERATED_DEVICE_FAMILY "{MAX 10}" +set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) "rom.v"] diff --git a/hw/fpga/rom.v b/hw/fpga/rom.v new file mode 100644 index 0000000..5040d67 --- /dev/null +++ b/hw/fpga/rom.v @@ -0,0 +1,164 @@ +// megafunction wizard: %ROM: 1-PORT% +// GENERATION: STANDARD +// VERSION: WM1.0 +// MODULE: altsyncram + +// ============================================================ +// File Name: rom.v +// Megafunction Name(s): +// altsyncram +// +// Simulation Library Files(s): +// altera_mf +// ============================================================ +// ************************************************************ +// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE! +// +// 18.1.0 Build 625 09/12/2018 SJ Lite Edition +// ************************************************************ + + +//Copyright (C) 2018 Intel Corporation. All rights reserved. +//Your use of Intel Corporation's design tools, logic functions +//and other software and tools, and its AMPP partner logic +//functions, and any output files from any of the foregoing +//(including device programming or simulation files), and any +//associated documentation or information are expressly subject +//to the terms and conditions of the Intel Program License +//Subscription Agreement, the Intel Quartus Prime License Agreement, +//the Intel FPGA IP License Agreement, or other applicable license +//agreement, including, without limitation, that your use is for +//the sole purpose of programming logic devices manufactured by +//Intel and sold by Intel or its authorized distributors. Please +//refer to the applicable agreement for further details. + + +// synopsys translate_off +`timescale 1 ps / 1 ps +// synopsys translate_on +module rom ( + address, + clock, + q); + + input [14:0] address; + input clock; + output [7:0] q; +`ifndef ALTERA_RESERVED_QIS +// synopsys translate_off +`endif + tri1 clock; +`ifndef ALTERA_RESERVED_QIS +// synopsys translate_on +`endif + + wire [7:0] sub_wire0; + wire [7:0] q = sub_wire0[7:0]; + + altsyncram altsyncram_component ( + .address_a (address), + .clock0 (clock), + .q_a (sub_wire0), + .aclr0 (1'b0), + .aclr1 (1'b0), + .address_b (1'b1), + .addressstall_a (1'b0), + .addressstall_b (1'b0), + .byteena_a (1'b1), + .byteena_b (1'b1), + .clock1 (1'b1), + .clocken0 (1'b1), + .clocken1 (1'b1), + .clocken2 (1'b1), + .clocken3 (1'b1), + .data_a ({8{1'b1}}), + .data_b (1'b1), + .eccstatus (), + .q_b (), + .rden_a (1'b1), + .rden_b (1'b1), + .wren_a (1'b0), + .wren_b (1'b0)); + defparam + altsyncram_component.address_aclr_a = "NONE", + altsyncram_component.clock_enable_input_a = "BYPASS", + altsyncram_component.clock_enable_output_a = "BYPASS", +`ifdef NO_PLI + altsyncram_component.init_file = "boot.rif" +`else + altsyncram_component.init_file = "boot.hex" +`endif +, + altsyncram_component.intended_device_family = "MAX 10", + altsyncram_component.lpm_hint = "ENABLE_RUNTIME_MOD=YES,INSTANCE_NAME=ROM0", + altsyncram_component.lpm_type = "altsyncram", + altsyncram_component.numwords_a = 32768, + altsyncram_component.operation_mode = "ROM", + altsyncram_component.outdata_aclr_a = "NONE", + altsyncram_component.outdata_reg_a = "UNREGISTERED", + altsyncram_component.widthad_a = 15, + altsyncram_component.width_a = 8, + altsyncram_component.width_byteena_a = 1; + + +endmodule + +// ============================================================ +// CNX file retrieval info +// ============================================================ +// Retrieval info: PRIVATE: ADDRESSSTALL_A NUMERIC "0" +// Retrieval info: PRIVATE: AclrAddr NUMERIC "0" +// Retrieval info: PRIVATE: AclrByte NUMERIC "0" +// Retrieval info: PRIVATE: AclrOutput NUMERIC "0" +// Retrieval info: PRIVATE: BYTE_ENABLE NUMERIC "0" +// Retrieval info: PRIVATE: BYTE_SIZE NUMERIC "8" +// Retrieval info: PRIVATE: BlankMemory NUMERIC "0" +// Retrieval info: PRIVATE: CLOCK_ENABLE_INPUT_A NUMERIC "0" +// Retrieval info: PRIVATE: CLOCK_ENABLE_OUTPUT_A NUMERIC "0" +// Retrieval info: PRIVATE: Clken NUMERIC "0" +// Retrieval info: PRIVATE: IMPLEMENT_IN_LES NUMERIC "0" +// Retrieval info: PRIVATE: INIT_FILE_LAYOUT STRING "PORT_A" +// Retrieval info: PRIVATE: INIT_TO_SIM_X NUMERIC "0" +// Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "MAX 10" +// Retrieval info: PRIVATE: JTAG_ENABLED NUMERIC "1" +// Retrieval info: PRIVATE: JTAG_ID STRING "ROM0" +// Retrieval info: PRIVATE: MAXIMUM_DEPTH NUMERIC "0" +// Retrieval info: PRIVATE: MIFfilename STRING "boot.hex" +// Retrieval info: PRIVATE: NUMWORDS_A NUMERIC "32768" +// Retrieval info: PRIVATE: RAM_BLOCK_TYPE NUMERIC "0" +// Retrieval info: PRIVATE: RegAddr NUMERIC "1" +// Retrieval info: PRIVATE: RegOutput NUMERIC "0" +// Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING "0" +// Retrieval info: PRIVATE: SingleClock NUMERIC "1" +// Retrieval info: PRIVATE: UseDQRAM NUMERIC "0" +// Retrieval info: PRIVATE: WidthAddr NUMERIC "15" +// Retrieval info: PRIVATE: WidthData NUMERIC "8" +// Retrieval info: PRIVATE: rden NUMERIC "0" +// Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all +// Retrieval info: CONSTANT: ADDRESS_ACLR_A STRING "NONE" +// Retrieval info: CONSTANT: CLOCK_ENABLE_INPUT_A STRING "BYPASS" +// Retrieval info: CONSTANT: CLOCK_ENABLE_OUTPUT_A STRING "BYPASS" +// Retrieval info: CONSTANT: INIT_FILE STRING "boot.hex" +// Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "MAX 10" +// Retrieval info: CONSTANT: LPM_HINT STRING "ENABLE_RUNTIME_MOD=YES,INSTANCE_NAME=ROM0" +// Retrieval info: CONSTANT: LPM_TYPE STRING "altsyncram" +// Retrieval info: CONSTANT: NUMWORDS_A NUMERIC "32768" +// Retrieval info: CONSTANT: OPERATION_MODE STRING "ROM" +// Retrieval info: CONSTANT: OUTDATA_ACLR_A STRING "NONE" +// Retrieval info: CONSTANT: OUTDATA_REG_A STRING "UNREGISTERED" +// Retrieval info: CONSTANT: WIDTHAD_A NUMERIC "15" +// Retrieval info: CONSTANT: WIDTH_A NUMERIC "8" +// Retrieval info: CONSTANT: WIDTH_BYTEENA_A NUMERIC "1" +// Retrieval info: USED_PORT: address 0 0 15 0 INPUT NODEFVAL "address[14..0]" +// Retrieval info: USED_PORT: clock 0 0 0 0 INPUT VCC "clock" +// Retrieval info: USED_PORT: q 0 0 8 0 OUTPUT NODEFVAL "q[7..0]" +// Retrieval info: CONNECT: @address_a 0 0 15 0 address 0 0 15 0 +// Retrieval info: CONNECT: @clock0 0 0 0 0 clock 0 0 0 0 +// Retrieval info: CONNECT: q 0 0 8 0 @q_a 0 0 8 0 +// Retrieval info: GEN_FILE: TYPE_NORMAL rom.v TRUE +// Retrieval info: GEN_FILE: TYPE_NORMAL rom.inc FALSE +// Retrieval info: GEN_FILE: TYPE_NORMAL rom.cmp FALSE +// Retrieval info: GEN_FILE: TYPE_NORMAL rom.bsf FALSE +// Retrieval info: GEN_FILE: TYPE_NORMAL rom_inst.v FALSE +// Retrieval info: GEN_FILE: TYPE_NORMAL rom_bb.v FALSE +// Retrieval info: LIB_FILE: altera_mf diff --git a/hw/fpga/simulation/modelsim/super6502.svo b/hw/fpga/simulation/modelsim/super6502.svo index ef92dcc..39ae070 100644 --- a/hw/fpga/simulation/modelsim/super6502.svo +++ b/hw/fpga/simulation/modelsim/super6502.svo @@ -16,7 +16,7 @@ // PROGRAM "Quartus Prime" // VERSION "Version 18.1.0 Build 625 09/12/2018 SJ Lite Edition" -// DATE "03/05/2022 17:51:02" +// DATE "03/05/2022 18:10:24" // // Device: Altera 10M50DAF484C7G Package FBGA484 @@ -29,6 +29,10 @@ `timescale 1 ps/ 1 ps module super6502 ( + altera_reserved_tms, + altera_reserved_tck, + altera_reserved_tdi, + altera_reserved_tdo, clk, rst, cpu_addr, @@ -45,26 +49,29 @@ module super6502 ( cpu_phi2, cpu_be, cpu_nmib); -input clk; -input rst; -input [15:0] cpu_addr; -output [7:0] cpu_data; -input cpu_vpb; -input cpu_mlb; -input cpu_rwb; -input cpu_sync; -output cpu_led; -output cpu_resb; -output cpu_rdy; -output cpu_sob; -output cpu_irqb; -output cpu_phi2; -output cpu_be; -output cpu_nmib; +input altera_reserved_tms; +input altera_reserved_tck; +input altera_reserved_tdi; +output altera_reserved_tdo; +input reg clk ; +input logic rst ; +input logic [15:0] cpu_addr ; +inout logic [7:0] cpu_data ; +input logic cpu_vpb ; +input logic cpu_mlb ; +input logic cpu_rwb ; +input logic cpu_sync ; +output logic cpu_led ; +output logic cpu_resb ; +output logic cpu_rdy ; +output logic cpu_sob ; +output logic cpu_irqb ; +output logic cpu_phi2 ; +output logic cpu_be ; +output logic cpu_nmib ; // Design Ports Information // rst => Location: PIN_B8, I/O Standard: 2.5 V, Current Strength: Default -// cpu_addr[15] => Location: PIN_AA6, I/O Standard: 2.5 V, Current Strength: Default // cpu_vpb => Location: PIN_W10, I/O Standard: 2.5 V, Current Strength: Default // cpu_mlb => Location: PIN_W7, I/O Standard: 2.5 V, Current Strength: Default // cpu_sync => Location: PIN_AA15, I/O Standard: 2.5 V, Current Strength: Default @@ -85,7 +92,6 @@ output cpu_nmib; // cpu_data[6] => Location: PIN_AA8, I/O Standard: 2.5 V, Current Strength: Default // cpu_data[7] => Location: PIN_AA7, I/O Standard: 2.5 V, Current Strength: Default // clk => Location: PIN_P11, I/O Standard: 2.5 V, Current Strength: Default -// cpu_rwb => Location: PIN_W5, I/O Standard: 2.5 V, Current Strength: Default // cpu_addr[13] => Location: PIN_AB3, I/O Standard: 2.5 V, Current Strength: Default // cpu_addr[14] => Location: PIN_AA5, I/O Standard: 2.5 V, Current Strength: Default // cpu_addr[0] => Location: PIN_W13, I/O Standard: 2.5 V, Current Strength: Default @@ -101,6 +107,12 @@ output cpu_nmib; // cpu_addr[10] => Location: PIN_Y3, I/O Standard: 2.5 V, Current Strength: Default // cpu_addr[11] => Location: PIN_AA2, I/O Standard: 2.5 V, Current Strength: Default // cpu_addr[12] => Location: PIN_AB2, I/O Standard: 2.5 V, Current Strength: Default +// cpu_addr[15] => Location: PIN_AA6, I/O Standard: 2.5 V, Current Strength: Default +// cpu_rwb => Location: PIN_W5, I/O Standard: 2.5 V, Current Strength: Default +// altera_reserved_tms => Location: PIN_H2, I/O Standard: 2.5 V Schmitt Trigger, Current Strength: Default +// altera_reserved_tck => Location: PIN_G2, I/O Standard: 2.5 V Schmitt Trigger, Current Strength: Default +// altera_reserved_tdi => Location: PIN_L4, I/O Standard: 2.5 V Schmitt Trigger, Current Strength: Default +// altera_reserved_tdo => Location: PIN_M5, I/O Standard: 2.5 V, Current Strength: Default wire gnd; @@ -114,38 +126,37 @@ assign unknown = 1'bx; tri1 devclrn; tri1 devpor; tri1 devoe; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][6]~q ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][7]~q ; +wire \auto_hub|~GND~combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~_wirecell_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[0]~_wirecell_combout ; wire \rst~input_o ; -wire \cpu_addr[15]~input_o ; wire \cpu_vpb~input_o ; wire \cpu_mlb~input_o ; wire \cpu_sync~input_o ; wire \~QUARTUS_CREATED_GND~I_combout ; wire \~QUARTUS_CREATED_UNVM~~busy ; +wire \~ALTERA_CONFIG_SEL~~ibuf_o ; +wire \~ALTERA_CONFIG_SEL~~padout ; +wire \~ALTERA_nCONFIG~~ibuf_o ; +wire \~ALTERA_nCONFIG~~padout ; +wire \~ALTERA_nSTATUS~~ibuf_o ; +wire \~ALTERA_nSTATUS~~padout ; +wire \~ALTERA_CONF_DONE~~ibuf_o ; +wire \~ALTERA_CONF_DONE~~padout ; wire \~QUARTUS_CREATED_ADC1~~eoc ; wire \~QUARTUS_CREATED_ADC2~~eoc ; -wire \cpu_data[0]~output_o ; -wire \cpu_data[1]~output_o ; -wire \cpu_data[2]~output_o ; -wire \cpu_data[3]~output_o ; -wire \cpu_data[4]~output_o ; -wire \cpu_data[5]~output_o ; -wire \cpu_data[6]~output_o ; -wire \cpu_data[7]~output_o ; -wire \cpu_led~output_o ; -wire \cpu_resb~output_o ; -wire \cpu_rdy~output_o ; -wire \cpu_sob~output_o ; -wire \cpu_irqb~output_o ; -wire \cpu_phi2~output_o ; -wire \cpu_be~output_o ; -wire \cpu_nmib~output_o ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][6]~feeder_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][7]~feeder_combout ; wire \clk~input_o ; wire \clk~inputclkctrl_outclk ; wire \cpu_addr[13]~input_o ; -wire \cpu_addr[14]~input_o ; +wire \cpu_addr[15]~input_o ; wire \cpu_rwb~input_o ; -wire \main_memory|altsyncram_component|auto_generated|decode3|w_anode236w[2]~0_combout ; -wire \main_memory|altsyncram_component|auto_generated|rden_decode|w_anode275w[2]~0_combout ; +wire \cpu_addr[14]~input_o ; +wire \main_memory|altsyncram_component|auto_generated|decode3|w_anode244w[2]~0_combout ; +wire \main_memory|altsyncram_component|auto_generated|rden_decode|w_anode284w[2]~1_combout ; wire \cpu_data[0]~input_o ; wire \cpu_addr[0]~input_o ; wire \cpu_addr[1]~input_o ; @@ -160,108 +171,593 @@ wire \cpu_addr[9]~input_o ; wire \cpu_addr[10]~input_o ; wire \cpu_addr[11]~input_o ; wire \cpu_addr[12]~input_o ; -wire \main_memory|altsyncram_component|auto_generated|ram_block1a8~portadataout ; +wire \main_memory|altsyncram_component|auto_generated|ram_block1a16~portadataout ; +wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a[1]~feeder_combout ; wire \main_memory|altsyncram_component|auto_generated|rden_decode|w_anode261w[2]~0_combout ; wire \main_memory|altsyncram_component|auto_generated|ram_block1a0~portadataout ; -wire \main_memory|altsyncram_component|auto_generated|decode3|w_anode244w[2]~0_combout ; +wire \main_memory|altsyncram_component|auto_generated|mux2|result_node[0]~2_combout ; +wire \main_memory|altsyncram_component|auto_generated|decode3|w_anode236w[2]~0_combout ; wire \main_memory|altsyncram_component|auto_generated|rden_decode|w_anode284w[2]~0_combout ; -wire \main_memory|altsyncram_component|auto_generated|ram_block1a16~portadataout ; -wire \main_memory|altsyncram_component|auto_generated|mux2|result_node[0]~0_combout ; +wire \main_memory|altsyncram_component|auto_generated|ram_block1a8~portadataout ; wire \main_memory|altsyncram_component|auto_generated|decode3|w_anode252w[2]~0_combout ; -wire \main_memory|altsyncram_component|auto_generated|rden_decode|w_anode293w[2]~0_combout ; +wire \main_memory|altsyncram_component|auto_generated|rden_decode|w_anode284w[2]~2_combout ; wire \main_memory|altsyncram_component|auto_generated|ram_block1a24~portadataout ; +wire \main_memory|altsyncram_component|auto_generated|mux2|result_node[0]~3_combout ; +wire \altera_reserved_tms~input_o ; +wire \altera_reserved_tck~input_o ; +wire \altera_reserved_tdi~input_o ; +wire \altera_internal_jtag~TMSUTAP ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~6_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~7_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~8_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[8]~feeder_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena_proc~1_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt~1_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt~2_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt~0_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~0_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~9_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~10_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~11_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~12_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~13_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_dr_scan_proc~0_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[15]~feeder_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~1_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~2_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~3_combout ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[0]~15_combout ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[0]~16 ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[1]~18_combout ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[1]~19 ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[2]~20_combout ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[2]~21 ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[3]~22_combout ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[3]~23 ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[4]~24_combout ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[4]~25 ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[5]~26_combout ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[5]~27 ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[6]~28_combout ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[6]~29 ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[7]~30_combout ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[7]~31 ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[8]~32_combout ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[8]~33 ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[9]~34_combout ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[9]~35 ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[10]~36_combout ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[10]~37 ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[11]~38_combout ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[11]~39 ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[12]~40_combout ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[12]~41 ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[13]~42_combout ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[13]~43 ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[14]~44_combout ; +wire \altera_internal_jtag~TDIUTAP ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~0_combout ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[1]~feeder_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~0_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[6]~feeder_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[4]~feeder_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[3]~feeder_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[2]~0_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[1]~feeder_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[0]~1_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Equal0~1_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Equal0~0_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Equal1~0_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|reset_ena_reg_proc~0_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|reset_ena_reg~feeder_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|reset_ena_reg~q ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[1]~2_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~4_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~5_combout ; +wire \~QIC_CREATED_GND~I_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[1]~1_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[2]~0_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[1]~3_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[2]~4_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[2]~5_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg_proc~0_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~1_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[2]~2_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg~6_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[3]~7_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[3]~8_combout ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[2]~feeder_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[3]~6_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[3]~9_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~0_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][3]~q ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena_proc~0_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Equal0~2_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_dr_scan_reg~q ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena~2_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena~0_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena~1_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena~3_combout ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~1_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~13_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~12_combout ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[4]~feeder_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~11_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~10_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][4]~feeder_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][4]~q ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|is_in_use_reg~0_combout ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|is_in_use_reg~q ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~3_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~q ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~4_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][2]~feeder_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][2]~q ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_incr_addr~2_combout ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_incr_addr~0_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][1]~q ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~3_combout ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg[1]~0_combout ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg[0]~2_combout ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg[2]~1_combout ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_incr_addr~1_combout ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[0]~17_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~4_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_bypass_reg~0_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_bypass_reg~q ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~9_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~10_combout ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|clear_signal~combout ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[0]~5_combout ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[0]~6 ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[1]~7_combout ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[4]~12_combout ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[1]~8 ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[2]~9_combout ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~7_combout ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[2]~10 ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[3]~13_combout ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[3]~14 ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[4]~15_combout ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~3_combout ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[4]~11_combout ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~11_combout ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~12_combout ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~14_combout ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~15_combout ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~0_combout ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~16_combout ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~17_combout ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~18_combout ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR[3]~6_combout ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~13_combout ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~8_combout ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~9_combout ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~10_combout ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~2_combout ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~1_combout ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~4_combout ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~5_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][5]~q ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|bypass_reg_out~0_combout ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|bypass_reg_out~q ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|adapted_tdo~0_combout ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~2_combout ; +wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode236w[2]~0_combout ; +wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12~PORTBDATAOUT0 ; +wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b[0]~feeder_combout ; +wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode252w[2]~0_combout ; +wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28~PORTBDATAOUT0 ; +wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode223w[2]~0_combout ; +wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4~PORTBDATAOUT0 ; +wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode244w[2]~0_combout ; +wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20~PORTBDATAOUT0 ; +wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[4]~8_combout ; +wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[4]~9_combout ; +wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14~PORTBDATAOUT0 ; +wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30~PORTBDATAOUT0 ; +wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6~PORTBDATAOUT0 ; +wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22~PORTBDATAOUT0 ; +wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[6]~12_combout ; +wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[6]~13_combout ; +wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23~PORTBDATAOUT0 ; +wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31~PORTBDATAOUT0 ; +wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15~PORTBDATAOUT0 ; +wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7~PORTBDATAOUT0 ; +wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[7]~14_combout ; +wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[7]~15_combout ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~26_combout ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[6]~19_combout ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~25_combout ; +wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21~PORTBDATAOUT0 ; +wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13~PORTBDATAOUT0 ; +wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5~PORTBDATAOUT0 ; +wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[5]~10_combout ; +wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29~PORTBDATAOUT0 ; +wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[5]~11_combout ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~24_combout ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~23_combout ; +wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19~PORTBDATAOUT0 ; +wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27~PORTBDATAOUT0 ; +wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11~PORTBDATAOUT0 ; +wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3~PORTBDATAOUT0 ; +wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[3]~6_combout ; +wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[3]~7_combout ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~22_combout ; +wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26~PORTBDATAOUT0 ; +wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10~PORTBDATAOUT0 ; +wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2~PORTBDATAOUT0 ; +wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18~PORTBDATAOUT0 ; +wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[2]~4_combout ; +wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[2]~5_combout ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~21_combout ; +wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25~PORTBDATAOUT0 ; +wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9~PORTBDATAOUT0 ; +wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1~PORTBDATAOUT0 ; +wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[1]~2_combout ; +wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17~PORTBDATAOUT0 ; +wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[1]~3_combout ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~20_combout ; +wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16~PORTBDATAOUT0 ; +wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0~PORTBDATAOUT0 ; +wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[0]~0_combout ; +wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8~PORTBDATAOUT0 ; +wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24~PORTBDATAOUT0 ; +wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[0]~1_combout ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~18_combout ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|adapted_tdo~1_combout ; +wire \boot_rom|altsyncram_component|auto_generated|mgl_prim2|adapted_tdo~2_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~7_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~12_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~2_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg_ena~0_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|clear_signal~combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~11_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~12 ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[1]~14_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~23_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[1]~15 ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[2]~16_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[2]~17 ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[3]~18_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[3]~19 ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[4]~20_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~13_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~22_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~6_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~9_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~10_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~11_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR[1]~12_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~8_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~7_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~4_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~5_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg~3_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg~2_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg~1_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg~0_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~3_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~4_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~5_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[0]~7_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[2]~14 ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[3]~15_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[1]~10_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[3]~16 ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[4]~17_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[1]~9_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[1]~19_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[0]~8 ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[1]~11_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[1]~12 ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[2]~13_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~13_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~14_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[1]~4_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[1]~5_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[3]~feeder_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[0]~0_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[0]~1_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[2]~feeder_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[1]~feeder_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[0]~feeder_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[0]~feeder_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[0]~0_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[0]~0_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[1]~feeder_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~6_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~7_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[1]~1_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~11_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~12_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[2]~feeder_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[2]~2_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[3]~feeder_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~8_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~9_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~10_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[3]~3_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_proc~0_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg_ena~combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~6_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~8_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~11_combout ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo~q ; +wire \altera_internal_jtag~TCKUTAP ; +wire \altera_internal_jtag~TCKUTAPclkctrl_outclk ; +wire \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~5_combout ; +wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8~portadataout ; +wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0~portadataout ; +wire \main_memory|altsyncram_component|auto_generated|mux2|result_node[0]~0_combout ; +wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24~portadataout ; +wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16~portadataout ; wire \main_memory|altsyncram_component|auto_generated|mux2|result_node[0]~1_combout ; +wire \main_memory|altsyncram_component|auto_generated|mux2|result_node[0]~4_combout ; wire \cpu_data[1]~input_o ; -wire \main_memory|altsyncram_component|auto_generated|ram_block1a25~portadataout ; wire \main_memory|altsyncram_component|auto_generated|ram_block1a1~portadataout ; -wire \main_memory|altsyncram_component|auto_generated|ram_block1a9~portadataout ; -wire \main_memory|altsyncram_component|auto_generated|mux2|result_node[1]~2_combout ; wire \main_memory|altsyncram_component|auto_generated|ram_block1a17~portadataout ; -wire \main_memory|altsyncram_component|auto_generated|mux2|result_node[1]~3_combout ; +wire \main_memory|altsyncram_component|auto_generated|mux2|result_node[1]~7_combout ; +wire \main_memory|altsyncram_component|auto_generated|ram_block1a25~portadataout ; +wire \main_memory|altsyncram_component|auto_generated|ram_block1a9~portadataout ; +wire \main_memory|altsyncram_component|auto_generated|mux2|result_node[1]~8_combout ; +wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1~portadataout ; +wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9~portadataout ; +wire \main_memory|altsyncram_component|auto_generated|mux2|result_node[1]~5_combout ; +wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17~portadataout ; +wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25~portadataout ; +wire \main_memory|altsyncram_component|auto_generated|mux2|result_node[1]~6_combout ; +wire \main_memory|altsyncram_component|auto_generated|mux2|result_node[1]~9_combout ; wire \cpu_data[2]~input_o ; -wire \main_memory|altsyncram_component|auto_generated|ram_block1a18~portadataout ; -wire \main_memory|altsyncram_component|auto_generated|ram_block1a2~portadataout ; -wire \main_memory|altsyncram_component|auto_generated|mux2|result_node[2]~4_combout ; wire \main_memory|altsyncram_component|auto_generated|ram_block1a26~portadataout ; wire \main_memory|altsyncram_component|auto_generated|ram_block1a10~portadataout ; -wire \main_memory|altsyncram_component|auto_generated|mux2|result_node[2]~5_combout ; +wire \main_memory|altsyncram_component|auto_generated|ram_block1a18~portadataout ; +wire \main_memory|altsyncram_component|auto_generated|ram_block1a2~portadataout ; +wire \main_memory|altsyncram_component|auto_generated|mux2|result_node[2]~12_combout ; +wire \main_memory|altsyncram_component|auto_generated|mux2|result_node[2]~13_combout ; +wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2~portadataout ; +wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10~portadataout ; +wire \main_memory|altsyncram_component|auto_generated|mux2|result_node[2]~10_combout ; +wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18~portadataout ; +wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26~portadataout ; +wire \main_memory|altsyncram_component|auto_generated|mux2|result_node[2]~11_combout ; +wire \main_memory|altsyncram_component|auto_generated|mux2|result_node[2]~14_combout ; wire \cpu_data[3]~input_o ; wire \main_memory|altsyncram_component|auto_generated|ram_block1a3~portadataout ; -wire \main_memory|altsyncram_component|auto_generated|ram_block1a11~portadataout ; -wire \main_memory|altsyncram_component|auto_generated|mux2|result_node[3]~6_combout ; wire \main_memory|altsyncram_component|auto_generated|ram_block1a19~portadataout ; +wire \main_memory|altsyncram_component|auto_generated|mux2|result_node[3]~17_combout ; +wire \main_memory|altsyncram_component|auto_generated|ram_block1a11~portadataout ; wire \main_memory|altsyncram_component|auto_generated|ram_block1a27~portadataout ; -wire \main_memory|altsyncram_component|auto_generated|mux2|result_node[3]~7_combout ; +wire \main_memory|altsyncram_component|auto_generated|mux2|result_node[3]~18_combout ; +wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19~portadataout ; +wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27~portadataout ; +wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3~portadataout ; +wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11~portadataout ; +wire \main_memory|altsyncram_component|auto_generated|mux2|result_node[3]~15_combout ; +wire \main_memory|altsyncram_component|auto_generated|mux2|result_node[3]~16_combout ; +wire \main_memory|altsyncram_component|auto_generated|mux2|result_node[3]~19_combout ; wire \cpu_data[4]~input_o ; -wire \main_memory|altsyncram_component|auto_generated|ram_block1a12~portadataout ; wire \main_memory|altsyncram_component|auto_generated|ram_block1a28~portadataout ; +wire \main_memory|altsyncram_component|auto_generated|ram_block1a12~portadataout ; wire \main_memory|altsyncram_component|auto_generated|ram_block1a4~portadataout ; wire \main_memory|altsyncram_component|auto_generated|ram_block1a20~portadataout ; -wire \main_memory|altsyncram_component|auto_generated|mux2|result_node[4]~8_combout ; -wire \main_memory|altsyncram_component|auto_generated|mux2|result_node[4]~9_combout ; +wire \main_memory|altsyncram_component|auto_generated|mux2|result_node[4]~22_combout ; +wire \main_memory|altsyncram_component|auto_generated|mux2|result_node[4]~23_combout ; +wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20~portadataout ; +wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28~portadataout ; +wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12~portadataout ; +wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4~portadataout ; +wire \main_memory|altsyncram_component|auto_generated|mux2|result_node[4]~20_combout ; +wire \main_memory|altsyncram_component|auto_generated|mux2|result_node[4]~21_combout ; +wire \main_memory|altsyncram_component|auto_generated|mux2|result_node[4]~24_combout ; wire \cpu_data[5]~input_o ; wire \main_memory|altsyncram_component|auto_generated|ram_block1a5~portadataout ; -wire \main_memory|altsyncram_component|auto_generated|ram_block1a13~portadataout ; -wire \main_memory|altsyncram_component|auto_generated|mux2|result_node[5]~10_combout ; -wire \main_memory|altsyncram_component|auto_generated|ram_block1a29~portadataout ; wire \main_memory|altsyncram_component|auto_generated|ram_block1a21~portadataout ; -wire \main_memory|altsyncram_component|auto_generated|mux2|result_node[5]~11_combout ; +wire \main_memory|altsyncram_component|auto_generated|mux2|result_node[5]~27_combout ; +wire \main_memory|altsyncram_component|auto_generated|ram_block1a13~portadataout ; +wire \main_memory|altsyncram_component|auto_generated|ram_block1a29~portadataout ; +wire \main_memory|altsyncram_component|auto_generated|mux2|result_node[5]~28_combout ; +wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21~portadataout ; +wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13~portadataout ; +wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5~portadataout ; +wire \main_memory|altsyncram_component|auto_generated|mux2|result_node[5]~25_combout ; +wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29~portadataout ; +wire \main_memory|altsyncram_component|auto_generated|mux2|result_node[5]~26_combout ; +wire \main_memory|altsyncram_component|auto_generated|mux2|result_node[5]~29_combout ; wire \cpu_data[6]~input_o ; -wire \main_memory|altsyncram_component|auto_generated|ram_block1a22~portadataout ; wire \main_memory|altsyncram_component|auto_generated|ram_block1a6~portadataout ; -wire \main_memory|altsyncram_component|auto_generated|mux2|result_node[6]~12_combout ; +wire \main_memory|altsyncram_component|auto_generated|ram_block1a22~portadataout ; +wire \main_memory|altsyncram_component|auto_generated|mux2|result_node[6]~32_combout ; wire \main_memory|altsyncram_component|auto_generated|ram_block1a14~portadataout ; wire \main_memory|altsyncram_component|auto_generated|ram_block1a30~portadataout ; -wire \main_memory|altsyncram_component|auto_generated|mux2|result_node[6]~13_combout ; +wire \main_memory|altsyncram_component|auto_generated|mux2|result_node[6]~33_combout ; +wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22~portadataout ; +wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6~portadataout ; +wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14~portadataout ; +wire \main_memory|altsyncram_component|auto_generated|mux2|result_node[6]~30_combout ; +wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30~portadataout ; +wire \main_memory|altsyncram_component|auto_generated|mux2|result_node[6]~31_combout ; +wire \main_memory|altsyncram_component|auto_generated|mux2|result_node[6]~34_combout ; wire \cpu_data[7]~input_o ; -wire \main_memory|altsyncram_component|auto_generated|ram_block1a7~portadataout ; -wire \main_memory|altsyncram_component|auto_generated|ram_block1a15~portadataout ; -wire \main_memory|altsyncram_component|auto_generated|mux2|result_node[7]~14_combout ; -wire \main_memory|altsyncram_component|auto_generated|ram_block1a23~portadataout ; wire \main_memory|altsyncram_component|auto_generated|ram_block1a31~portadataout ; -wire \main_memory|altsyncram_component|auto_generated|mux2|result_node[7]~15_combout ; -wire \clk_count[1]~1_combout ; +wire \main_memory|altsyncram_component|auto_generated|ram_block1a23~portadataout ; +wire \main_memory|altsyncram_component|auto_generated|ram_block1a7~portadataout ; +wire \main_memory|altsyncram_component|auto_generated|mux2|result_node[7]~37_combout ; +wire \main_memory|altsyncram_component|auto_generated|ram_block1a15~portadataout ; +wire \main_memory|altsyncram_component|auto_generated|mux2|result_node[7]~38_combout ; +wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31~portadataout ; +wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23~portadataout ; +wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15~portadataout ; +wire \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7~portadataout ; +wire \main_memory|altsyncram_component|auto_generated|mux2|result_node[7]~35_combout ; +wire \main_memory|altsyncram_component|auto_generated|mux2|result_node[7]~36_combout ; +wire \main_memory|altsyncram_component|auto_generated|mux2|result_node[7]~39_combout ; wire \clk_count~2_combout ; wire \clk_count~0_combout ; +wire \clk_count[1]~1_combout ; wire \cpu_phi2~0_combout ; wire \cpu_phi2~reg0_q ; -wire [1:0] \main_memory|altsyncram_component|auto_generated|address_reg_a ; -wire [2:0] \main_memory|altsyncram_component|auto_generated|decode3|w_anode223w ; +wire \altera_internal_jtag~TDO ; +wire [9:0] \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg ; +wire [2:0] \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg ; +wire [3:0] \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg ; +wire [2:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode244w ; +wire [14:0] \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg ; +wire [2:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode252w ; +wire [30:0] \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|splitter_nodes_receive_0 ; +wire [3:0] \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg ; wire [2:0] clk_count; +wire [15:0] \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state ; +wire [7:0] \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg ; +wire [8:0] \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg ; +wire [1:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b ; +wire [2:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode223w ; +wire [3:0] \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg ; +wire [3:0] \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR ; +wire [0:0] \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_tdo_sel_reg ; +wire [2:0] \main_memory|altsyncram_component|auto_generated|decode3|w_anode223w ; +wire [4:0] \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter ; +wire [6:0] \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg ; +wire [3:0] \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata ; +wire [3:0] \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg ; +wire [2:0] \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt ; +wire [4:0] \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter ; +wire [2:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode236w ; +wire [1:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a ; +wire [4:0] \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal ; +wire [3:0] \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR ; +wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8_PORTADATAOUT_bus ; +wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8_PORTBDATAOUT_bus ; +wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16_PORTADATAOUT_bus ; +wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16_PORTBDATAOUT_bus ; +wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0_PORTADATAOUT_bus ; +wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0_PORTBDATAOUT_bus ; +wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24_PORTADATAOUT_bus ; +wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24_PORTBDATAOUT_bus ; +wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17_PORTADATAOUT_bus ; +wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17_PORTBDATAOUT_bus ; +wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9_PORTADATAOUT_bus ; +wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9_PORTBDATAOUT_bus ; +wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1_PORTADATAOUT_bus ; +wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1_PORTBDATAOUT_bus ; +wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25_PORTADATAOUT_bus ; +wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25_PORTBDATAOUT_bus ; wire [0:0] \main_memory|altsyncram_component|auto_generated|ram_block1a8_PORTADATAOUT_bus ; wire [0:0] \main_memory|altsyncram_component|auto_generated|ram_block1a16_PORTADATAOUT_bus ; wire [0:0] \main_memory|altsyncram_component|auto_generated|ram_block1a0_PORTADATAOUT_bus ; wire [0:0] \main_memory|altsyncram_component|auto_generated|ram_block1a24_PORTADATAOUT_bus ; -wire [0:0] \main_memory|altsyncram_component|auto_generated|ram_block1a17_PORTADATAOUT_bus ; wire [0:0] \main_memory|altsyncram_component|auto_generated|ram_block1a9_PORTADATAOUT_bus ; +wire [0:0] \main_memory|altsyncram_component|auto_generated|ram_block1a17_PORTADATAOUT_bus ; wire [0:0] \main_memory|altsyncram_component|auto_generated|ram_block1a1_PORTADATAOUT_bus ; wire [0:0] \main_memory|altsyncram_component|auto_generated|ram_block1a25_PORTADATAOUT_bus ; +wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18_PORTADATAOUT_bus ; +wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18_PORTBDATAOUT_bus ; +wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10_PORTADATAOUT_bus ; +wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10_PORTBDATAOUT_bus ; +wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2_PORTADATAOUT_bus ; +wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2_PORTBDATAOUT_bus ; +wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26_PORTADATAOUT_bus ; +wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26_PORTBDATAOUT_bus ; wire [0:0] \main_memory|altsyncram_component|auto_generated|ram_block1a10_PORTADATAOUT_bus ; wire [0:0] \main_memory|altsyncram_component|auto_generated|ram_block1a18_PORTADATAOUT_bus ; wire [0:0] \main_memory|altsyncram_component|auto_generated|ram_block1a2_PORTADATAOUT_bus ; wire [0:0] \main_memory|altsyncram_component|auto_generated|ram_block1a26_PORTADATAOUT_bus ; -wire [0:0] \main_memory|altsyncram_component|auto_generated|ram_block1a19_PORTADATAOUT_bus ; +wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19_PORTADATAOUT_bus ; +wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19_PORTBDATAOUT_bus ; +wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11_PORTADATAOUT_bus ; +wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11_PORTBDATAOUT_bus ; +wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3_PORTADATAOUT_bus ; +wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3_PORTBDATAOUT_bus ; +wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27_PORTADATAOUT_bus ; +wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27_PORTBDATAOUT_bus ; wire [0:0] \main_memory|altsyncram_component|auto_generated|ram_block1a11_PORTADATAOUT_bus ; +wire [0:0] \main_memory|altsyncram_component|auto_generated|ram_block1a19_PORTADATAOUT_bus ; wire [0:0] \main_memory|altsyncram_component|auto_generated|ram_block1a3_PORTADATAOUT_bus ; wire [0:0] \main_memory|altsyncram_component|auto_generated|ram_block1a27_PORTADATAOUT_bus ; +wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20_PORTADATAOUT_bus ; +wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20_PORTBDATAOUT_bus ; +wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12_PORTADATAOUT_bus ; +wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12_PORTBDATAOUT_bus ; +wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4_PORTADATAOUT_bus ; +wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4_PORTBDATAOUT_bus ; +wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28_PORTADATAOUT_bus ; +wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28_PORTBDATAOUT_bus ; wire [0:0] \main_memory|altsyncram_component|auto_generated|ram_block1a12_PORTADATAOUT_bus ; wire [0:0] \main_memory|altsyncram_component|auto_generated|ram_block1a20_PORTADATAOUT_bus ; wire [0:0] \main_memory|altsyncram_component|auto_generated|ram_block1a4_PORTADATAOUT_bus ; wire [0:0] \main_memory|altsyncram_component|auto_generated|ram_block1a28_PORTADATAOUT_bus ; -wire [0:0] \main_memory|altsyncram_component|auto_generated|ram_block1a21_PORTADATAOUT_bus ; +wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21_PORTADATAOUT_bus ; +wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21_PORTBDATAOUT_bus ; +wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13_PORTADATAOUT_bus ; +wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13_PORTBDATAOUT_bus ; +wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5_PORTADATAOUT_bus ; +wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5_PORTBDATAOUT_bus ; +wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29_PORTADATAOUT_bus ; +wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29_PORTBDATAOUT_bus ; wire [0:0] \main_memory|altsyncram_component|auto_generated|ram_block1a13_PORTADATAOUT_bus ; +wire [0:0] \main_memory|altsyncram_component|auto_generated|ram_block1a21_PORTADATAOUT_bus ; wire [0:0] \main_memory|altsyncram_component|auto_generated|ram_block1a5_PORTADATAOUT_bus ; wire [0:0] \main_memory|altsyncram_component|auto_generated|ram_block1a29_PORTADATAOUT_bus ; +wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22_PORTADATAOUT_bus ; +wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22_PORTBDATAOUT_bus ; +wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14_PORTADATAOUT_bus ; +wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14_PORTBDATAOUT_bus ; +wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6_PORTADATAOUT_bus ; +wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6_PORTBDATAOUT_bus ; +wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30_PORTADATAOUT_bus ; +wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30_PORTBDATAOUT_bus ; wire [0:0] \main_memory|altsyncram_component|auto_generated|ram_block1a14_PORTADATAOUT_bus ; wire [0:0] \main_memory|altsyncram_component|auto_generated|ram_block1a22_PORTADATAOUT_bus ; wire [0:0] \main_memory|altsyncram_component|auto_generated|ram_block1a6_PORTADATAOUT_bus ; wire [0:0] \main_memory|altsyncram_component|auto_generated|ram_block1a30_PORTADATAOUT_bus ; -wire [0:0] \main_memory|altsyncram_component|auto_generated|ram_block1a23_PORTADATAOUT_bus ; +wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23_PORTADATAOUT_bus ; +wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23_PORTBDATAOUT_bus ; +wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15_PORTADATAOUT_bus ; +wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15_PORTBDATAOUT_bus ; +wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7_PORTADATAOUT_bus ; +wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7_PORTBDATAOUT_bus ; +wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31_PORTADATAOUT_bus ; +wire [0:0] \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31_PORTBDATAOUT_bus ; wire [0:0] \main_memory|altsyncram_component|auto_generated|ram_block1a15_PORTADATAOUT_bus ; +wire [0:0] \main_memory|altsyncram_component|auto_generated|ram_block1a23_PORTADATAOUT_bus ; wire [0:0] \main_memory|altsyncram_component|auto_generated|ram_block1a7_PORTADATAOUT_bus ; wire [0:0] \main_memory|altsyncram_component|auto_generated|ram_block1a31_PORTADATAOUT_bus ; +assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8~portadataout = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8_PORTADATAOUT_bus [0]; + +assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8~PORTBDATAOUT0 = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8_PORTBDATAOUT_bus [0]; + +assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16~portadataout = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16_PORTADATAOUT_bus [0]; + +assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16~PORTBDATAOUT0 = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16_PORTBDATAOUT_bus [0]; + +assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0~portadataout = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0_PORTADATAOUT_bus [0]; + +assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0~PORTBDATAOUT0 = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0_PORTBDATAOUT_bus [0]; + +assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24~portadataout = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24_PORTADATAOUT_bus [0]; + +assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24~PORTBDATAOUT0 = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24_PORTBDATAOUT_bus [0]; + +assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17~portadataout = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17_PORTADATAOUT_bus [0]; + +assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17~PORTBDATAOUT0 = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17_PORTBDATAOUT_bus [0]; + +assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9~portadataout = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9_PORTADATAOUT_bus [0]; + +assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9~PORTBDATAOUT0 = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9_PORTBDATAOUT_bus [0]; + +assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1~portadataout = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1_PORTADATAOUT_bus [0]; + +assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1~PORTBDATAOUT0 = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1_PORTBDATAOUT_bus [0]; + +assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25~portadataout = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25_PORTADATAOUT_bus [0]; + +assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25~PORTBDATAOUT0 = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25_PORTBDATAOUT_bus [0]; + assign \main_memory|altsyncram_component|auto_generated|ram_block1a8~portadataout = \main_memory|altsyncram_component|auto_generated|ram_block1a8_PORTADATAOUT_bus [0]; assign \main_memory|altsyncram_component|auto_generated|ram_block1a16~portadataout = \main_memory|altsyncram_component|auto_generated|ram_block1a16_PORTADATAOUT_bus [0]; @@ -270,14 +766,30 @@ assign \main_memory|altsyncram_component|auto_generated|ram_block1a0~portadataou assign \main_memory|altsyncram_component|auto_generated|ram_block1a24~portadataout = \main_memory|altsyncram_component|auto_generated|ram_block1a24_PORTADATAOUT_bus [0]; -assign \main_memory|altsyncram_component|auto_generated|ram_block1a17~portadataout = \main_memory|altsyncram_component|auto_generated|ram_block1a17_PORTADATAOUT_bus [0]; - assign \main_memory|altsyncram_component|auto_generated|ram_block1a9~portadataout = \main_memory|altsyncram_component|auto_generated|ram_block1a9_PORTADATAOUT_bus [0]; +assign \main_memory|altsyncram_component|auto_generated|ram_block1a17~portadataout = \main_memory|altsyncram_component|auto_generated|ram_block1a17_PORTADATAOUT_bus [0]; + assign \main_memory|altsyncram_component|auto_generated|ram_block1a1~portadataout = \main_memory|altsyncram_component|auto_generated|ram_block1a1_PORTADATAOUT_bus [0]; assign \main_memory|altsyncram_component|auto_generated|ram_block1a25~portadataout = \main_memory|altsyncram_component|auto_generated|ram_block1a25_PORTADATAOUT_bus [0]; +assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18~portadataout = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18_PORTADATAOUT_bus [0]; + +assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18~PORTBDATAOUT0 = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18_PORTBDATAOUT_bus [0]; + +assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10~portadataout = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10_PORTADATAOUT_bus [0]; + +assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10~PORTBDATAOUT0 = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10_PORTBDATAOUT_bus [0]; + +assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2~portadataout = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2_PORTADATAOUT_bus [0]; + +assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2~PORTBDATAOUT0 = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2_PORTBDATAOUT_bus [0]; + +assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26~portadataout = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26_PORTADATAOUT_bus [0]; + +assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26~PORTBDATAOUT0 = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26_PORTBDATAOUT_bus [0]; + assign \main_memory|altsyncram_component|auto_generated|ram_block1a10~portadataout = \main_memory|altsyncram_component|auto_generated|ram_block1a10_PORTADATAOUT_bus [0]; assign \main_memory|altsyncram_component|auto_generated|ram_block1a18~portadataout = \main_memory|altsyncram_component|auto_generated|ram_block1a18_PORTADATAOUT_bus [0]; @@ -286,14 +798,46 @@ assign \main_memory|altsyncram_component|auto_generated|ram_block1a2~portadataou assign \main_memory|altsyncram_component|auto_generated|ram_block1a26~portadataout = \main_memory|altsyncram_component|auto_generated|ram_block1a26_PORTADATAOUT_bus [0]; -assign \main_memory|altsyncram_component|auto_generated|ram_block1a19~portadataout = \main_memory|altsyncram_component|auto_generated|ram_block1a19_PORTADATAOUT_bus [0]; +assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19~portadataout = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19_PORTADATAOUT_bus [0]; + +assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19~PORTBDATAOUT0 = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19_PORTBDATAOUT_bus [0]; + +assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11~portadataout = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11_PORTADATAOUT_bus [0]; + +assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11~PORTBDATAOUT0 = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11_PORTBDATAOUT_bus [0]; + +assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3~portadataout = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3_PORTADATAOUT_bus [0]; + +assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3~PORTBDATAOUT0 = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3_PORTBDATAOUT_bus [0]; + +assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27~portadataout = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27_PORTADATAOUT_bus [0]; + +assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27~PORTBDATAOUT0 = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27_PORTBDATAOUT_bus [0]; assign \main_memory|altsyncram_component|auto_generated|ram_block1a11~portadataout = \main_memory|altsyncram_component|auto_generated|ram_block1a11_PORTADATAOUT_bus [0]; +assign \main_memory|altsyncram_component|auto_generated|ram_block1a19~portadataout = \main_memory|altsyncram_component|auto_generated|ram_block1a19_PORTADATAOUT_bus [0]; + assign \main_memory|altsyncram_component|auto_generated|ram_block1a3~portadataout = \main_memory|altsyncram_component|auto_generated|ram_block1a3_PORTADATAOUT_bus [0]; assign \main_memory|altsyncram_component|auto_generated|ram_block1a27~portadataout = \main_memory|altsyncram_component|auto_generated|ram_block1a27_PORTADATAOUT_bus [0]; +assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20~portadataout = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20_PORTADATAOUT_bus [0]; + +assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20~PORTBDATAOUT0 = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20_PORTBDATAOUT_bus [0]; + +assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12~portadataout = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12_PORTADATAOUT_bus [0]; + +assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12~PORTBDATAOUT0 = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12_PORTBDATAOUT_bus [0]; + +assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4~portadataout = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4_PORTADATAOUT_bus [0]; + +assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4~PORTBDATAOUT0 = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4_PORTBDATAOUT_bus [0]; + +assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28~portadataout = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28_PORTADATAOUT_bus [0]; + +assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28~PORTBDATAOUT0 = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28_PORTBDATAOUT_bus [0]; + assign \main_memory|altsyncram_component|auto_generated|ram_block1a12~portadataout = \main_memory|altsyncram_component|auto_generated|ram_block1a12_PORTADATAOUT_bus [0]; assign \main_memory|altsyncram_component|auto_generated|ram_block1a20~portadataout = \main_memory|altsyncram_component|auto_generated|ram_block1a20_PORTADATAOUT_bus [0]; @@ -302,14 +846,46 @@ assign \main_memory|altsyncram_component|auto_generated|ram_block1a4~portadataou assign \main_memory|altsyncram_component|auto_generated|ram_block1a28~portadataout = \main_memory|altsyncram_component|auto_generated|ram_block1a28_PORTADATAOUT_bus [0]; -assign \main_memory|altsyncram_component|auto_generated|ram_block1a21~portadataout = \main_memory|altsyncram_component|auto_generated|ram_block1a21_PORTADATAOUT_bus [0]; +assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21~portadataout = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21_PORTADATAOUT_bus [0]; + +assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21~PORTBDATAOUT0 = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21_PORTBDATAOUT_bus [0]; + +assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13~portadataout = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13_PORTADATAOUT_bus [0]; + +assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13~PORTBDATAOUT0 = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13_PORTBDATAOUT_bus [0]; + +assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5~portadataout = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5_PORTADATAOUT_bus [0]; + +assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5~PORTBDATAOUT0 = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5_PORTBDATAOUT_bus [0]; + +assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29~portadataout = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29_PORTADATAOUT_bus [0]; + +assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29~PORTBDATAOUT0 = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29_PORTBDATAOUT_bus [0]; assign \main_memory|altsyncram_component|auto_generated|ram_block1a13~portadataout = \main_memory|altsyncram_component|auto_generated|ram_block1a13_PORTADATAOUT_bus [0]; +assign \main_memory|altsyncram_component|auto_generated|ram_block1a21~portadataout = \main_memory|altsyncram_component|auto_generated|ram_block1a21_PORTADATAOUT_bus [0]; + assign \main_memory|altsyncram_component|auto_generated|ram_block1a5~portadataout = \main_memory|altsyncram_component|auto_generated|ram_block1a5_PORTADATAOUT_bus [0]; assign \main_memory|altsyncram_component|auto_generated|ram_block1a29~portadataout = \main_memory|altsyncram_component|auto_generated|ram_block1a29_PORTADATAOUT_bus [0]; +assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22~portadataout = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22_PORTADATAOUT_bus [0]; + +assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22~PORTBDATAOUT0 = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22_PORTBDATAOUT_bus [0]; + +assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14~portadataout = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14_PORTADATAOUT_bus [0]; + +assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14~PORTBDATAOUT0 = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14_PORTBDATAOUT_bus [0]; + +assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6~portadataout = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6_PORTADATAOUT_bus [0]; + +assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6~PORTBDATAOUT0 = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6_PORTBDATAOUT_bus [0]; + +assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30~portadataout = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30_PORTADATAOUT_bus [0]; + +assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30~PORTBDATAOUT0 = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30_PORTBDATAOUT_bus [0]; + assign \main_memory|altsyncram_component|auto_generated|ram_block1a14~portadataout = \main_memory|altsyncram_component|auto_generated|ram_block1a14_PORTADATAOUT_bus [0]; assign \main_memory|altsyncram_component|auto_generated|ram_block1a22~portadataout = \main_memory|altsyncram_component|auto_generated|ram_block1a22_PORTADATAOUT_bus [0]; @@ -318,20 +894,31 @@ assign \main_memory|altsyncram_component|auto_generated|ram_block1a6~portadataou assign \main_memory|altsyncram_component|auto_generated|ram_block1a30~portadataout = \main_memory|altsyncram_component|auto_generated|ram_block1a30_PORTADATAOUT_bus [0]; -assign \main_memory|altsyncram_component|auto_generated|ram_block1a23~portadataout = \main_memory|altsyncram_component|auto_generated|ram_block1a23_PORTADATAOUT_bus [0]; +assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23~portadataout = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23_PORTADATAOUT_bus [0]; + +assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23~PORTBDATAOUT0 = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23_PORTBDATAOUT_bus [0]; + +assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15~portadataout = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15_PORTADATAOUT_bus [0]; + +assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15~PORTBDATAOUT0 = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15_PORTBDATAOUT_bus [0]; + +assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7~portadataout = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7_PORTADATAOUT_bus [0]; + +assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7~PORTBDATAOUT0 = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7_PORTBDATAOUT_bus [0]; + +assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31~portadataout = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31_PORTADATAOUT_bus [0]; + +assign \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31~PORTBDATAOUT0 = \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31_PORTBDATAOUT_bus [0]; assign \main_memory|altsyncram_component|auto_generated|ram_block1a15~portadataout = \main_memory|altsyncram_component|auto_generated|ram_block1a15_PORTADATAOUT_bus [0]; +assign \main_memory|altsyncram_component|auto_generated|ram_block1a23~portadataout = \main_memory|altsyncram_component|auto_generated|ram_block1a23_PORTADATAOUT_bus [0]; + assign \main_memory|altsyncram_component|auto_generated|ram_block1a7~portadataout = \main_memory|altsyncram_component|auto_generated|ram_block1a7_PORTADATAOUT_bus [0]; assign \main_memory|altsyncram_component|auto_generated|ram_block1a31~portadataout = \main_memory|altsyncram_component|auto_generated|ram_block1a31_PORTADATAOUT_bus [0]; -hard_block auto_generated_inst( - .devpor(devpor), - .devclrn(devclrn), - .devoe(devoe)); - -// Location: LCCOMB_X44_Y52_N16 +// Location: LCCOMB_X44_Y41_N8 fiftyfivenm_lcell_comb \~QUARTUS_CREATED_GND~I ( // Equation(s): // \~QUARTUS_CREATED_GND~I_combout = GND @@ -348,108 +935,32 @@ defparam \~QUARTUS_CREATED_GND~I .lut_mask = 16'h0000; defparam \~QUARTUS_CREATED_GND~I .sum_lutc_input = "datac"; // synopsys translate_on -// Location: IOOBUF_X51_Y0_N23 -fiftyfivenm_io_obuf \cpu_data[0]~output ( - .i(\main_memory|altsyncram_component|auto_generated|mux2|result_node[0]~1_combout ), - .oe(\cpu_rwb~input_o ), - .seriesterminationcontrol(16'b0000000000000000), - .devoe(devoe), - .o(\cpu_data[0]~output_o ), - .obar()); +// Location: LCCOMB_X47_Y21_N6 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][6]~feeder ( + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [6]), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][6]~feeder_combout ), + .cout()); // synopsys translate_off -defparam \cpu_data[0]~output .bus_hold = "false"; -defparam \cpu_data[0]~output .open_drain_output = "false"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][6]~feeder .lut_mask = 16'hFF00; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][6]~feeder .sum_lutc_input = "datac"; // synopsys translate_on -// Location: IOOBUF_X46_Y0_N9 -fiftyfivenm_io_obuf \cpu_data[1]~output ( - .i(\main_memory|altsyncram_component|auto_generated|mux2|result_node[1]~3_combout ), - .oe(\cpu_rwb~input_o ), - .seriesterminationcontrol(16'b0000000000000000), - .devoe(devoe), - .o(\cpu_data[1]~output_o ), - .obar()); +// Location: LCCOMB_X47_Y21_N20 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][7]~feeder ( + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [7]), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][7]~feeder_combout ), + .cout()); // synopsys translate_off -defparam \cpu_data[1]~output .bus_hold = "false"; -defparam \cpu_data[1]~output .open_drain_output = "false"; -// synopsys translate_on - -// Location: IOOBUF_X40_Y0_N23 -fiftyfivenm_io_obuf \cpu_data[2]~output ( - .i(\main_memory|altsyncram_component|auto_generated|mux2|result_node[2]~5_combout ), - .oe(\cpu_rwb~input_o ), - .seriesterminationcontrol(16'b0000000000000000), - .devoe(devoe), - .o(\cpu_data[2]~output_o ), - .obar()); -// synopsys translate_off -defparam \cpu_data[2]~output .bus_hold = "false"; -defparam \cpu_data[2]~output .open_drain_output = "false"; -// synopsys translate_on - -// Location: IOOBUF_X38_Y0_N9 -fiftyfivenm_io_obuf \cpu_data[3]~output ( - .i(\main_memory|altsyncram_component|auto_generated|mux2|result_node[3]~7_combout ), - .oe(\cpu_rwb~input_o ), - .seriesterminationcontrol(16'b0000000000000000), - .devoe(devoe), - .o(\cpu_data[3]~output_o ), - .obar()); -// synopsys translate_off -defparam \cpu_data[3]~output .bus_hold = "false"; -defparam \cpu_data[3]~output .open_drain_output = "false"; -// synopsys translate_on - -// Location: IOOBUF_X38_Y0_N16 -fiftyfivenm_io_obuf \cpu_data[4]~output ( - .i(\main_memory|altsyncram_component|auto_generated|mux2|result_node[4]~9_combout ), - .oe(\cpu_rwb~input_o ), - .seriesterminationcontrol(16'b0000000000000000), - .devoe(devoe), - .o(\cpu_data[4]~output_o ), - .obar()); -// synopsys translate_off -defparam \cpu_data[4]~output .bus_hold = "false"; -defparam \cpu_data[4]~output .open_drain_output = "false"; -// synopsys translate_on - -// Location: IOOBUF_X34_Y0_N23 -fiftyfivenm_io_obuf \cpu_data[5]~output ( - .i(\main_memory|altsyncram_component|auto_generated|mux2|result_node[5]~11_combout ), - .oe(\cpu_rwb~input_o ), - .seriesterminationcontrol(16'b0000000000000000), - .devoe(devoe), - .o(\cpu_data[5]~output_o ), - .obar()); -// synopsys translate_off -defparam \cpu_data[5]~output .bus_hold = "false"; -defparam \cpu_data[5]~output .open_drain_output = "false"; -// synopsys translate_on - -// Location: IOOBUF_X31_Y0_N16 -fiftyfivenm_io_obuf \cpu_data[6]~output ( - .i(\main_memory|altsyncram_component|auto_generated|mux2|result_node[6]~13_combout ), - .oe(\cpu_rwb~input_o ), - .seriesterminationcontrol(16'b0000000000000000), - .devoe(devoe), - .o(\cpu_data[6]~output_o ), - .obar()); -// synopsys translate_off -defparam \cpu_data[6]~output .bus_hold = "false"; -defparam \cpu_data[6]~output .open_drain_output = "false"; -// synopsys translate_on - -// Location: IOOBUF_X29_Y0_N16 -fiftyfivenm_io_obuf \cpu_data[7]~output ( - .i(\main_memory|altsyncram_component|auto_generated|mux2|result_node[7]~15_combout ), - .oe(\cpu_rwb~input_o ), - .seriesterminationcontrol(16'b0000000000000000), - .devoe(devoe), - .o(\cpu_data[7]~output_o ), - .obar()); -// synopsys translate_off -defparam \cpu_data[7]~output .bus_hold = "false"; -defparam \cpu_data[7]~output .open_drain_output = "false"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][7]~feeder .lut_mask = 16'hFF00; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][7]~feeder .sum_lutc_input = "datac"; // synopsys translate_on // Location: IOOBUF_X31_Y0_N23 @@ -458,7 +969,7 @@ fiftyfivenm_io_obuf \cpu_led~output ( .oe(vcc), .seriesterminationcontrol(16'b0000000000000000), .devoe(devoe), - .o(\cpu_led~output_o ), + .o(cpu_led), .obar()); // synopsys translate_off defparam \cpu_led~output .bus_hold = "false"; @@ -471,7 +982,7 @@ fiftyfivenm_io_obuf \cpu_resb~output ( .oe(vcc), .seriesterminationcontrol(16'b0000000000000000), .devoe(devoe), - .o(\cpu_resb~output_o ), + .o(cpu_resb), .obar()); // synopsys translate_off defparam \cpu_resb~output .bus_hold = "false"; @@ -484,7 +995,7 @@ fiftyfivenm_io_obuf \cpu_rdy~output ( .oe(vcc), .seriesterminationcontrol(16'b0000000000000000), .devoe(devoe), - .o(\cpu_rdy~output_o ), + .o(cpu_rdy), .obar()); // synopsys translate_off defparam \cpu_rdy~output .bus_hold = "false"; @@ -497,7 +1008,7 @@ fiftyfivenm_io_obuf \cpu_sob~output ( .oe(vcc), .seriesterminationcontrol(16'b0000000000000000), .devoe(devoe), - .o(\cpu_sob~output_o ), + .o(cpu_sob), .obar()); // synopsys translate_off defparam \cpu_sob~output .bus_hold = "false"; @@ -510,7 +1021,7 @@ fiftyfivenm_io_obuf \cpu_irqb~output ( .oe(vcc), .seriesterminationcontrol(16'b0000000000000000), .devoe(devoe), - .o(\cpu_irqb~output_o ), + .o(cpu_irqb), .obar()); // synopsys translate_off defparam \cpu_irqb~output .bus_hold = "false"; @@ -523,7 +1034,7 @@ fiftyfivenm_io_obuf \cpu_phi2~output ( .oe(vcc), .seriesterminationcontrol(16'b0000000000000000), .devoe(devoe), - .o(\cpu_phi2~output_o ), + .o(cpu_phi2), .obar()); // synopsys translate_off defparam \cpu_phi2~output .bus_hold = "false"; @@ -536,7 +1047,7 @@ fiftyfivenm_io_obuf \cpu_be~output ( .oe(vcc), .seriesterminationcontrol(16'b0000000000000000), .devoe(devoe), - .o(\cpu_be~output_o ), + .o(cpu_be), .obar()); // synopsys translate_off defparam \cpu_be~output .bus_hold = "false"; @@ -549,13 +1060,130 @@ fiftyfivenm_io_obuf \cpu_nmib~output ( .oe(vcc), .seriesterminationcontrol(16'b0000000000000000), .devoe(devoe), - .o(\cpu_nmib~output_o ), + .o(cpu_nmib), .obar()); // synopsys translate_off defparam \cpu_nmib~output .bus_hold = "false"; defparam \cpu_nmib~output .open_drain_output = "false"; // synopsys translate_on +// Location: IOOBUF_X51_Y0_N23 +fiftyfivenm_io_obuf \cpu_data[0]~output ( + .i(\main_memory|altsyncram_component|auto_generated|mux2|result_node[0]~4_combout ), + .oe(\cpu_rwb~input_o ), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(cpu_data[0]), + .obar()); +// synopsys translate_off +defparam \cpu_data[0]~output .bus_hold = "false"; +defparam \cpu_data[0]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X46_Y0_N9 +fiftyfivenm_io_obuf \cpu_data[1]~output ( + .i(\main_memory|altsyncram_component|auto_generated|mux2|result_node[1]~9_combout ), + .oe(\cpu_rwb~input_o ), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(cpu_data[1]), + .obar()); +// synopsys translate_off +defparam \cpu_data[1]~output .bus_hold = "false"; +defparam \cpu_data[1]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X40_Y0_N23 +fiftyfivenm_io_obuf \cpu_data[2]~output ( + .i(\main_memory|altsyncram_component|auto_generated|mux2|result_node[2]~14_combout ), + .oe(\cpu_rwb~input_o ), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(cpu_data[2]), + .obar()); +// synopsys translate_off +defparam \cpu_data[2]~output .bus_hold = "false"; +defparam \cpu_data[2]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X38_Y0_N9 +fiftyfivenm_io_obuf \cpu_data[3]~output ( + .i(\main_memory|altsyncram_component|auto_generated|mux2|result_node[3]~19_combout ), + .oe(\cpu_rwb~input_o ), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(cpu_data[3]), + .obar()); +// synopsys translate_off +defparam \cpu_data[3]~output .bus_hold = "false"; +defparam \cpu_data[3]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X38_Y0_N16 +fiftyfivenm_io_obuf \cpu_data[4]~output ( + .i(\main_memory|altsyncram_component|auto_generated|mux2|result_node[4]~24_combout ), + .oe(\cpu_rwb~input_o ), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(cpu_data[4]), + .obar()); +// synopsys translate_off +defparam \cpu_data[4]~output .bus_hold = "false"; +defparam \cpu_data[4]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X34_Y0_N23 +fiftyfivenm_io_obuf \cpu_data[5]~output ( + .i(\main_memory|altsyncram_component|auto_generated|mux2|result_node[5]~29_combout ), + .oe(\cpu_rwb~input_o ), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(cpu_data[5]), + .obar()); +// synopsys translate_off +defparam \cpu_data[5]~output .bus_hold = "false"; +defparam \cpu_data[5]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X31_Y0_N16 +fiftyfivenm_io_obuf \cpu_data[6]~output ( + .i(\main_memory|altsyncram_component|auto_generated|mux2|result_node[6]~34_combout ), + .oe(\cpu_rwb~input_o ), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(cpu_data[6]), + .obar()); +// synopsys translate_off +defparam \cpu_data[6]~output .bus_hold = "false"; +defparam \cpu_data[6]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X29_Y0_N16 +fiftyfivenm_io_obuf \cpu_data[7]~output ( + .i(\main_memory|altsyncram_component|auto_generated|mux2|result_node[7]~39_combout ), + .oe(\cpu_rwb~input_o ), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(cpu_data[7]), + .obar()); +// synopsys translate_off +defparam \cpu_data[7]~output .bus_hold = "false"; +defparam \cpu_data[7]~output .open_drain_output = "false"; +// synopsys translate_on + +// Location: IOOBUF_X0_Y28_N23 +fiftyfivenm_io_obuf \altera_reserved_tdo~output ( + .i(\altera_internal_jtag~TDO ), + .oe(vcc), + .seriesterminationcontrol(16'b0000000000000000), + .devoe(devoe), + .o(altera_reserved_tdo), + .obar()); +// synopsys translate_off +defparam \altera_reserved_tdo~output .bus_hold = "false"; +defparam \altera_reserved_tdo~output .open_drain_output = "false"; +// synopsys translate_on + // Location: IOIBUF_X34_Y0_N29 fiftyfivenm_io_ibuf \clk~input ( .i(clk), @@ -593,8 +1221,8 @@ defparam \cpu_addr[13]~input .listen_to_nsleep_signal = "false"; defparam \cpu_addr[13]~input .simulate_z_as = "z"; // synopsys translate_on -// Location: FF_X32_Y8_N1 -dffeas \main_memory|altsyncram_component|auto_generated|address_reg_a[0] ( +// Location: FF_X32_Y7_N9 +dffeas \boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a[0] ( .clk(\clk~inputclkctrl_outclk ), .d(gnd), .asdata(\cpu_addr[13]~input_o ), @@ -605,23 +1233,23 @@ dffeas \main_memory|altsyncram_component|auto_generated|address_reg_a[0] ( .ena(vcc), .devclrn(devclrn), .devpor(devpor), - .q(\main_memory|altsyncram_component|auto_generated|address_reg_a [0]), + .q(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [0]), .prn(vcc)); // synopsys translate_off -defparam \main_memory|altsyncram_component|auto_generated|address_reg_a[0] .is_wysiwyg = "true"; -defparam \main_memory|altsyncram_component|auto_generated|address_reg_a[0] .power_up = "low"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a[0] .is_wysiwyg = "true"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a[0] .power_up = "low"; // synopsys translate_on -// Location: IOIBUF_X26_Y0_N1 -fiftyfivenm_io_ibuf \cpu_addr[14]~input ( - .i(cpu_addr[14]), +// Location: IOIBUF_X29_Y0_N22 +fiftyfivenm_io_ibuf \cpu_addr[15]~input ( + .i(cpu_addr[15]), .ibar(gnd), .nsleep(vcc), - .o(\cpu_addr[14]~input_o )); + .o(\cpu_addr[15]~input_o )); // synopsys translate_off -defparam \cpu_addr[14]~input .bus_hold = "false"; -defparam \cpu_addr[14]~input .listen_to_nsleep_signal = "false"; -defparam \cpu_addr[14]~input .simulate_z_as = "z"; +defparam \cpu_addr[15]~input .bus_hold = "false"; +defparam \cpu_addr[15]~input .listen_to_nsleep_signal = "false"; +defparam \cpu_addr[15]~input .simulate_z_as = "z"; // synopsys translate_on // Location: IOIBUF_X14_Y0_N1 @@ -636,38 +1264,50 @@ defparam \cpu_rwb~input .listen_to_nsleep_signal = "false"; defparam \cpu_rwb~input .simulate_z_as = "z"; // synopsys translate_on -// Location: LCCOMB_X37_Y7_N24 -fiftyfivenm_lcell_comb \main_memory|altsyncram_component|auto_generated|decode3|w_anode236w[2]~0 ( -// Equation(s): -// \main_memory|altsyncram_component|auto_generated|decode3|w_anode236w[2]~0_combout = (\cpu_addr[13]~input_o & (!\cpu_addr[14]~input_o & !\cpu_rwb~input_o )) - - .dataa(gnd), - .datab(\cpu_addr[13]~input_o ), - .datac(\cpu_addr[14]~input_o ), - .datad(\cpu_rwb~input_o ), - .cin(gnd), - .combout(\main_memory|altsyncram_component|auto_generated|decode3|w_anode236w[2]~0_combout ), - .cout()); +// Location: IOIBUF_X26_Y0_N1 +fiftyfivenm_io_ibuf \cpu_addr[14]~input ( + .i(cpu_addr[14]), + .ibar(gnd), + .nsleep(vcc), + .o(\cpu_addr[14]~input_o )); // synopsys translate_off -defparam \main_memory|altsyncram_component|auto_generated|decode3|w_anode236w[2]~0 .lut_mask = 16'h000C; -defparam \main_memory|altsyncram_component|auto_generated|decode3|w_anode236w[2]~0 .sum_lutc_input = "datac"; +defparam \cpu_addr[14]~input .bus_hold = "false"; +defparam \cpu_addr[14]~input .listen_to_nsleep_signal = "false"; +defparam \cpu_addr[14]~input .simulate_z_as = "z"; // synopsys translate_on -// Location: LCCOMB_X37_Y7_N18 -fiftyfivenm_lcell_comb \main_memory|altsyncram_component|auto_generated|rden_decode|w_anode275w[2]~0 ( +// Location: LCCOMB_X32_Y7_N10 +fiftyfivenm_lcell_comb \main_memory|altsyncram_component|auto_generated|decode3|w_anode244w[2]~0 ( // Equation(s): -// \main_memory|altsyncram_component|auto_generated|rden_decode|w_anode275w[2]~0_combout = (!\cpu_addr[14]~input_o & \cpu_addr[13]~input_o ) +// \main_memory|altsyncram_component|auto_generated|decode3|w_anode244w[2]~0_combout = (!\cpu_addr[13]~input_o & (!\cpu_addr[15]~input_o & (!\cpu_rwb~input_o & \cpu_addr[14]~input_o ))) - .dataa(gnd), - .datab(gnd), - .datac(\cpu_addr[14]~input_o ), - .datad(\cpu_addr[13]~input_o ), + .dataa(\cpu_addr[13]~input_o ), + .datab(\cpu_addr[15]~input_o ), + .datac(\cpu_rwb~input_o ), + .datad(\cpu_addr[14]~input_o ), .cin(gnd), - .combout(\main_memory|altsyncram_component|auto_generated|rden_decode|w_anode275w[2]~0_combout ), + .combout(\main_memory|altsyncram_component|auto_generated|decode3|w_anode244w[2]~0_combout ), .cout()); // synopsys translate_off -defparam \main_memory|altsyncram_component|auto_generated|rden_decode|w_anode275w[2]~0 .lut_mask = 16'h0F00; -defparam \main_memory|altsyncram_component|auto_generated|rden_decode|w_anode275w[2]~0 .sum_lutc_input = "datac"; +defparam \main_memory|altsyncram_component|auto_generated|decode3|w_anode244w[2]~0 .lut_mask = 16'h0100; +defparam \main_memory|altsyncram_component|auto_generated|decode3|w_anode244w[2]~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X32_Y7_N2 +fiftyfivenm_lcell_comb \main_memory|altsyncram_component|auto_generated|rden_decode|w_anode284w[2]~1 ( +// Equation(s): +// \main_memory|altsyncram_component|auto_generated|rden_decode|w_anode284w[2]~1_combout = (!\cpu_addr[13]~input_o & \cpu_addr[14]~input_o ) + + .dataa(\cpu_addr[13]~input_o ), + .datab(gnd), + .datac(gnd), + .datad(\cpu_addr[14]~input_o ), + .cin(gnd), + .combout(\main_memory|altsyncram_component|auto_generated|rden_decode|w_anode284w[2]~1_combout ), + .cout()); +// synopsys translate_off +defparam \main_memory|altsyncram_component|auto_generated|rden_decode|w_anode284w[2]~1 .lut_mask = 16'h5500; +defparam \main_memory|altsyncram_component|auto_generated|rden_decode|w_anode284w[2]~1 .sum_lutc_input = "datac"; // synopsys translate_on // Location: IOIBUF_X51_Y0_N22 @@ -838,9 +1478,9 @@ defparam \cpu_addr[12]~input .listen_to_nsleep_signal = "false"; defparam \cpu_addr[12]~input .simulate_z_as = "z"; // synopsys translate_on -// Location: M9K_X53_Y7_N0 -fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block1a8 ( - .portawe(\main_memory|altsyncram_component|auto_generated|decode3|w_anode236w[2]~0_combout ), +// Location: M9K_X73_Y6_N0 +fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block1a16 ( + .portawe(\main_memory|altsyncram_component|auto_generated|decode3|w_anode244w[2]~0_combout ), .portare(vcc), .portaaddrstall(gnd), .portbwe(gnd), @@ -848,7 +1488,7 @@ fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block .portbaddrstall(gnd), .clk0(\clk~inputclkctrl_outclk ), .clk1(gnd), - .ena0(\main_memory|altsyncram_component|auto_generated|rden_decode|w_anode275w[2]~0_combout ), + .ena0(\main_memory|altsyncram_component|auto_generated|rden_decode|w_anode284w[2]~1_combout ), .ena1(vcc), .ena2(vcc), .ena3(vcc), @@ -863,66 +1503,102 @@ fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block .portbbyteenamasks(1'b1), .devclrn(devclrn), .devpor(devpor), - .portadataout(\main_memory|altsyncram_component|auto_generated|ram_block1a8_PORTADATAOUT_bus ), + .portadataout(\main_memory|altsyncram_component|auto_generated|ram_block1a16_PORTADATAOUT_bus ), .portbdataout()); // synopsys translate_off -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a8 .clk0_core_clock_enable = "ena0"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a8 .data_interleave_offset_in_bits = 1; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a8 .data_interleave_width_in_bits = 1; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a8 .logical_ram_name = "ram:main_memory|altsyncram:altsyncram_component|altsyncram_okf1:auto_generated|ALTSYNCRAM"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a8 .operation_mode = "single_port"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a8 .port_a_address_clear = "none"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a8 .port_a_address_width = 13; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a8 .port_a_byte_enable_clock = "none"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a8 .port_a_data_out_clear = "none"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a8 .port_a_data_out_clock = "none"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a8 .port_a_data_width = 1; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a8 .port_a_first_address = 0; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a8 .port_a_first_bit_number = 0; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a8 .port_a_last_address = 8191; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a8 .port_a_logical_ram_depth = 32768; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a8 .port_a_logical_ram_width = 8; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a8 .port_a_read_during_write_mode = "new_data_with_nbe_read"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a8 .port_b_address_width = 13; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a8 .port_b_data_width = 1; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a8 .ram_block_type = "M9K"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a16 .clk0_core_clock_enable = "ena0"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a16 .data_interleave_offset_in_bits = 1; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a16 .data_interleave_width_in_bits = 1; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a16 .logical_ram_name = "ram:main_memory|altsyncram:altsyncram_component|altsyncram_okf1:auto_generated|ALTSYNCRAM"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a16 .operation_mode = "single_port"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a16 .port_a_address_clear = "none"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a16 .port_a_address_width = 13; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a16 .port_a_byte_enable_clock = "none"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a16 .port_a_data_out_clear = "none"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a16 .port_a_data_out_clock = "none"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a16 .port_a_data_width = 1; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a16 .port_a_first_address = 0; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a16 .port_a_first_bit_number = 0; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a16 .port_a_last_address = 8191; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a16 .port_a_logical_ram_depth = 32768; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a16 .port_a_logical_ram_width = 8; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a16 .port_a_read_during_write_mode = "new_data_with_nbe_read"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a16 .port_b_address_width = 13; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a16 .port_b_data_width = 1; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a16 .ram_block_type = "M9K"; // synopsys translate_on -// Location: LCCOMB_X37_Y7_N0 -fiftyfivenm_lcell_comb \main_memory|altsyncram_component|auto_generated|decode3|w_anode223w[2] ( +// Location: LCCOMB_X32_Y7_N0 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a[1]~feeder ( // Equation(s): -// \main_memory|altsyncram_component|auto_generated|decode3|w_anode223w [2] = (!\cpu_addr[13]~input_o & (!\cpu_addr[14]~input_o & !\cpu_rwb~input_o )) +// \boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a[1]~feeder_combout = \cpu_addr[14]~input_o .dataa(gnd), - .datab(\cpu_addr[13]~input_o ), - .datac(\cpu_addr[14]~input_o ), - .datad(\cpu_rwb~input_o ), + .datab(gnd), + .datac(gnd), + .datad(\cpu_addr[14]~input_o ), + .cin(gnd), + .combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a[1]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a[1]~feeder .lut_mask = 16'hFF00; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a[1]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X32_Y7_N1 +dffeas \boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a[1] ( + .clk(\clk~inputclkctrl_outclk ), + .d(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a[1]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [1]), + .prn(vcc)); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a[1] .is_wysiwyg = "true"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X32_Y7_N28 +fiftyfivenm_lcell_comb \main_memory|altsyncram_component|auto_generated|decode3|w_anode223w[2] ( +// Equation(s): +// \main_memory|altsyncram_component|auto_generated|decode3|w_anode223w [2] = (!\cpu_addr[13]~input_o & (!\cpu_addr[15]~input_o & (!\cpu_rwb~input_o & !\cpu_addr[14]~input_o ))) + + .dataa(\cpu_addr[13]~input_o ), + .datab(\cpu_addr[15]~input_o ), + .datac(\cpu_rwb~input_o ), + .datad(\cpu_addr[14]~input_o ), .cin(gnd), .combout(\main_memory|altsyncram_component|auto_generated|decode3|w_anode223w [2]), .cout()); // synopsys translate_off -defparam \main_memory|altsyncram_component|auto_generated|decode3|w_anode223w[2] .lut_mask = 16'h0003; +defparam \main_memory|altsyncram_component|auto_generated|decode3|w_anode223w[2] .lut_mask = 16'h0001; defparam \main_memory|altsyncram_component|auto_generated|decode3|w_anode223w[2] .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X37_Y7_N26 +// Location: LCCOMB_X32_Y7_N20 fiftyfivenm_lcell_comb \main_memory|altsyncram_component|auto_generated|rden_decode|w_anode261w[2]~0 ( // Equation(s): -// \main_memory|altsyncram_component|auto_generated|rden_decode|w_anode261w[2]~0_combout = (!\cpu_addr[14]~input_o & !\cpu_addr[13]~input_o ) +// \main_memory|altsyncram_component|auto_generated|rden_decode|w_anode261w[2]~0_combout = (!\cpu_addr[13]~input_o & !\cpu_addr[14]~input_o ) - .dataa(gnd), + .dataa(\cpu_addr[13]~input_o ), .datab(gnd), - .datac(\cpu_addr[14]~input_o ), - .datad(\cpu_addr[13]~input_o ), + .datac(gnd), + .datad(\cpu_addr[14]~input_o ), .cin(gnd), .combout(\main_memory|altsyncram_component|auto_generated|rden_decode|w_anode261w[2]~0_combout ), .cout()); // synopsys translate_off -defparam \main_memory|altsyncram_component|auto_generated|rden_decode|w_anode261w[2]~0 .lut_mask = 16'h000F; +defparam \main_memory|altsyncram_component|auto_generated|rden_decode|w_anode261w[2]~0 .lut_mask = 16'h0055; defparam \main_memory|altsyncram_component|auto_generated|rden_decode|w_anode261w[2]~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: M9K_X33_Y10_N0 +// Location: M9K_X73_Y7_N0 fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block1a0 ( .portawe(\main_memory|altsyncram_component|auto_generated|decode3|w_anode223w [2]), .portare(vcc), @@ -972,43 +1648,62 @@ defparam \main_memory|altsyncram_component|auto_generated|ram_block1a0 .port_b_d defparam \main_memory|altsyncram_component|auto_generated|ram_block1a0 .ram_block_type = "M9K"; // synopsys translate_on -// Location: LCCOMB_X37_Y7_N28 -fiftyfivenm_lcell_comb \main_memory|altsyncram_component|auto_generated|decode3|w_anode244w[2]~0 ( +// Location: LCCOMB_X72_Y8_N28 +fiftyfivenm_lcell_comb \main_memory|altsyncram_component|auto_generated|mux2|result_node[0]~2 ( // Equation(s): -// \main_memory|altsyncram_component|auto_generated|decode3|w_anode244w[2]~0_combout = (!\cpu_addr[13]~input_o & (\cpu_addr[14]~input_o & !\cpu_rwb~input_o )) +// \main_memory|altsyncram_component|auto_generated|mux2|result_node[0]~2_combout = (\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [0] & (((\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [1])))) # +// (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [0] & ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [1] & (\main_memory|altsyncram_component|auto_generated|ram_block1a16~portadataout )) # +// (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [1] & ((\main_memory|altsyncram_component|auto_generated|ram_block1a0~portadataout ))))) + + .dataa(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [0]), + .datab(\main_memory|altsyncram_component|auto_generated|ram_block1a16~portadataout ), + .datac(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [1]), + .datad(\main_memory|altsyncram_component|auto_generated|ram_block1a0~portadataout ), + .cin(gnd), + .combout(\main_memory|altsyncram_component|auto_generated|mux2|result_node[0]~2_combout ), + .cout()); +// synopsys translate_off +defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[0]~2 .lut_mask = 16'hE5E0; +defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[0]~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X32_Y7_N24 +fiftyfivenm_lcell_comb \main_memory|altsyncram_component|auto_generated|decode3|w_anode236w[2]~0 ( +// Equation(s): +// \main_memory|altsyncram_component|auto_generated|decode3|w_anode236w[2]~0_combout = (\cpu_addr[13]~input_o & (!\cpu_addr[15]~input_o & (!\cpu_rwb~input_o & !\cpu_addr[14]~input_o ))) + + .dataa(\cpu_addr[13]~input_o ), + .datab(\cpu_addr[15]~input_o ), + .datac(\cpu_rwb~input_o ), + .datad(\cpu_addr[14]~input_o ), + .cin(gnd), + .combout(\main_memory|altsyncram_component|auto_generated|decode3|w_anode236w[2]~0_combout ), + .cout()); +// synopsys translate_off +defparam \main_memory|altsyncram_component|auto_generated|decode3|w_anode236w[2]~0 .lut_mask = 16'h0002; +defparam \main_memory|altsyncram_component|auto_generated|decode3|w_anode236w[2]~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X32_Y7_N8 +fiftyfivenm_lcell_comb \main_memory|altsyncram_component|auto_generated|rden_decode|w_anode284w[2]~0 ( +// Equation(s): +// \main_memory|altsyncram_component|auto_generated|rden_decode|w_anode284w[2]~0_combout = (\cpu_addr[13]~input_o & !\cpu_addr[14]~input_o ) .dataa(gnd), .datab(\cpu_addr[13]~input_o ), - .datac(\cpu_addr[14]~input_o ), - .datad(\cpu_rwb~input_o ), - .cin(gnd), - .combout(\main_memory|altsyncram_component|auto_generated|decode3|w_anode244w[2]~0_combout ), - .cout()); -// synopsys translate_off -defparam \main_memory|altsyncram_component|auto_generated|decode3|w_anode244w[2]~0 .lut_mask = 16'h0030; -defparam \main_memory|altsyncram_component|auto_generated|decode3|w_anode244w[2]~0 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: LCCOMB_X37_Y7_N30 -fiftyfivenm_lcell_comb \main_memory|altsyncram_component|auto_generated|rden_decode|w_anode284w[2]~0 ( -// Equation(s): -// \main_memory|altsyncram_component|auto_generated|rden_decode|w_anode284w[2]~0_combout = (\cpu_addr[14]~input_o & !\cpu_addr[13]~input_o ) - - .dataa(gnd), - .datab(gnd), - .datac(\cpu_addr[14]~input_o ), - .datad(\cpu_addr[13]~input_o ), + .datac(gnd), + .datad(\cpu_addr[14]~input_o ), .cin(gnd), .combout(\main_memory|altsyncram_component|auto_generated|rden_decode|w_anode284w[2]~0_combout ), .cout()); // synopsys translate_off -defparam \main_memory|altsyncram_component|auto_generated|rden_decode|w_anode284w[2]~0 .lut_mask = 16'h00F0; +defparam \main_memory|altsyncram_component|auto_generated|rden_decode|w_anode284w[2]~0 .lut_mask = 16'h00CC; defparam \main_memory|altsyncram_component|auto_generated|rden_decode|w_anode284w[2]~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: M9K_X33_Y4_N0 -fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block1a16 ( - .portawe(\main_memory|altsyncram_component|auto_generated|decode3|w_anode244w[2]~0_combout ), +// Location: M9K_X73_Y4_N0 +fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block1a8 ( + .portawe(\main_memory|altsyncram_component|auto_generated|decode3|w_anode236w[2]~0_combout ), .portare(vcc), .portaaddrstall(gnd), .portbwe(gnd), @@ -1031,104 +1726,66 @@ fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block .portbbyteenamasks(1'b1), .devclrn(devclrn), .devpor(devpor), - .portadataout(\main_memory|altsyncram_component|auto_generated|ram_block1a16_PORTADATAOUT_bus ), + .portadataout(\main_memory|altsyncram_component|auto_generated|ram_block1a8_PORTADATAOUT_bus ), .portbdataout()); // synopsys translate_off -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a16 .clk0_core_clock_enable = "ena0"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a16 .data_interleave_offset_in_bits = 1; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a16 .data_interleave_width_in_bits = 1; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a16 .logical_ram_name = "ram:main_memory|altsyncram:altsyncram_component|altsyncram_okf1:auto_generated|ALTSYNCRAM"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a16 .operation_mode = "single_port"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a16 .port_a_address_clear = "none"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a16 .port_a_address_width = 13; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a16 .port_a_byte_enable_clock = "none"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a16 .port_a_data_out_clear = "none"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a16 .port_a_data_out_clock = "none"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a16 .port_a_data_width = 1; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a16 .port_a_first_address = 0; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a16 .port_a_first_bit_number = 0; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a16 .port_a_last_address = 8191; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a16 .port_a_logical_ram_depth = 32768; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a16 .port_a_logical_ram_width = 8; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a16 .port_a_read_during_write_mode = "new_data_with_nbe_read"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a16 .port_b_address_width = 13; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a16 .port_b_data_width = 1; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a16 .ram_block_type = "M9K"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a8 .clk0_core_clock_enable = "ena0"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a8 .data_interleave_offset_in_bits = 1; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a8 .data_interleave_width_in_bits = 1; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a8 .logical_ram_name = "ram:main_memory|altsyncram:altsyncram_component|altsyncram_okf1:auto_generated|ALTSYNCRAM"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a8 .operation_mode = "single_port"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a8 .port_a_address_clear = "none"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a8 .port_a_address_width = 13; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a8 .port_a_byte_enable_clock = "none"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a8 .port_a_data_out_clear = "none"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a8 .port_a_data_out_clock = "none"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a8 .port_a_data_width = 1; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a8 .port_a_first_address = 0; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a8 .port_a_first_bit_number = 0; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a8 .port_a_last_address = 8191; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a8 .port_a_logical_ram_depth = 32768; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a8 .port_a_logical_ram_width = 8; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a8 .port_a_read_during_write_mode = "new_data_with_nbe_read"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a8 .port_b_address_width = 13; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a8 .port_b_data_width = 1; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a8 .ram_block_type = "M9K"; // synopsys translate_on -// Location: FF_X32_Y8_N27 -dffeas \main_memory|altsyncram_component|auto_generated|address_reg_a[1] ( - .clk(\clk~inputclkctrl_outclk ), - .d(gnd), - .asdata(\cpu_addr[14]~input_o ), - .clrn(vcc), - .aload(gnd), - .sclr(gnd), - .sload(vcc), - .ena(vcc), - .devclrn(devclrn), - .devpor(devpor), - .q(\main_memory|altsyncram_component|auto_generated|address_reg_a [1]), - .prn(vcc)); -// synopsys translate_off -defparam \main_memory|altsyncram_component|auto_generated|address_reg_a[1] .is_wysiwyg = "true"; -defparam \main_memory|altsyncram_component|auto_generated|address_reg_a[1] .power_up = "low"; -// synopsys translate_on - -// Location: LCCOMB_X32_Y8_N28 -fiftyfivenm_lcell_comb \main_memory|altsyncram_component|auto_generated|mux2|result_node[0]~0 ( -// Equation(s): -// \main_memory|altsyncram_component|auto_generated|mux2|result_node[0]~0_combout = (\main_memory|altsyncram_component|auto_generated|address_reg_a [0] & (((\main_memory|altsyncram_component|auto_generated|address_reg_a [1])))) # -// (!\main_memory|altsyncram_component|auto_generated|address_reg_a [0] & ((\main_memory|altsyncram_component|auto_generated|address_reg_a [1] & ((\main_memory|altsyncram_component|auto_generated|ram_block1a16~portadataout ))) # -// (!\main_memory|altsyncram_component|auto_generated|address_reg_a [1] & (\main_memory|altsyncram_component|auto_generated|ram_block1a0~portadataout )))) - - .dataa(\main_memory|altsyncram_component|auto_generated|ram_block1a0~portadataout ), - .datab(\main_memory|altsyncram_component|auto_generated|address_reg_a [0]), - .datac(\main_memory|altsyncram_component|auto_generated|ram_block1a16~portadataout ), - .datad(\main_memory|altsyncram_component|auto_generated|address_reg_a [1]), - .cin(gnd), - .combout(\main_memory|altsyncram_component|auto_generated|mux2|result_node[0]~0_combout ), - .cout()); -// synopsys translate_off -defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[0]~0 .lut_mask = 16'hFC22; -defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[0]~0 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: LCCOMB_X37_Y7_N20 +// Location: LCCOMB_X32_Y7_N6 fiftyfivenm_lcell_comb \main_memory|altsyncram_component|auto_generated|decode3|w_anode252w[2]~0 ( // Equation(s): -// \main_memory|altsyncram_component|auto_generated|decode3|w_anode252w[2]~0_combout = (\cpu_addr[13]~input_o & (\cpu_addr[14]~input_o & !\cpu_rwb~input_o )) +// \main_memory|altsyncram_component|auto_generated|decode3|w_anode252w[2]~0_combout = (\cpu_addr[13]~input_o & (!\cpu_addr[15]~input_o & (!\cpu_rwb~input_o & \cpu_addr[14]~input_o ))) - .dataa(gnd), - .datab(\cpu_addr[13]~input_o ), - .datac(\cpu_addr[14]~input_o ), - .datad(\cpu_rwb~input_o ), + .dataa(\cpu_addr[13]~input_o ), + .datab(\cpu_addr[15]~input_o ), + .datac(\cpu_rwb~input_o ), + .datad(\cpu_addr[14]~input_o ), .cin(gnd), .combout(\main_memory|altsyncram_component|auto_generated|decode3|w_anode252w[2]~0_combout ), .cout()); // synopsys translate_off -defparam \main_memory|altsyncram_component|auto_generated|decode3|w_anode252w[2]~0 .lut_mask = 16'h00C0; +defparam \main_memory|altsyncram_component|auto_generated|decode3|w_anode252w[2]~0 .lut_mask = 16'h0200; defparam \main_memory|altsyncram_component|auto_generated|decode3|w_anode252w[2]~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X37_Y7_N6 -fiftyfivenm_lcell_comb \main_memory|altsyncram_component|auto_generated|rden_decode|w_anode293w[2]~0 ( +// Location: LCCOMB_X32_Y7_N30 +fiftyfivenm_lcell_comb \main_memory|altsyncram_component|auto_generated|rden_decode|w_anode284w[2]~2 ( // Equation(s): -// \main_memory|altsyncram_component|auto_generated|rden_decode|w_anode293w[2]~0_combout = (\cpu_addr[14]~input_o & \cpu_addr[13]~input_o ) +// \main_memory|altsyncram_component|auto_generated|rden_decode|w_anode284w[2]~2_combout = (\cpu_addr[13]~input_o & \cpu_addr[14]~input_o ) - .dataa(gnd), + .dataa(\cpu_addr[13]~input_o ), .datab(gnd), - .datac(\cpu_addr[14]~input_o ), - .datad(\cpu_addr[13]~input_o ), + .datac(gnd), + .datad(\cpu_addr[14]~input_o ), .cin(gnd), - .combout(\main_memory|altsyncram_component|auto_generated|rden_decode|w_anode293w[2]~0_combout ), + .combout(\main_memory|altsyncram_component|auto_generated|rden_decode|w_anode284w[2]~2_combout ), .cout()); // synopsys translate_off -defparam \main_memory|altsyncram_component|auto_generated|rden_decode|w_anode293w[2]~0 .lut_mask = 16'hF000; -defparam \main_memory|altsyncram_component|auto_generated|rden_decode|w_anode293w[2]~0 .sum_lutc_input = "datac"; +defparam \main_memory|altsyncram_component|auto_generated|rden_decode|w_anode284w[2]~2 .lut_mask = 16'hAA00; +defparam \main_memory|altsyncram_component|auto_generated|rden_decode|w_anode284w[2]~2 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: M9K_X53_Y4_N0 +// Location: M9K_X73_Y5_N0 fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block1a24 ( .portawe(\main_memory|altsyncram_component|auto_generated|decode3|w_anode252w[2]~0_combout ), .portare(vcc), @@ -1138,7 +1795,7 @@ fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block .portbaddrstall(gnd), .clk0(\clk~inputclkctrl_outclk ), .clk1(gnd), - .ena0(\main_memory|altsyncram_component|auto_generated|rden_decode|w_anode293w[2]~0_combout ), + .ena0(\main_memory|altsyncram_component|auto_generated|rden_decode|w_anode284w[2]~2_combout ), .ena1(vcc), .ena2(vcc), .ena3(vcc), @@ -1178,25 +1835,8204 @@ defparam \main_memory|altsyncram_component|auto_generated|ram_block1a24 .port_b_ defparam \main_memory|altsyncram_component|auto_generated|ram_block1a24 .ram_block_type = "M9K"; // synopsys translate_on -// Location: LCCOMB_X52_Y4_N16 +// Location: LCCOMB_X72_Y8_N6 +fiftyfivenm_lcell_comb \main_memory|altsyncram_component|auto_generated|mux2|result_node[0]~3 ( +// Equation(s): +// \main_memory|altsyncram_component|auto_generated|mux2|result_node[0]~3_combout = (\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [0] & ((\main_memory|altsyncram_component|auto_generated|mux2|result_node[0]~2_combout & +// ((\main_memory|altsyncram_component|auto_generated|ram_block1a24~portadataout ))) # (!\main_memory|altsyncram_component|auto_generated|mux2|result_node[0]~2_combout & (\main_memory|altsyncram_component|auto_generated|ram_block1a8~portadataout )))) # +// (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [0] & (\main_memory|altsyncram_component|auto_generated|mux2|result_node[0]~2_combout )) + + .dataa(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [0]), + .datab(\main_memory|altsyncram_component|auto_generated|mux2|result_node[0]~2_combout ), + .datac(\main_memory|altsyncram_component|auto_generated|ram_block1a8~portadataout ), + .datad(\main_memory|altsyncram_component|auto_generated|ram_block1a24~portadataout ), + .cin(gnd), + .combout(\main_memory|altsyncram_component|auto_generated|mux2|result_node[0]~3_combout ), + .cout()); +// synopsys translate_off +defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[0]~3 .lut_mask = 16'hEC64; +defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[0]~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: IOIBUF_X0_Y29_N15 +fiftyfivenm_io_ibuf \altera_reserved_tms~input ( + .i(altera_reserved_tms), + .ibar(gnd), + .nsleep(vcc), + .o(\altera_reserved_tms~input_o )); +// synopsys translate_off +defparam \altera_reserved_tms~input .bus_hold = "false"; +defparam \altera_reserved_tms~input .listen_to_nsleep_signal = "false"; +defparam \altera_reserved_tms~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: IOIBUF_X0_Y29_N22 +fiftyfivenm_io_ibuf \altera_reserved_tck~input ( + .i(altera_reserved_tck), + .ibar(gnd), + .nsleep(vcc), + .o(\altera_reserved_tck~input_o )); +// synopsys translate_off +defparam \altera_reserved_tck~input .bus_hold = "false"; +defparam \altera_reserved_tck~input .listen_to_nsleep_signal = "false"; +defparam \altera_reserved_tck~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: IOIBUF_X0_Y28_N15 +fiftyfivenm_io_ibuf \altera_reserved_tdi~input ( + .i(altera_reserved_tdi), + .ibar(gnd), + .nsleep(vcc), + .o(\altera_reserved_tdi~input_o )); +// synopsys translate_off +defparam \altera_reserved_tdi~input .bus_hold = "false"; +defparam \altera_reserved_tdi~input .listen_to_nsleep_signal = "false"; +defparam \altera_reserved_tdi~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: JTAG_X43_Y40_N0 +fiftyfivenm_jtag altera_internal_jtag( + .tms(\altera_reserved_tms~input_o ), + .tck(\altera_reserved_tck~input_o ), + .tdi(\altera_reserved_tdi~input_o ), + .tdouser(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo~q ), + .tdo(\altera_internal_jtag~TDO ), + .tmsutap(\altera_internal_jtag~TMSUTAP ), + .tckutap(\altera_internal_jtag~TCKUTAP ), + .tdiutap(\altera_internal_jtag~TDIUTAP ), + .shiftuser(), + .clkdruser(), + .updateuser(), + .runidleuser(), + .usr1user()); + +// Location: LCCOMB_X45_Y24_N18 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~6 ( + .dataa(gnd), + .datab(gnd), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [6]), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [5]), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~6_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~6 .lut_mask = 16'hFFF0; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X45_Y24_N19 +dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[6] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~6_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(\altera_internal_jtag~TMSUTAP ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [6]), + .prn(vcc)); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[6] .is_wysiwyg = "true"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[6] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X45_Y24_N14 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~7 ( + .dataa(\altera_internal_jtag~TMSUTAP ), + .datab(gnd), + .datac(gnd), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [6]), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~7_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~7 .lut_mask = 16'hAA00; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~7 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X45_Y24_N15 +dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[7] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~7_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [7]), + .prn(vcc)); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[7] .is_wysiwyg = "true"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[7] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X45_Y24_N0 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~8 ( + .dataa(\altera_internal_jtag~TMSUTAP ), + .datab(gnd), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [7]), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [5]), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~8_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~8 .lut_mask = 16'hAAA0; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~8 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X45_Y24_N8 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[8]~feeder ( + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~8_combout ), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[8]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[8]~feeder .lut_mask = 16'hFF00; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[8]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X45_Y24_N9 +dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[8] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[8]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [8]), + .prn(vcc)); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[8] .is_wysiwyg = "true"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[8] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X47_Y24_N6 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena_proc~1 ( + .dataa(gnd), + .datab(\altera_internal_jtag~TMSUTAP ), + .datac(gnd), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [2]), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena_proc~1_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena_proc~1 .lut_mask = 16'hCC00; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena_proc~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X47_Y24_N7 +dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[9] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena_proc~1_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [9]), + .prn(vcc)); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[9] .is_wysiwyg = "true"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[9] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X46_Y27_N6 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt~1 ( + .dataa(\altera_internal_jtag~TMSUTAP ), + .datab(gnd), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt [0]), + .datad(gnd), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt~1_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt~1 .lut_mask = 16'h0A0A; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X46_Y27_N7 +dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt[0] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt~1_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt [0]), + .prn(vcc)); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt[0] .is_wysiwyg = "true"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X46_Y27_N10 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt~2 ( + .dataa(gnd), + .datab(gnd), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt [1]), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt [0]), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt~2_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt~2 .lut_mask = 16'h0FF0; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X46_Y27_N11 +dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt[1] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt~2_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(!\altera_internal_jtag~TMSUTAP ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt [1]), + .prn(vcc)); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt[1] .is_wysiwyg = "true"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X46_Y27_N24 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt~0 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt [1]), + .datab(gnd), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt [2]), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt [0]), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt~0_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt~0 .lut_mask = 16'h5AF0; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X46_Y27_N25 +dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt[2] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt~0_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(!\altera_internal_jtag~TMSUTAP ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt [2]), + .prn(vcc)); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt[2] .is_wysiwyg = "true"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X46_Y27_N12 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~0 ( + .dataa(\altera_internal_jtag~TMSUTAP ), + .datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [9]), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [0]), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt [2]), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~0_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~0 .lut_mask = 16'h5575; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X46_Y27_N13 +dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[0] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~0_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [0]), + .prn(vcc)); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[0] .is_wysiwyg = "true"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X47_Y25_N10 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~9 ( + .dataa(gnd), + .datab(\altera_internal_jtag~TMSUTAP ), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [9]), + .datad(gnd), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~9_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~9 .lut_mask = 16'h3030; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~9 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X47_Y25_N11 +dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[10] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~9_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [10]), + .prn(vcc)); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[10] .is_wysiwyg = "true"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[10] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X47_Y25_N18 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~10 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [14]), + .datab(gnd), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [11]), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [10]), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~10_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~10 .lut_mask = 16'hFFFA; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~10 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X47_Y25_N19 +dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[11] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~10_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(\altera_internal_jtag~TMSUTAP ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [11]), + .prn(vcc)); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[11] .is_wysiwyg = "true"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[11] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X47_Y25_N12 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~11 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [10]), + .datab(\altera_internal_jtag~TMSUTAP ), + .datac(gnd), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [11]), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~11_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~11 .lut_mask = 16'hCC88; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~11 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X47_Y25_N13 +dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[12] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~11_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [12]), + .prn(vcc)); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[12] .is_wysiwyg = "true"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[12] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X47_Y25_N28 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~12 ( + .dataa(gnd), + .datab(gnd), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [13]), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [12]), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~12_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~12 .lut_mask = 16'hFFF0; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~12 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X47_Y25_N29 +dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[13] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~12_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(\altera_internal_jtag~TMSUTAP ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [13]), + .prn(vcc)); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[13] .is_wysiwyg = "true"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[13] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X47_Y25_N22 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~13 ( + .dataa(gnd), + .datab(\altera_internal_jtag~TMSUTAP ), + .datac(gnd), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [13]), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~13_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~13 .lut_mask = 16'hCC00; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~13 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X47_Y25_N23 +dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[14] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~13_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [14]), + .prn(vcc)); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[14] .is_wysiwyg = "true"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[14] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X47_Y25_N2 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_dr_scan_proc~0 ( + .dataa(gnd), + .datab(\altera_internal_jtag~TMSUTAP ), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [14]), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [12]), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_dr_scan_proc~0_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_dr_scan_proc~0 .lut_mask = 16'hCCC0; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_dr_scan_proc~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X47_Y25_N16 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[15]~feeder ( + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_dr_scan_proc~0_combout ), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[15]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[15]~feeder .lut_mask = 16'hFF00; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[15]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X47_Y25_N17 +dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[15] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[15]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [15]), + .prn(vcc)); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[15] .is_wysiwyg = "true"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[15] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X47_Y25_N24 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~1 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [8]), + .datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [0]), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [1]), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [15]), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~1_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~1 .lut_mask = 16'hFFFB; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X47_Y25_N25 +dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[1] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~1_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(\altera_internal_jtag~TMSUTAP ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [1]), + .prn(vcc)); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[1] .is_wysiwyg = "true"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X47_Y25_N0 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~2 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [8]), + .datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [1]), + .datac(\altera_internal_jtag~TMSUTAP ), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [15]), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~2_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~2 .lut_mask = 16'hF0E0; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X47_Y25_N1 +dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[2] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~2_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [2]), + .prn(vcc)); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[2] .is_wysiwyg = "true"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X47_Y24_N20 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~3 ( + .dataa(gnd), + .datab(\altera_internal_jtag~TMSUTAP ), + .datac(gnd), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [2]), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~3_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~3 .lut_mask = 16'h3300; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X47_Y24_N21 +dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[3] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~3_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]), + .prn(vcc)); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[3] .is_wysiwyg = "true"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[3] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X47_Y17_N0 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[0]~15 ( + .dataa(gnd), + .datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [0]), + .datac(gnd), + .datad(vcc), + .cin(gnd), + .combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[0]~15_combout ), + .cout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[0]~16 )); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[0]~15 .lut_mask = 16'h33CC; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[0]~15 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X47_Y17_N2 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[1]~18 ( + .dataa(gnd), + .datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [1]), + .datac(gnd), + .datad(vcc), + .cin(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[0]~16 ), + .combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[1]~18_combout ), + .cout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[1]~19 )); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[1]~18 .lut_mask = 16'h3C3F; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[1]~18 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X47_Y17_N4 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[2]~20 ( + .dataa(gnd), + .datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [2]), + .datac(gnd), + .datad(vcc), + .cin(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[1]~19 ), + .combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[2]~20_combout ), + .cout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[2]~21 )); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[2]~20 .lut_mask = 16'hC30C; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[2]~20 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X47_Y17_N6 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[3]~22 ( + .dataa(gnd), + .datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [3]), + .datac(gnd), + .datad(vcc), + .cin(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[2]~21 ), + .combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[3]~22_combout ), + .cout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[3]~23 )); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[3]~22 .lut_mask = 16'h3C3F; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[3]~22 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X47_Y17_N8 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[4]~24 ( + .dataa(gnd), + .datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [4]), + .datac(gnd), + .datad(vcc), + .cin(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[3]~23 ), + .combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[4]~24_combout ), + .cout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[4]~25 )); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[4]~24 .lut_mask = 16'hC30C; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[4]~24 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X47_Y17_N10 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[5]~26 ( + .dataa(gnd), + .datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [5]), + .datac(gnd), + .datad(vcc), + .cin(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[4]~25 ), + .combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[5]~26_combout ), + .cout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[5]~27 )); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[5]~26 .lut_mask = 16'h3C3F; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[5]~26 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X47_Y17_N12 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[6]~28 ( + .dataa(gnd), + .datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [6]), + .datac(gnd), + .datad(vcc), + .cin(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[5]~27 ), + .combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[6]~28_combout ), + .cout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[6]~29 )); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[6]~28 .lut_mask = 16'hC30C; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[6]~28 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X47_Y17_N14 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[7]~30 ( + .dataa(gnd), + .datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [7]), + .datac(gnd), + .datad(vcc), + .cin(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[6]~29 ), + .combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[7]~30_combout ), + .cout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[7]~31 )); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[7]~30 .lut_mask = 16'h3C3F; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[7]~30 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X47_Y17_N16 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[8]~32 ( + .dataa(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [8]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[7]~31 ), + .combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[8]~32_combout ), + .cout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[8]~33 )); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[8]~32 .lut_mask = 16'hA50A; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[8]~32 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X47_Y17_N18 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[9]~34 ( + .dataa(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [9]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[8]~33 ), + .combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[9]~34_combout ), + .cout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[9]~35 )); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[9]~34 .lut_mask = 16'h5A5F; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[9]~34 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X47_Y17_N20 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[10]~36 ( + .dataa(gnd), + .datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [10]), + .datac(gnd), + .datad(vcc), + .cin(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[9]~35 ), + .combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[10]~36_combout ), + .cout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[10]~37 )); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[10]~36 .lut_mask = 16'hC30C; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[10]~36 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X47_Y17_N22 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[11]~38 ( + .dataa(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [11]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[10]~37 ), + .combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[11]~38_combout ), + .cout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[11]~39 )); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[11]~38 .lut_mask = 16'h5A5F; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[11]~38 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X47_Y17_N24 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[12]~40 ( + .dataa(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [12]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[11]~39 ), + .combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[12]~40_combout ), + .cout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[12]~41 )); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[12]~40 .lut_mask = 16'hA50A; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[12]~40 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X47_Y17_N26 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[13]~42 ( + .dataa(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [13]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[12]~41 ), + .combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[13]~42_combout ), + .cout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[13]~43 )); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[13]~42 .lut_mask = 16'h5A5F; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[13]~42 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X47_Y17_N28 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[14]~44 ( + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [14]), + .cin(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[13]~43 ), + .combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[14]~44_combout ), + .cout()); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[14]~44 .lut_mask = 16'hF00F; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[14]~44 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X46_Y21_N20 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~0 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~q ), + .datab(gnd), + .datac(gnd), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][4]~q ), + .cin(gnd), + .combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~0_combout ), + .cout()); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~0 .lut_mask = 16'hFFAA; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X46_Y17_N18 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[1]~feeder ( + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [1]), + .cin(gnd), + .combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[1]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[1]~feeder .lut_mask = 16'hFF00; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[1]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X46_Y17_N19 +dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[1] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[1]~feeder_combout ), + .asdata(vcc), + .clrn(!\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~0_combout ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg [1]), + .prn(vcc)); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[1] .is_wysiwyg = "true"; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X46_Y21_N8 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~0 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]), + .datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [3]), + .datac(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg [1]), + .datad(gnd), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~0_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~0 .lut_mask = 16'hE4E4; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X46_Y25_N5 +dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[9] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(gnd), + .asdata(\altera_internal_jtag~TDIUTAP ), + .clrn(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [0]), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [11]), + .devclrn(devclrn), + .devpor(devpor), + .q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg [9]), + .prn(vcc)); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[9] .is_wysiwyg = "true"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[9] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X46_Y25_N15 +dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[8] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(gnd), + .asdata(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg [9]), + .clrn(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [0]), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [11]), + .devclrn(devclrn), + .devpor(devpor), + .q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg [8]), + .prn(vcc)); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[8] .is_wysiwyg = "true"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[8] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X46_Y25_N25 +dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[7] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(gnd), + .asdata(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg [8]), + .clrn(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [0]), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [11]), + .devclrn(devclrn), + .devpor(devpor), + .q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg [7]), + .prn(vcc)); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[7] .is_wysiwyg = "true"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[7] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X46_Y25_N26 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[6]~feeder ( + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg [7]), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[6]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[6]~feeder .lut_mask = 16'hFF00; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[6]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X46_Y25_N27 +dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[6] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[6]~feeder_combout ), + .asdata(vcc), + .clrn(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [0]), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [11]), + .devclrn(devclrn), + .devpor(devpor), + .q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg [6]), + .prn(vcc)); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[6] .is_wysiwyg = "true"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[6] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X46_Y25_N23 +dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[5] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(gnd), + .asdata(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg [6]), + .clrn(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [0]), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [11]), + .devclrn(devclrn), + .devpor(devpor), + .q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg [5]), + .prn(vcc)); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[5] .is_wysiwyg = "true"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[5] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X46_Y25_N16 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[4]~feeder ( + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg [5]), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[4]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[4]~feeder .lut_mask = 16'hFF00; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[4]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X46_Y25_N17 +dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[4] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[4]~feeder_combout ), + .asdata(vcc), + .clrn(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [0]), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [11]), + .devclrn(devclrn), + .devpor(devpor), + .q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg [4]), + .prn(vcc)); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[4] .is_wysiwyg = "true"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[4] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X46_Y25_N28 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[3]~feeder ( + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg [4]), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[3]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[3]~feeder .lut_mask = 16'hFF00; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[3]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X46_Y25_N29 +dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[3] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[3]~feeder_combout ), + .asdata(vcc), + .clrn(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [0]), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [11]), + .devclrn(devclrn), + .devpor(devpor), + .q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg [3]), + .prn(vcc)); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[3] .is_wysiwyg = "true"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[3] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X46_Y25_N10 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[2]~0 ( + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg [3]), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[2]~0_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[2]~0 .lut_mask = 16'h00FF; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[2]~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X46_Y25_N11 +dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[2] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[2]~0_combout ), + .asdata(vcc), + .clrn(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [0]), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [11]), + .devclrn(devclrn), + .devpor(devpor), + .q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg [2]), + .prn(vcc)); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[2] .is_wysiwyg = "true"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X46_Y25_N20 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[1]~feeder ( + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg [2]), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[1]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[1]~feeder .lut_mask = 16'hFF00; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[1]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X46_Y25_N21 +dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[1] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[1]~feeder_combout ), + .asdata(vcc), + .clrn(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [0]), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [11]), + .devclrn(devclrn), + .devpor(devpor), + .q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg [1]), + .prn(vcc)); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[1] .is_wysiwyg = "true"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X46_Y25_N30 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[0]~1 ( + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg [1]), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[0]~1_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[0]~1 .lut_mask = 16'h00FF; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[0]~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X46_Y25_N31 +dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[0] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[0]~1_combout ), + .asdata(vcc), + .clrn(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [0]), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [11]), + .devclrn(devclrn), + .devpor(devpor), + .q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg [0]), + .prn(vcc)); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[0] .is_wysiwyg = "true"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X46_Y25_N22 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Equal0~1 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg [2]), + .datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg [4]), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg [5]), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg [3]), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Equal0~1_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Equal0~1 .lut_mask = 16'h0100; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Equal0~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X46_Y25_N14 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Equal0~0 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg [6]), + .datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg [9]), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg [8]), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg [7]), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Equal0~0_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Equal0~0 .lut_mask = 16'h0001; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Equal0~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X46_Y25_N8 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Equal1~0 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg [0]), + .datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg [1]), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Equal0~1_combout ), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Equal0~0_combout ), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Equal1~0_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Equal1~0 .lut_mask = 16'h1000; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Equal1~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X46_Y25_N9 +dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Equal1~0_combout ), + .asdata(vcc), + .clrn(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [0]), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_dr_scan_proc~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ), + .prn(vcc)); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg .is_wysiwyg = "true"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X45_Y24_N4 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|reset_ena_reg_proc~0 ( + .dataa(\altera_internal_jtag~TMSUTAP ), + .datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [5]), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [7]), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|reset_ena_reg_proc~0_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|reset_ena_reg_proc~0 .lut_mask = 16'hA800; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|reset_ena_reg_proc~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X45_Y24_N22 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|reset_ena_reg~feeder ( + .dataa(gnd), + .datab(gnd), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|reset_ena_reg_proc~0_combout ), + .datad(gnd), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|reset_ena_reg~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|reset_ena_reg~feeder .lut_mask = 16'hF0F0; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|reset_ena_reg~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X45_Y24_N23 +dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|reset_ena_reg ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|reset_ena_reg~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|reset_ena_reg~q ), + .prn(vcc)); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|reset_ena_reg .is_wysiwyg = "true"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|reset_ena_reg .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X46_Y24_N14 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[1]~2 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg [1]), + .datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [0]), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [2]), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [1]), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[1]~2_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[1]~2 .lut_mask = 16'hA2A4; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[1]~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X45_Y24_N16 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~4 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]), + .datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [7]), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [4]), + .datad(gnd), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~4_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~4 .lut_mask = 16'hFEFE; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X45_Y24_N17 +dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~4_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(\altera_internal_jtag~TMSUTAP ), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [4]), + .prn(vcc)); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4] .is_wysiwyg = "true"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X47_Y24_N16 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~5 ( + .dataa(gnd), + .datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [4]), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [8]), + .datad(\altera_internal_jtag~TDIUTAP ), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~5_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~5 .lut_mask = 16'hFC30; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X47_Y24_N14 +fiftyfivenm_lcell_comb \~QIC_CREATED_GND~I ( +// Equation(s): +// \~QIC_CREATED_GND~I_combout = GND + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .cin(gnd), + .combout(\~QIC_CREATED_GND~I_combout ), + .cout()); +// synopsys translate_off +defparam \~QIC_CREATED_GND~I .lut_mask = 16'h0000; +defparam \~QIC_CREATED_GND~I .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X47_Y24_N17 +dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[8] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~5_combout ), + .asdata(\~QIC_CREATED_GND~I_combout ), + .clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ), + .aload(gnd), + .sclr(gnd), + .sload(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]), + .ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ), + .devclrn(devclrn), + .devpor(devpor), + .q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [8]), + .prn(vcc)); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[8] .is_wysiwyg = "true"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[8] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X47_Y24_N8 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[1]~1 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~8_combout ), + .datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ), + .datac(gnd), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [8]), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[1]~1_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[1]~1 .lut_mask = 16'h0088; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[1]~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X46_Y24_N28 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[2]~0 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [1]), + .datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [2]), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [0]), + .datad(gnd), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[2]~0_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[2]~0 .lut_mask = 16'h8080; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[2]~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X47_Y24_N30 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[1]~3 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[1]~2_combout ), + .datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[1]~1_combout ), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg [1]), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[2]~0_combout ), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[1]~3_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[1]~3 .lut_mask = 16'hF878; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[1]~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X47_Y24_N31 +dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[1] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[1]~3_combout ), + .asdata(vcc), + .clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg [1]), + .prn(vcc)); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[1] .is_wysiwyg = "true"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X46_Y24_N8 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[2]~4 ( + .dataa(gnd), + .datab(gnd), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg [1]), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [8]), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[2]~4_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[2]~4 .lut_mask = 16'h000F; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[2]~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X45_Y24_N6 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[2]~5 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|reset_ena_reg~q ), + .datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[2]~4_combout ), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg [2]), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[2]~0_combout ), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[2]~5_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[2]~5 .lut_mask = 16'hD850; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[2]~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X45_Y24_N7 +dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[2] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[2]~5_combout ), + .asdata(vcc), + .clrn(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg [2]), + .prn(vcc)); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[2] .is_wysiwyg = "true"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X47_Y25_N14 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg_proc~0 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg [2]), + .datab(gnd), + .datac(gnd), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [1]), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg_proc~0_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg_proc~0 .lut_mask = 16'hAA00; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg_proc~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X47_Y25_N15 +dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg_proc~0_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ), + .prn(vcc)); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg .is_wysiwyg = "true"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X46_Y21_N30 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~1 ( + .dataa(gnd), + .datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [3]), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg [0]), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [8]), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~1_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~1 .lut_mask = 16'hCFC0; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X46_Y21_N16 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[2]~2 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~1_combout ), + .datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [4]), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[2]~2_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[2]~2 .lut_mask = 16'hAC00; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[2]~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X46_Y21_N9 +dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[2] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~0_combout ), + .asdata(vcc), + .clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[2]~2_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [2]), + .prn(vcc)); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[2] .is_wysiwyg = "true"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X46_Y24_N0 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg~6 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [1]), + .datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [0]), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [2]), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [8]), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg~6_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg~6 .lut_mask = 16'h0008; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg~6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X46_Y24_N1 +dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[0] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg~6_combout ), + .asdata(vcc), + .clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|reset_ena_reg_proc~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg [0]), + .prn(vcc)); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[0] .is_wysiwyg = "true"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X46_Y21_N28 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[3]~7 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]), + .datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg [0]), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [4]), + .datad(gnd), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[3]~7_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[3]~7 .lut_mask = 16'hD8D8; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[3]~7 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X46_Y21_N14 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[3]~8 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[3]~7_combout ), + .datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [3]), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [8]), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[3]~8_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[3]~8 .lut_mask = 16'hFABA; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[3]~8 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X46_Y17_N4 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[2]~feeder ( + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [2]), + .cin(gnd), + .combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[2]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[2]~feeder .lut_mask = 16'hFF00; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[2]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X46_Y17_N5 +dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[2] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[2]~feeder_combout ), + .asdata(vcc), + .clrn(!\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~0_combout ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg [2]), + .prn(vcc)); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[2] .is_wysiwyg = "true"; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X46_Y21_N26 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[3]~6 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~1_combout ), + .datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg [2]), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [4]), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[3]~6_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[3]~6 .lut_mask = 16'h8F80; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[3]~6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X46_Y22_N8 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[3]~9 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[3]~8_combout ), + .datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [3]), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[3]~6_combout ), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[3]~9_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[3]~9 .lut_mask = 16'hF870; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[3]~9 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X46_Y22_N9 +dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[3] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[3]~9_combout ), + .asdata(vcc), + .clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [3]), + .prn(vcc)); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[3] .is_wysiwyg = "true"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[3] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X47_Y24_N22 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~0 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~8_combout ), + .datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ), + .datac(gnd), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [8]), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~0_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~0 .lut_mask = 16'h8800; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X47_Y21_N31 +dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][3] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(gnd), + .asdata(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [3]), + .clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][3] .is_wysiwyg = "true"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][3] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X47_Y24_N10 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena_proc~0 ( + .dataa(gnd), + .datab(\altera_internal_jtag~TMSUTAP ), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [4]), + .datad(gnd), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena_proc~0_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena_proc~0 .lut_mask = 16'hC0C0; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena_proc~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X46_Y25_N18 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Equal0~2 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg [0]), + .datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg [1]), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Equal0~1_combout ), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Equal0~0_combout ), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Equal0~2_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Equal0~2 .lut_mask = 16'h4000; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Equal0~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X46_Y25_N19 +dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_dr_scan_reg ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Equal0~2_combout ), + .asdata(vcc), + .clrn(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [0]), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_dr_scan_proc~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_dr_scan_reg~q ), + .prn(vcc)); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_dr_scan_reg .is_wysiwyg = "true"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_dr_scan_reg .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X47_Y24_N28 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena~2 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena_proc~0_combout ), + .datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_dr_scan_reg~q ), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [15]), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena~2_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena~2 .lut_mask = 16'hDC88; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X47_Y24_N12 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena~0 ( + .dataa(\altera_internal_jtag~TMSUTAP ), + .datab(\altera_internal_jtag~TDIUTAP ), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [4]), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [8]), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena~0_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena~0 .lut_mask = 16'hDF80; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X47_Y24_N0 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena~1 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena~0_combout ), + .datab(\altera_internal_jtag~TMSUTAP ), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg [1]), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [2]), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena~1_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena~1 .lut_mask = 16'h020A; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X47_Y24_N18 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena~3 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena_proc~1_combout ), + .datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena~2_combout ), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|splitter_nodes_receive_0 [3]), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena~1_combout ), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena~3_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena~3 .lut_mask = 16'hDC10; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X47_Y24_N19 +dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|splitter_nodes_receive_0[3] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena~3_combout ), + .asdata(vcc), + .clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|splitter_nodes_receive_0 [3]), + .prn(vcc)); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|splitter_nodes_receive_0[3] .is_wysiwyg = "true"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|splitter_nodes_receive_0[3] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X46_Y17_N14 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~1 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][3]~q ), + .datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [5]), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|splitter_nodes_receive_0 [3]), + .cin(gnd), + .combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~1_combout ), + .cout()); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~1 .lut_mask = 16'h0800; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X46_Y17_N29 +dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[6] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(gnd), + .asdata(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [6]), + .clrn(!\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~0_combout ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg [6]), + .prn(vcc)); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[6] .is_wysiwyg = "true"; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[6] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X46_Y21_N12 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~13 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]), + .datab(gnd), + .datac(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg [6]), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [8]), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~13_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~13 .lut_mask = 16'hF5A0; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~13 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X46_Y21_N13 +dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[7] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~13_combout ), + .asdata(vcc), + .clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[2]~2_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [7]), + .prn(vcc)); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[7] .is_wysiwyg = "true"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[7] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X46_Y17_N3 +dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[5] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(gnd), + .asdata(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [5]), + .clrn(!\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~0_combout ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg [5]), + .prn(vcc)); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[5] .is_wysiwyg = "true"; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[5] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X46_Y21_N2 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~12 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [7]), + .datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg [5]), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]), + .datad(gnd), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~12_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~12 .lut_mask = 16'hCACA; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~12 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X46_Y21_N3 +dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[6] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~12_combout ), + .asdata(vcc), + .clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[2]~2_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [6]), + .prn(vcc)); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[6] .is_wysiwyg = "true"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[6] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X46_Y17_N8 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[4]~feeder ( + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [4]), + .cin(gnd), + .combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[4]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[4]~feeder .lut_mask = 16'hFF00; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[4]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X46_Y17_N9 +dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[4] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[4]~feeder_combout ), + .asdata(vcc), + .clrn(!\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~0_combout ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg [4]), + .prn(vcc)); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[4] .is_wysiwyg = "true"; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[4] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X46_Y21_N0 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~11 ( + .dataa(gnd), + .datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [6]), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]), + .datad(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg [4]), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~11_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~11 .lut_mask = 16'hFC0C; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~11 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X46_Y21_N1 +dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[5] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~11_combout ), + .asdata(vcc), + .clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[2]~2_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [5]), + .prn(vcc)); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[5] .is_wysiwyg = "true"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[5] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X46_Y17_N23 +dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[3] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(gnd), + .asdata(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [3]), + .clrn(!\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~0_combout ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg [3]), + .prn(vcc)); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[3] .is_wysiwyg = "true"; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[3] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X46_Y21_N6 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~10 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]), + .datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [5]), + .datac(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg [3]), + .datad(gnd), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~10_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~10 .lut_mask = 16'hE4E4; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~10 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X46_Y21_N7 +dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[4] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~10_combout ), + .asdata(vcc), + .clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[2]~2_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [4]), + .prn(vcc)); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[4] .is_wysiwyg = "true"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[4] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X47_Y21_N24 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][4]~feeder ( + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [4]), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][4]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][4]~feeder .lut_mask = 16'hFF00; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][4]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X47_Y21_N25 +dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][4] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][4]~feeder_combout ), + .asdata(vcc), + .clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][4] .is_wysiwyg = "true"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][4] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X46_Y21_N24 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|is_in_use_reg~0 ( + .dataa(gnd), + .datab(gnd), + .datac(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|is_in_use_reg~q ), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][4]~q ), + .cin(gnd), + .combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|is_in_use_reg~0_combout ), + .cout()); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|is_in_use_reg~0 .lut_mask = 16'h00F0; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|is_in_use_reg~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X46_Y21_N25 +dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|is_in_use_reg ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|is_in_use_reg~0_combout ), + .asdata(vcc), + .clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ), + .aload(gnd), + .sclr(gnd), + .sload(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~q ), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|is_in_use_reg~q ), + .prn(vcc)); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|is_in_use_reg .is_wysiwyg = "true"; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|is_in_use_reg .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X46_Y21_N10 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~3 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]), + .datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|is_in_use_reg~q ), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [1]), + .datad(gnd), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~3_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~3 .lut_mask = 16'hD8D8; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X46_Y21_N11 +dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[0] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~3_combout ), + .asdata(vcc), + .clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[2]~2_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [0]), + .prn(vcc)); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[0] .is_wysiwyg = "true"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[0] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X47_Y21_N9 +dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(gnd), + .asdata(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [0]), + .clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0] .is_wysiwyg = "true"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X47_Y21_N18 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~4 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ), + .datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][3]~q ), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [4]), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|splitter_nodes_receive_0 [3]), + .cin(gnd), + .combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~4_combout ), + .cout()); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~4 .lut_mask = 16'h4000; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X47_Y21_N12 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][2]~feeder ( + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [2]), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][2]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][2]~feeder .lut_mask = 16'hFF00; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][2]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X47_Y21_N13 +dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][2] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][2]~feeder_combout ), + .asdata(vcc), + .clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][2] .is_wysiwyg = "true"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X47_Y21_N28 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_incr_addr~2 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ), + .datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|splitter_nodes_receive_0 [3]), + .datac(gnd), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][2]~q ), + .cin(gnd), + .combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_incr_addr~2_combout ), + .cout()); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_incr_addr~2 .lut_mask = 16'h4400; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_incr_addr~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X47_Y21_N14 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_incr_addr~0 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ), + .datab(gnd), + .datac(gnd), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|splitter_nodes_receive_0 [3]), + .cin(gnd), + .combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_incr_addr~0_combout ), + .cout()); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_incr_addr~0 .lut_mask = 16'h5500; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_incr_addr~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X47_Y21_N11 +dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][1] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(gnd), + .asdata(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [1]), + .clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][1] .is_wysiwyg = "true"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X47_Y21_N16 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~3 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][2]~q ), + .datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_incr_addr~0_combout ), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [4]), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][1]~q ), + .cin(gnd), + .combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~3_combout ), + .cout()); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~3 .lut_mask = 16'h3F7F; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X51_Y16_N12 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg[1]~0 ( + .dataa(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg [2]), + .datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg [0]), + .datac(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg [1]), + .datad(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~3_combout ), + .cin(gnd), + .combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg[1]~0_combout ), + .cout()); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg[1]~0 .lut_mask = 16'h703C; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg[1]~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X51_Y16_N13 +dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg[1] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg[1]~0_combout ), + .asdata(vcc), + .clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][3]~q ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg [1]), + .prn(vcc)); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg[1] .is_wysiwyg = "true"; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X51_Y16_N0 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg[0]~2 ( + .dataa(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~3_combout ), + .datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg [2]), + .datac(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg [0]), + .datad(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg [1]), + .cin(gnd), + .combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg[0]~2_combout ), + .cout()); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg[0]~2 .lut_mask = 16'h25A5; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg[0]~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X51_Y16_N1 +dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg[0] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg[0]~2_combout ), + .asdata(vcc), + .clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][3]~q ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg [0]), + .prn(vcc)); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg[0] .is_wysiwyg = "true"; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X51_Y16_N22 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg[2]~1 ( + .dataa(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~3_combout ), + .datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg [0]), + .datac(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg [2]), + .datad(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg [1]), + .cin(gnd), + .combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg[2]~1_combout ), + .cout()); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg[2]~1 .lut_mask = 16'h34F0; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg[2]~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X51_Y16_N23 +dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg[2] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg[2]~1_combout ), + .asdata(vcc), + .clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][3]~q ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg [2]), + .prn(vcc)); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg[2] .is_wysiwyg = "true"; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X51_Y16_N28 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_incr_addr~1 ( + .dataa(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg [2]), + .datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg [0]), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][1]~q ), + .datad(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg [1]), + .cin(gnd), + .combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_incr_addr~1_combout ), + .cout()); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_incr_addr~1 .lut_mask = 16'h0080; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_incr_addr~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X47_Y21_N22 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[0]~17 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [8]), + .datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~4_combout ), + .datac(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_incr_addr~2_combout ), + .datad(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_incr_addr~1_combout ), + .cin(gnd), + .combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[0]~17_combout ), + .cout()); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[0]~17 .lut_mask = 16'hFFEC; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[0]~17 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X47_Y17_N29 +dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[14] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[14]~44_combout ), + .asdata(\altera_internal_jtag~TDIUTAP ), + .clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~q ), + .aload(gnd), + .sclr(gnd), + .sload(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~4_combout ), + .ena(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[0]~17_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [14]), + .prn(vcc)); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[14] .is_wysiwyg = "true"; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[14] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X47_Y17_N27 +dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[13] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[13]~42_combout ), + .asdata(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [14]), + .clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~q ), + .aload(gnd), + .sclr(gnd), + .sload(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~4_combout ), + .ena(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[0]~17_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [13]), + .prn(vcc)); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[13] .is_wysiwyg = "true"; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[13] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X47_Y17_N25 +dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[12] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[12]~40_combout ), + .asdata(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [13]), + .clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~q ), + .aload(gnd), + .sclr(gnd), + .sload(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~4_combout ), + .ena(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[0]~17_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [12]), + .prn(vcc)); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[12] .is_wysiwyg = "true"; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[12] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X47_Y17_N23 +dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[11] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[11]~38_combout ), + .asdata(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [12]), + .clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~q ), + .aload(gnd), + .sclr(gnd), + .sload(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~4_combout ), + .ena(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[0]~17_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [11]), + .prn(vcc)); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[11] .is_wysiwyg = "true"; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[11] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X47_Y17_N21 +dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[10] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[10]~36_combout ), + .asdata(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [11]), + .clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~q ), + .aload(gnd), + .sclr(gnd), + .sload(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~4_combout ), + .ena(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[0]~17_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [10]), + .prn(vcc)); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[10] .is_wysiwyg = "true"; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[10] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X47_Y17_N19 +dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[9] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[9]~34_combout ), + .asdata(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [10]), + .clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~q ), + .aload(gnd), + .sclr(gnd), + .sload(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~4_combout ), + .ena(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[0]~17_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [9]), + .prn(vcc)); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[9] .is_wysiwyg = "true"; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[9] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X47_Y17_N17 +dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[8] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[8]~32_combout ), + .asdata(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [9]), + .clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~q ), + .aload(gnd), + .sclr(gnd), + .sload(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~4_combout ), + .ena(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[0]~17_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [8]), + .prn(vcc)); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[8] .is_wysiwyg = "true"; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[8] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X47_Y17_N15 +dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[7] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[7]~30_combout ), + .asdata(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [8]), + .clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~q ), + .aload(gnd), + .sclr(gnd), + .sload(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~4_combout ), + .ena(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[0]~17_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [7]), + .prn(vcc)); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[7] .is_wysiwyg = "true"; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[7] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X47_Y17_N13 +dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[6] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[6]~28_combout ), + .asdata(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [7]), + .clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~q ), + .aload(gnd), + .sclr(gnd), + .sload(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~4_combout ), + .ena(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[0]~17_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [6]), + .prn(vcc)); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[6] .is_wysiwyg = "true"; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[6] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X47_Y17_N11 +dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[5] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[5]~26_combout ), + .asdata(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [6]), + .clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~q ), + .aload(gnd), + .sclr(gnd), + .sload(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~4_combout ), + .ena(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[0]~17_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [5]), + .prn(vcc)); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[5] .is_wysiwyg = "true"; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[5] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X47_Y17_N9 +dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[4] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[4]~24_combout ), + .asdata(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [5]), + .clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~q ), + .aload(gnd), + .sclr(gnd), + .sload(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~4_combout ), + .ena(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[0]~17_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [4]), + .prn(vcc)); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[4] .is_wysiwyg = "true"; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X47_Y17_N7 +dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[3] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[3]~22_combout ), + .asdata(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [4]), + .clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~q ), + .aload(gnd), + .sclr(gnd), + .sload(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~4_combout ), + .ena(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[0]~17_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [3]), + .prn(vcc)); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[3] .is_wysiwyg = "true"; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X47_Y17_N5 +dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[2] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[2]~20_combout ), + .asdata(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [3]), + .clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~q ), + .aload(gnd), + .sclr(gnd), + .sload(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~4_combout ), + .ena(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[0]~17_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [2]), + .prn(vcc)); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[2] .is_wysiwyg = "true"; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X47_Y17_N3 +dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[1] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[1]~18_combout ), + .asdata(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [2]), + .clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~q ), + .aload(gnd), + .sclr(gnd), + .sload(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~4_combout ), + .ena(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[0]~17_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [1]), + .prn(vcc)); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[1] .is_wysiwyg = "true"; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X47_Y17_N1 +dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[0] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[0]~15_combout ), + .asdata(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [1]), + .clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~q ), + .aload(gnd), + .sclr(gnd), + .sload(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~4_combout ), + .ena(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[0]~17_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [0]), + .prn(vcc)); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[0] .is_wysiwyg = "true"; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[0] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X46_Y17_N17 +dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[0] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(gnd), + .asdata(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [0]), + .clrn(!\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~0_combout ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg [0]), + .prn(vcc)); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[0] .is_wysiwyg = "true"; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X46_Y21_N4 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~4 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]), + .datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg [0]), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [2]), + .datad(gnd), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~4_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~4 .lut_mask = 16'hD8D8; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X46_Y21_N5 +dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[1] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~4_combout ), + .asdata(vcc), + .clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[2]~2_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [1]), + .prn(vcc)); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[1] .is_wysiwyg = "true"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X47_Y24_N24 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_bypass_reg~0 ( + .dataa(gnd), + .datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [4]), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_bypass_reg~q ), + .datad(\altera_internal_jtag~TDIUTAP ), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_bypass_reg~0_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_bypass_reg~0 .lut_mask = 16'hFC30; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_bypass_reg~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X47_Y24_N25 +dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_bypass_reg ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_bypass_reg~0_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_bypass_reg~q ), + .prn(vcc)); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_bypass_reg .is_wysiwyg = "true"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_bypass_reg .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X47_Y24_N26 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~9 ( + .dataa(gnd), + .datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_bypass_reg~q ), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [8]), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~9_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~9 .lut_mask = 16'h0030; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~9 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X46_Y24_N30 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~10 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [1]), + .datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [0]), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [2]), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~9_combout ), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~10_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~10 .lut_mask = 16'hAE00; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~10 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X45_Y23_N22 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|clear_signal ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ), + .datab(gnd), + .datac(gnd), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [8]), + .cin(gnd), + .combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|clear_signal~combout ), + .cout()); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|clear_signal .lut_mask = 16'hAA00; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|clear_signal .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X44_Y23_N12 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[0]~5 ( + .dataa(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter [0]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(gnd), + .combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[0]~5_combout ), + .cout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[0]~6 )); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[0]~5 .lut_mask = 16'h55AA; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[0]~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X44_Y23_N14 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[1]~7 ( + .dataa(gnd), + .datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter [1]), + .datac(gnd), + .datad(vcc), + .cin(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[0]~6 ), + .combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[1]~7_combout ), + .cout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[1]~8 )); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[1]~7 .lut_mask = 16'h3C3F; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[1]~7 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X45_Y23_N26 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[4]~12 ( + .dataa(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|clear_signal~combout ), + .datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [4]), + .datac(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_incr_addr~0_combout ), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]), + .cin(gnd), + .combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[4]~12_combout ), + .cout()); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[4]~12 .lut_mask = 16'h9AAA; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[4]~12 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X44_Y23_N15 +dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[1] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[1]~7_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[4]~11_combout ), + .sload(gnd), + .ena(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[4]~12_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter [1]), + .prn(vcc)); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[1] .is_wysiwyg = "true"; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X44_Y23_N16 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[2]~9 ( + .dataa(gnd), + .datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter [2]), + .datac(gnd), + .datad(vcc), + .cin(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[1]~8 ), + .combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[2]~9_combout ), + .cout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[2]~10 )); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[2]~9 .lut_mask = 16'hC30C; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[2]~9 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X44_Y23_N17 +dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[2] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[2]~9_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[4]~11_combout ), + .sload(gnd), + .ena(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[4]~12_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter [2]), + .prn(vcc)); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[2] .is_wysiwyg = "true"; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X44_Y23_N0 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~7 ( + .dataa(gnd), + .datab(gnd), + .datac(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter [1]), + .datad(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter [2]), + .cin(gnd), + .combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~7_combout ), + .cout()); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~7 .lut_mask = 16'hF000; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~7 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X44_Y23_N18 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[3]~13 ( + .dataa(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter [3]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[2]~10 ), + .combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[3]~13_combout ), + .cout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[3]~14 )); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[3]~13 .lut_mask = 16'h5A5F; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[3]~13 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X44_Y23_N19 +dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[3] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[3]~13_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[4]~11_combout ), + .sload(gnd), + .ena(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[4]~12_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter [3]), + .prn(vcc)); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[3] .is_wysiwyg = "true"; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[3] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X44_Y23_N20 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[4]~15 ( + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter [4]), + .cin(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[3]~14 ), + .combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[4]~15_combout ), + .cout()); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[4]~15 .lut_mask = 16'hF00F; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[4]~15 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X44_Y23_N21 +dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[4] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[4]~15_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[4]~11_combout ), + .sload(gnd), + .ena(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[4]~12_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter [4]), + .prn(vcc)); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[4] .is_wysiwyg = "true"; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[4] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X44_Y23_N4 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~3 ( + .dataa(gnd), + .datab(gnd), + .datac(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter [3]), + .datad(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter [4]), + .cin(gnd), + .combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~3_combout ), + .cout()); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~3 .lut_mask = 16'h0F00; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X44_Y23_N10 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[4]~11 ( + .dataa(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter [0]), + .datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~7_combout ), + .datac(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~3_combout ), + .datad(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|clear_signal~combout ), + .cin(gnd), + .combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[4]~11_combout ), + .cout()); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[4]~11 .lut_mask = 16'hFF40; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[4]~11 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X44_Y23_N13 +dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[0] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[0]~5_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[4]~11_combout ), + .sload(gnd), + .ena(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[4]~12_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter [0]), + .prn(vcc)); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[0] .is_wysiwyg = "true"; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X44_Y23_N2 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~11 ( + .dataa(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter [0]), + .datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter [2]), + .datac(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter [1]), + .datad(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter [4]), + .cin(gnd), + .combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~11_combout ), + .cout()); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~11 .lut_mask = 16'hD0F2; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~11 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X44_Y23_N28 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~12 ( + .dataa(gnd), + .datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~11_combout ), + .datac(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter [3]), + .datad(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter [2]), + .cin(gnd), + .combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~12_combout ), + .cout()); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~12 .lut_mask = 16'h3FFC; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~12 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X45_Y23_N24 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~14 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ), + .datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [4]), + .datac(\altera_internal_jtag~TDIUTAP ), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [8]), + .cin(gnd), + .combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~14_combout ), + .cout()); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~14 .lut_mask = 16'h40C0; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~14 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X44_Y23_N6 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~15 ( + .dataa(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter [0]), + .datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter [2]), + .datac(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter [3]), + .datad(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter [4]), + .cin(gnd), + .combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~15_combout ), + .cout()); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~15 .lut_mask = 16'h0102; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~15 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X45_Y23_N18 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~0 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ), + .datab(gnd), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [4]), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [8]), + .cin(gnd), + .combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~0_combout ), + .cout()); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~0 .lut_mask = 16'h050F; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X45_Y23_N10 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~16 ( + .dataa(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter [1]), + .datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~14_combout ), + .datac(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~15_combout ), + .datad(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~0_combout ), + .cin(gnd), + .combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~16_combout ), + .cout()); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~16 .lut_mask = 16'hDCCC; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~16 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X45_Y23_N28 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~17 ( + .dataa(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter [0]), + .datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter [3]), + .datac(gnd), + .datad(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter [4]), + .cin(gnd), + .combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~17_combout ), + .cout()); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~17 .lut_mask = 16'h4466; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~17 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X45_Y23_N6 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~18 ( + .dataa(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~16_combout ), + .datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~17_combout ), + .datac(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~7_combout ), + .datad(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~0_combout ), + .cin(gnd), + .combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~18_combout ), + .cout()); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~18 .lut_mask = 16'hEAAA; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~18 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X45_Y23_N8 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR[3]~6 ( + .dataa(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|clear_signal~combout ), + .datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [4]), + .datac(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_incr_addr~0_combout ), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]), + .cin(gnd), + .combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR[3]~6_combout ), + .cout()); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR[3]~6 .lut_mask = 16'h5A6A; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR[3]~6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X45_Y23_N7 +dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR[3] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~18_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR[3]~6_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR [3]), + .prn(vcc)); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR[3] .is_wysiwyg = "true"; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR[3] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X45_Y23_N20 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~13 ( + .dataa(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|clear_signal~combout ), + .datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~12_combout ), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [4]), + .datad(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR [3]), + .cin(gnd), + .combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~13_combout ), + .cout()); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~13 .lut_mask = 16'h5101; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~13 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X45_Y23_N21 +dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR[2] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~13_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR[3]~6_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR [2]), + .prn(vcc)); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR[2] .is_wysiwyg = "true"; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X44_Y23_N22 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~8 ( + .dataa(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter [3]), + .datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter [2]), + .datac(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter [1]), + .datad(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter [4]), + .cin(gnd), + .combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~8_combout ), + .cout()); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~8 .lut_mask = 16'h1909; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~8 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X44_Y23_N8 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~9 ( + .dataa(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~8_combout ), + .datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~0_combout ), + .datac(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter [3]), + .datad(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter [0]), + .cin(gnd), + .combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~9_combout ), + .cout()); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~9 .lut_mask = 16'h8008; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~9 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X45_Y23_N4 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~10 ( + .dataa(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|clear_signal~combout ), + .datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR [2]), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [4]), + .datad(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~9_combout ), + .cin(gnd), + .combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~10_combout ), + .cout()); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~10 .lut_mask = 16'hFF40; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~10 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X45_Y23_N5 +dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR[1] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~10_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR[3]~6_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR [1]), + .prn(vcc)); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR[1] .is_wysiwyg = "true"; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X44_Y23_N26 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~2 ( + .dataa(gnd), + .datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter [2]), + .datac(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter [1]), + .datad(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter [0]), + .cin(gnd), + .combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~2_combout ), + .cout()); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~2 .lut_mask = 16'hFC03; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X44_Y23_N24 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~1 ( + .dataa(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter [3]), + .datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter [2]), + .datac(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter [1]), + .datad(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter [0]), + .cin(gnd), + .combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~1_combout ), + .cout()); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~1 .lut_mask = 16'h0880; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X44_Y23_N30 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~4 ( + .dataa(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~2_combout ), + .datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~1_combout ), + .datac(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~3_combout ), + .datad(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~0_combout ), + .cin(gnd), + .combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~4_combout ), + .cout()); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~4 .lut_mask = 16'hEC00; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X45_Y23_N16 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~5 ( + .dataa(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|clear_signal~combout ), + .datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR [1]), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [4]), + .datad(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~4_combout ), + .cin(gnd), + .combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~5_combout ), + .cout()); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~5 .lut_mask = 16'hFF40; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X45_Y23_N17 +dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR[0] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~5_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR[3]~6_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR [0]), + .prn(vcc)); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR[0] .is_wysiwyg = "true"; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR[0] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X47_Y21_N27 +dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][5] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(gnd), + .asdata(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [5]), + .clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][5]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][5] .is_wysiwyg = "true"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][5] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X47_Y21_N0 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|bypass_reg_out~0 ( + .dataa(\altera_internal_jtag~TDIUTAP ), + .datab(gnd), + .datac(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|bypass_reg_out~q ), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|splitter_nodes_receive_0 [3]), + .cin(gnd), + .combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|bypass_reg_out~0_combout ), + .cout()); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|bypass_reg_out~0 .lut_mask = 16'hAAF0; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|bypass_reg_out~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X47_Y21_N1 +dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|bypass_reg_out ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|bypass_reg_out~0_combout ), + .asdata(vcc), + .clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|bypass_reg_out~q ), + .prn(vcc)); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|bypass_reg_out .is_wysiwyg = "true"; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|bypass_reg_out .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X47_Y21_N2 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|adapted_tdo~0 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][5]~q ), + .datab(gnd), + .datac(gnd), + .datad(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|bypass_reg_out~q ), + .cin(gnd), + .combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|adapted_tdo~0_combout ), + .cout()); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|adapted_tdo~0 .lut_mask = 16'h5500; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|adapted_tdo~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X51_Y16_N26 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~2 ( + .dataa(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg [2]), + .datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg [0]), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][1]~q ), + .datad(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg [1]), + .cin(gnd), + .combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~2_combout ), + .cout()); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~2 .lut_mask = 16'h8000; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X47_Y16_N0 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode236w[2]~0 ( +// Equation(s): +// \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode236w[2]~0_combout = (\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [13] & !\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [14]) + + .dataa(gnd), + .datab(gnd), + .datac(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [13]), + .datad(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [14]), + .cin(gnd), + .combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode236w[2]~0_combout ), + .cout()); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode236w[2]~0 .lut_mask = 16'h00F0; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode236w[2]~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: M9K_X53_Y20_N0 +fiftyfivenm_ram_block \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12 ( + .portawe(gnd), + .portare(vcc), + .portaaddrstall(gnd), + .portbwe(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode236w [2]), + .portbre(vcc), + .portbaddrstall(gnd), + .clk0(\clk~inputclkctrl_outclk ), + .clk1(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .ena0(\main_memory|altsyncram_component|auto_generated|rden_decode|w_anode284w[2]~0_combout ), + .ena1(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode236w[2]~0_combout ), + .ena2(vcc), + .ena3(vcc), + .clr0(gnd), + .clr1(gnd), + .portadatain({vcc}), + .portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o , +\cpu_addr[0]~input_o }), + .portabyteenamasks(1'b1), + .portbdatain({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [4]}), + .portbaddr({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [12],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [11],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [10], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [9],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [8],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [7], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [6],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [5],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [4], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [3],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [2],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [1], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [0]}), + .portbbyteenamasks(1'b1), + .devclrn(devclrn), + .devpor(devpor), + .portadataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12_PORTADATAOUT_bus ), + .portbdataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12_PORTBDATAOUT_bus )); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12 .clk0_core_clock_enable = "ena0"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12 .clk1_core_clock_enable = "ena1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12 .data_interleave_offset_in_bits = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12 .data_interleave_width_in_bits = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12 .logical_ram_name = "rom:boot_rom|altsyncram:altsyncram_component|altsyncram_b7b1:auto_generated|altsyncram_kqc2:altsyncram1|ALTSYNCRAM"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12 .mixed_port_feed_through_mode = "dont_care"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12 .operation_mode = "bidir_dual_port"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12 .port_a_address_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12 .port_a_address_width = 13; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12 .port_a_byte_enable_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12 .port_a_data_out_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12 .port_a_data_out_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12 .port_a_data_width = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12 .port_a_first_address = 0; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12 .port_a_first_bit_number = 4; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12 .port_a_last_address = 8191; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12 .port_a_logical_ram_depth = 32768; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12 .port_a_logical_ram_width = 8; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12 .port_a_read_during_write_mode = "new_data_with_nbe_read"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12 .port_b_address_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12 .port_b_address_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12 .port_b_address_width = 13; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12 .port_b_data_in_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12 .port_b_data_out_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12 .port_b_data_out_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12 .port_b_data_width = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12 .port_b_first_address = 0; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12 .port_b_first_bit_number = 4; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12 .port_b_last_address = 8191; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12 .port_b_logical_ram_depth = 32768; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12 .port_b_logical_ram_width = 8; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12 .port_b_read_during_write_mode = "new_data_with_nbe_read"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12 .port_b_read_enable_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12 .port_b_write_enable_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12 .ram_block_type = "M9K"; +// synopsys translate_on + +// Location: LCCOMB_X52_Y16_N24 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b[0]~feeder ( +// Equation(s): +// \boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b[0]~feeder_combout = \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [13] + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [13]), + .cin(gnd), + .combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b[0]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b[0]~feeder .lut_mask = 16'hFF00; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b[0]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X52_Y16_N25 +dffeas \boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b[0] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b[0]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [0]), + .prn(vcc)); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b[0] .is_wysiwyg = "true"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X46_Y17_N24 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode252w[2] ( +// Equation(s): +// \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode252w [2] = +// (\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [5] & +// (\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [14] & (\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [13] & \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_incr_addr~2_combout ))) + + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [5]), + .datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [14]), + .datac(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [13]), + .datad(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_incr_addr~2_combout ), + .cin(gnd), + .combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode252w [2]), + .cout()); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode252w[2] .lut_mask = 16'h8000; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode252w[2] .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X51_Y16_N30 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode252w[2]~0 ( +// Equation(s): +// \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode252w[2]~0_combout = (\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [13] & \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [14]) + + .dataa(gnd), + .datab(gnd), + .datac(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [13]), + .datad(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [14]), + .cin(gnd), + .combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode252w[2]~0_combout ), + .cout()); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode252w[2]~0 .lut_mask = 16'hF000; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode252w[2]~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: M9K_X53_Y21_N0 +fiftyfivenm_ram_block \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28 ( + .portawe(gnd), + .portare(vcc), + .portaaddrstall(gnd), + .portbwe(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode252w [2]), + .portbre(vcc), + .portbaddrstall(gnd), + .clk0(\clk~inputclkctrl_outclk ), + .clk1(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .ena0(\main_memory|altsyncram_component|auto_generated|rden_decode|w_anode284w[2]~2_combout ), + .ena1(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode252w[2]~0_combout ), + .ena2(vcc), + .ena3(vcc), + .clr0(gnd), + .clr1(gnd), + .portadatain({vcc}), + .portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o , +\cpu_addr[0]~input_o }), + .portabyteenamasks(1'b1), + .portbdatain({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [4]}), + .portbaddr({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [12],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [11],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [10], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [9],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [8],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [7], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [6],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [5],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [4], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [3],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [2],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [1], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [0]}), + .portbbyteenamasks(1'b1), + .devclrn(devclrn), + .devpor(devpor), + .portadataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28_PORTADATAOUT_bus ), + .portbdataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28_PORTBDATAOUT_bus )); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28 .clk0_core_clock_enable = "ena0"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28 .clk1_core_clock_enable = "ena1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28 .data_interleave_offset_in_bits = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28 .data_interleave_width_in_bits = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28 .logical_ram_name = "rom:boot_rom|altsyncram:altsyncram_component|altsyncram_b7b1:auto_generated|altsyncram_kqc2:altsyncram1|ALTSYNCRAM"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28 .mixed_port_feed_through_mode = "dont_care"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28 .operation_mode = "bidir_dual_port"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28 .port_a_address_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28 .port_a_address_width = 13; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28 .port_a_byte_enable_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28 .port_a_data_out_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28 .port_a_data_out_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28 .port_a_data_width = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28 .port_a_first_address = 0; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28 .port_a_first_bit_number = 4; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28 .port_a_last_address = 8191; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28 .port_a_logical_ram_depth = 32768; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28 .port_a_logical_ram_width = 8; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28 .port_a_read_during_write_mode = "new_data_with_nbe_read"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28 .port_b_address_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28 .port_b_address_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28 .port_b_address_width = 13; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28 .port_b_data_in_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28 .port_b_data_out_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28 .port_b_data_out_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28 .port_b_data_width = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28 .port_b_first_address = 0; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28 .port_b_first_bit_number = 4; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28 .port_b_last_address = 8191; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28 .port_b_logical_ram_depth = 32768; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28 .port_b_logical_ram_width = 8; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28 .port_b_read_during_write_mode = "new_data_with_nbe_read"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28 .port_b_read_enable_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28 .port_b_write_enable_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28 .ram_block_type = "M9K"; +// synopsys translate_on + +// Location: LCCOMB_X46_Y17_N30 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode223w[2] ( +// Equation(s): +// \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode223w [2] = +// (\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [5] & +// (!\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [14] & (!\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [13] & \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_incr_addr~2_combout ))) + + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [5]), + .datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [14]), + .datac(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [13]), + .datad(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_incr_addr~2_combout ), + .cin(gnd), + .combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode223w [2]), + .cout()); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode223w[2] .lut_mask = 16'h0200; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode223w[2] .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X47_Y16_N2 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode223w[2]~0 ( +// Equation(s): +// \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode223w[2]~0_combout = (!\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [13] & !\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [14]) + + .dataa(gnd), + .datab(gnd), + .datac(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [13]), + .datad(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [14]), + .cin(gnd), + .combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode223w[2]~0_combout ), + .cout()); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode223w[2]~0 .lut_mask = 16'h000F; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode223w[2]~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: M9K_X53_Y15_N0 +fiftyfivenm_ram_block \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4 ( + .portawe(gnd), + .portare(vcc), + .portaaddrstall(gnd), + .portbwe(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode223w [2]), + .portbre(vcc), + .portbaddrstall(gnd), + .clk0(\clk~inputclkctrl_outclk ), + .clk1(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .ena0(\main_memory|altsyncram_component|auto_generated|rden_decode|w_anode261w[2]~0_combout ), + .ena1(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode223w[2]~0_combout ), + .ena2(vcc), + .ena3(vcc), + .clr0(gnd), + .clr1(gnd), + .portadatain({vcc}), + .portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o , +\cpu_addr[0]~input_o }), + .portabyteenamasks(1'b1), + .portbdatain({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [4]}), + .portbaddr({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [12],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [11],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [10], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [9],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [8],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [7], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [6],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [5],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [4], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [3],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [2],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [1], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [0]}), + .portbbyteenamasks(1'b1), + .devclrn(devclrn), + .devpor(devpor), + .portadataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4_PORTADATAOUT_bus ), + .portbdataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4_PORTBDATAOUT_bus )); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4 .clk0_core_clock_enable = "ena0"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4 .clk1_core_clock_enable = "ena1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4 .data_interleave_offset_in_bits = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4 .data_interleave_width_in_bits = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4 .logical_ram_name = "rom:boot_rom|altsyncram:altsyncram_component|altsyncram_b7b1:auto_generated|altsyncram_kqc2:altsyncram1|ALTSYNCRAM"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4 .mixed_port_feed_through_mode = "dont_care"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4 .operation_mode = "bidir_dual_port"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4 .port_a_address_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4 .port_a_address_width = 13; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4 .port_a_byte_enable_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4 .port_a_data_out_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4 .port_a_data_out_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4 .port_a_data_width = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4 .port_a_first_address = 0; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4 .port_a_first_bit_number = 4; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4 .port_a_last_address = 8191; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4 .port_a_logical_ram_depth = 32768; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4 .port_a_logical_ram_width = 8; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4 .port_a_read_during_write_mode = "new_data_with_nbe_read"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4 .port_b_address_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4 .port_b_address_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4 .port_b_address_width = 13; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4 .port_b_data_in_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4 .port_b_data_out_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4 .port_b_data_out_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4 .port_b_data_width = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4 .port_b_first_address = 0; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4 .port_b_first_bit_number = 4; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4 .port_b_last_address = 8191; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4 .port_b_logical_ram_depth = 32768; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4 .port_b_logical_ram_width = 8; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4 .port_b_read_during_write_mode = "new_data_with_nbe_read"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4 .port_b_read_enable_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4 .port_b_write_enable_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4 .ram_block_type = "M9K"; +// synopsys translate_on + +// Location: LCCOMB_X46_Y17_N10 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode244w[2] ( +// Equation(s): +// \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode244w [2] = +// (\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [5] & +// (\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [14] & (!\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [13] & \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_incr_addr~2_combout ))) + + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [5]), + .datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [14]), + .datac(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [13]), + .datad(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_incr_addr~2_combout ), + .cin(gnd), + .combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode244w [2]), + .cout()); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode244w[2] .lut_mask = 16'h0800; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode244w[2] .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X46_Y17_N20 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode244w[2]~0 ( +// Equation(s): +// \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode244w[2]~0_combout = (!\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [13] & \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [14]) + + .dataa(gnd), + .datab(gnd), + .datac(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [13]), + .datad(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [14]), + .cin(gnd), + .combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode244w[2]~0_combout ), + .cout()); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode244w[2]~0 .lut_mask = 16'h0F00; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode244w[2]~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: M9K_X53_Y22_N0 +fiftyfivenm_ram_block \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20 ( + .portawe(gnd), + .portare(vcc), + .portaaddrstall(gnd), + .portbwe(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode244w [2]), + .portbre(vcc), + .portbaddrstall(gnd), + .clk0(\clk~inputclkctrl_outclk ), + .clk1(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .ena0(\main_memory|altsyncram_component|auto_generated|rden_decode|w_anode284w[2]~1_combout ), + .ena1(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode244w[2]~0_combout ), + .ena2(vcc), + .ena3(vcc), + .clr0(gnd), + .clr1(gnd), + .portadatain({vcc}), + .portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o , +\cpu_addr[0]~input_o }), + .portabyteenamasks(1'b1), + .portbdatain({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [4]}), + .portbaddr({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [12],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [11],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [10], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [9],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [8],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [7], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [6],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [5],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [4], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [3],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [2],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [1], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [0]}), + .portbbyteenamasks(1'b1), + .devclrn(devclrn), + .devpor(devpor), + .portadataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20_PORTADATAOUT_bus ), + .portbdataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20_PORTBDATAOUT_bus )); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20 .clk0_core_clock_enable = "ena0"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20 .clk1_core_clock_enable = "ena1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20 .data_interleave_offset_in_bits = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20 .data_interleave_width_in_bits = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20 .logical_ram_name = "rom:boot_rom|altsyncram:altsyncram_component|altsyncram_b7b1:auto_generated|altsyncram_kqc2:altsyncram1|ALTSYNCRAM"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20 .mixed_port_feed_through_mode = "dont_care"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20 .operation_mode = "bidir_dual_port"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20 .port_a_address_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20 .port_a_address_width = 13; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20 .port_a_byte_enable_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20 .port_a_data_out_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20 .port_a_data_out_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20 .port_a_data_width = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20 .port_a_first_address = 0; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20 .port_a_first_bit_number = 4; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20 .port_a_last_address = 8191; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20 .port_a_logical_ram_depth = 32768; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20 .port_a_logical_ram_width = 8; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20 .port_a_read_during_write_mode = "new_data_with_nbe_read"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20 .port_b_address_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20 .port_b_address_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20 .port_b_address_width = 13; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20 .port_b_data_in_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20 .port_b_data_out_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20 .port_b_data_out_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20 .port_b_data_width = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20 .port_b_first_address = 0; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20 .port_b_first_bit_number = 4; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20 .port_b_last_address = 8191; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20 .port_b_logical_ram_depth = 32768; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20 .port_b_logical_ram_width = 8; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20 .port_b_read_during_write_mode = "new_data_with_nbe_read"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20 .port_b_read_enable_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20 .port_b_write_enable_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20 .ram_block_type = "M9K"; +// synopsys translate_on + +// Location: FF_X52_Y16_N11 +dffeas \boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b[1] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(gnd), + .asdata(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [14]), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [1]), + .prn(vcc)); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b[1] .is_wysiwyg = "true"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X52_Y16_N20 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[4]~8 ( +// Equation(s): +// \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[4]~8_combout = (\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [0] & (((\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [1])))) # +// (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [0] & ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [1] & ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20~PORTBDATAOUT0 ))) # +// (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [1] & (\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4~PORTBDATAOUT0 )))) + + .dataa(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4~PORTBDATAOUT0 ), + .datab(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [0]), + .datac(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20~PORTBDATAOUT0 ), + .datad(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [1]), + .cin(gnd), + .combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[4]~8_combout ), + .cout()); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[4]~8 .lut_mask = 16'hFC22; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[4]~8 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X52_Y16_N30 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[4]~9 ( +// Equation(s): +// \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[4]~9_combout = (\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [0] & +// ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[4]~8_combout & ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28~PORTBDATAOUT0 ))) # +// (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[4]~8_combout & (\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12~PORTBDATAOUT0 )))) # +// (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [0] & (((\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[4]~8_combout )))) + + .dataa(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12~PORTBDATAOUT0 ), + .datab(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [0]), + .datac(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28~PORTBDATAOUT0 ), + .datad(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[4]~8_combout ), + .cin(gnd), + .combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[4]~9_combout ), + .cout()); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[4]~9 .lut_mask = 16'hF388; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[4]~9 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: M9K_X33_Y18_N0 +fiftyfivenm_ram_block \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14 ( + .portawe(gnd), + .portare(vcc), + .portaaddrstall(gnd), + .portbwe(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode236w [2]), + .portbre(vcc), + .portbaddrstall(gnd), + .clk0(\clk~inputclkctrl_outclk ), + .clk1(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .ena0(\main_memory|altsyncram_component|auto_generated|rden_decode|w_anode284w[2]~0_combout ), + .ena1(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode236w[2]~0_combout ), + .ena2(vcc), + .ena3(vcc), + .clr0(gnd), + .clr1(gnd), + .portadatain({vcc}), + .portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o , +\cpu_addr[0]~input_o }), + .portabyteenamasks(1'b1), + .portbdatain({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [6]}), + .portbaddr({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [12],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [11],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [10], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [9],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [8],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [7], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [6],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [5],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [4], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [3],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [2],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [1], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [0]}), + .portbbyteenamasks(1'b1), + .devclrn(devclrn), + .devpor(devpor), + .portadataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14_PORTADATAOUT_bus ), + .portbdataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14_PORTBDATAOUT_bus )); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14 .clk0_core_clock_enable = "ena0"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14 .clk1_core_clock_enable = "ena1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14 .data_interleave_offset_in_bits = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14 .data_interleave_width_in_bits = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14 .logical_ram_name = "rom:boot_rom|altsyncram:altsyncram_component|altsyncram_b7b1:auto_generated|altsyncram_kqc2:altsyncram1|ALTSYNCRAM"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14 .mixed_port_feed_through_mode = "dont_care"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14 .operation_mode = "bidir_dual_port"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14 .port_a_address_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14 .port_a_address_width = 13; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14 .port_a_byte_enable_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14 .port_a_data_out_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14 .port_a_data_out_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14 .port_a_data_width = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14 .port_a_first_address = 0; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14 .port_a_first_bit_number = 6; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14 .port_a_last_address = 8191; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14 .port_a_logical_ram_depth = 32768; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14 .port_a_logical_ram_width = 8; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14 .port_a_read_during_write_mode = "new_data_with_nbe_read"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14 .port_b_address_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14 .port_b_address_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14 .port_b_address_width = 13; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14 .port_b_data_in_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14 .port_b_data_out_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14 .port_b_data_out_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14 .port_b_data_width = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14 .port_b_first_address = 0; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14 .port_b_first_bit_number = 6; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14 .port_b_last_address = 8191; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14 .port_b_logical_ram_depth = 32768; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14 .port_b_logical_ram_width = 8; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14 .port_b_read_during_write_mode = "new_data_with_nbe_read"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14 .port_b_read_enable_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14 .port_b_write_enable_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14 .ram_block_type = "M9K"; +// synopsys translate_on + +// Location: M9K_X33_Y22_N0 +fiftyfivenm_ram_block \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30 ( + .portawe(gnd), + .portare(vcc), + .portaaddrstall(gnd), + .portbwe(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode252w [2]), + .portbre(vcc), + .portbaddrstall(gnd), + .clk0(\clk~inputclkctrl_outclk ), + .clk1(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .ena0(\main_memory|altsyncram_component|auto_generated|rden_decode|w_anode284w[2]~2_combout ), + .ena1(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode252w[2]~0_combout ), + .ena2(vcc), + .ena3(vcc), + .clr0(gnd), + .clr1(gnd), + .portadatain({vcc}), + .portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o , +\cpu_addr[0]~input_o }), + .portabyteenamasks(1'b1), + .portbdatain({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [6]}), + .portbaddr({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [12],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [11],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [10], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [9],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [8],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [7], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [6],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [5],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [4], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [3],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [2],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [1], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [0]}), + .portbbyteenamasks(1'b1), + .devclrn(devclrn), + .devpor(devpor), + .portadataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30_PORTADATAOUT_bus ), + .portbdataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30_PORTBDATAOUT_bus )); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30 .clk0_core_clock_enable = "ena0"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30 .clk1_core_clock_enable = "ena1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30 .data_interleave_offset_in_bits = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30 .data_interleave_width_in_bits = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30 .logical_ram_name = "rom:boot_rom|altsyncram:altsyncram_component|altsyncram_b7b1:auto_generated|altsyncram_kqc2:altsyncram1|ALTSYNCRAM"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30 .mixed_port_feed_through_mode = "dont_care"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30 .operation_mode = "bidir_dual_port"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30 .port_a_address_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30 .port_a_address_width = 13; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30 .port_a_byte_enable_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30 .port_a_data_out_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30 .port_a_data_out_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30 .port_a_data_width = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30 .port_a_first_address = 0; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30 .port_a_first_bit_number = 6; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30 .port_a_last_address = 8191; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30 .port_a_logical_ram_depth = 32768; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30 .port_a_logical_ram_width = 8; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30 .port_a_read_during_write_mode = "new_data_with_nbe_read"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30 .port_b_address_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30 .port_b_address_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30 .port_b_address_width = 13; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30 .port_b_data_in_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30 .port_b_data_out_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30 .port_b_data_out_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30 .port_b_data_width = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30 .port_b_first_address = 0; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30 .port_b_first_bit_number = 6; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30 .port_b_last_address = 8191; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30 .port_b_logical_ram_depth = 32768; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30 .port_b_logical_ram_width = 8; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30 .port_b_read_during_write_mode = "new_data_with_nbe_read"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30 .port_b_read_enable_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30 .port_b_write_enable_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30 .ram_block_type = "M9K"; +// synopsys translate_on + +// Location: M9K_X33_Y15_N0 +fiftyfivenm_ram_block \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6 ( + .portawe(gnd), + .portare(vcc), + .portaaddrstall(gnd), + .portbwe(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode223w [2]), + .portbre(vcc), + .portbaddrstall(gnd), + .clk0(\clk~inputclkctrl_outclk ), + .clk1(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .ena0(\main_memory|altsyncram_component|auto_generated|rden_decode|w_anode261w[2]~0_combout ), + .ena1(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode223w[2]~0_combout ), + .ena2(vcc), + .ena3(vcc), + .clr0(gnd), + .clr1(gnd), + .portadatain({vcc}), + .portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o , +\cpu_addr[0]~input_o }), + .portabyteenamasks(1'b1), + .portbdatain({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [6]}), + .portbaddr({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [12],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [11],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [10], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [9],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [8],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [7], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [6],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [5],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [4], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [3],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [2],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [1], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [0]}), + .portbbyteenamasks(1'b1), + .devclrn(devclrn), + .devpor(devpor), + .portadataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6_PORTADATAOUT_bus ), + .portbdataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6_PORTBDATAOUT_bus )); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6 .clk0_core_clock_enable = "ena0"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6 .clk1_core_clock_enable = "ena1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6 .data_interleave_offset_in_bits = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6 .data_interleave_width_in_bits = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6 .logical_ram_name = "rom:boot_rom|altsyncram:altsyncram_component|altsyncram_b7b1:auto_generated|altsyncram_kqc2:altsyncram1|ALTSYNCRAM"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6 .mixed_port_feed_through_mode = "dont_care"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6 .operation_mode = "bidir_dual_port"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6 .port_a_address_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6 .port_a_address_width = 13; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6 .port_a_byte_enable_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6 .port_a_data_out_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6 .port_a_data_out_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6 .port_a_data_width = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6 .port_a_first_address = 0; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6 .port_a_first_bit_number = 6; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6 .port_a_last_address = 8191; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6 .port_a_logical_ram_depth = 32768; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6 .port_a_logical_ram_width = 8; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6 .port_a_read_during_write_mode = "new_data_with_nbe_read"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6 .port_b_address_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6 .port_b_address_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6 .port_b_address_width = 13; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6 .port_b_data_in_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6 .port_b_data_out_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6 .port_b_data_out_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6 .port_b_data_width = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6 .port_b_first_address = 0; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6 .port_b_first_bit_number = 6; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6 .port_b_last_address = 8191; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6 .port_b_logical_ram_depth = 32768; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6 .port_b_logical_ram_width = 8; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6 .port_b_read_during_write_mode = "new_data_with_nbe_read"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6 .port_b_read_enable_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6 .port_b_write_enable_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6 .ram_block_type = "M9K"; +// synopsys translate_on + +// Location: M9K_X33_Y19_N0 +fiftyfivenm_ram_block \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22 ( + .portawe(gnd), + .portare(vcc), + .portaaddrstall(gnd), + .portbwe(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode244w [2]), + .portbre(vcc), + .portbaddrstall(gnd), + .clk0(\clk~inputclkctrl_outclk ), + .clk1(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .ena0(\main_memory|altsyncram_component|auto_generated|rden_decode|w_anode284w[2]~1_combout ), + .ena1(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode244w[2]~0_combout ), + .ena2(vcc), + .ena3(vcc), + .clr0(gnd), + .clr1(gnd), + .portadatain({vcc}), + .portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o , +\cpu_addr[0]~input_o }), + .portabyteenamasks(1'b1), + .portbdatain({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [6]}), + .portbaddr({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [12],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [11],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [10], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [9],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [8],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [7], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [6],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [5],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [4], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [3],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [2],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [1], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [0]}), + .portbbyteenamasks(1'b1), + .devclrn(devclrn), + .devpor(devpor), + .portadataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22_PORTADATAOUT_bus ), + .portbdataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22_PORTBDATAOUT_bus )); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22 .clk0_core_clock_enable = "ena0"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22 .clk1_core_clock_enable = "ena1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22 .data_interleave_offset_in_bits = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22 .data_interleave_width_in_bits = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22 .logical_ram_name = "rom:boot_rom|altsyncram:altsyncram_component|altsyncram_b7b1:auto_generated|altsyncram_kqc2:altsyncram1|ALTSYNCRAM"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22 .mixed_port_feed_through_mode = "dont_care"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22 .operation_mode = "bidir_dual_port"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22 .port_a_address_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22 .port_a_address_width = 13; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22 .port_a_byte_enable_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22 .port_a_data_out_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22 .port_a_data_out_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22 .port_a_data_width = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22 .port_a_first_address = 0; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22 .port_a_first_bit_number = 6; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22 .port_a_last_address = 8191; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22 .port_a_logical_ram_depth = 32768; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22 .port_a_logical_ram_width = 8; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22 .port_a_read_during_write_mode = "new_data_with_nbe_read"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22 .port_b_address_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22 .port_b_address_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22 .port_b_address_width = 13; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22 .port_b_data_in_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22 .port_b_data_out_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22 .port_b_data_out_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22 .port_b_data_width = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22 .port_b_first_address = 0; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22 .port_b_first_bit_number = 6; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22 .port_b_last_address = 8191; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22 .port_b_logical_ram_depth = 32768; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22 .port_b_logical_ram_width = 8; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22 .port_b_read_during_write_mode = "new_data_with_nbe_read"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22 .port_b_read_enable_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22 .port_b_write_enable_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22 .ram_block_type = "M9K"; +// synopsys translate_on + +// Location: LCCOMB_X52_Y16_N10 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[6]~12 ( +// Equation(s): +// \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[6]~12_combout = (\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [1] & +// (((\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22~PORTBDATAOUT0 ) # (\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [0])))) # (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [1] & +// (\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6~PORTBDATAOUT0 & ((!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [0])))) + + .dataa(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6~PORTBDATAOUT0 ), + .datab(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22~PORTBDATAOUT0 ), + .datac(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [1]), + .datad(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [0]), + .cin(gnd), + .combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[6]~12_combout ), + .cout()); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[6]~12 .lut_mask = 16'hF0CA; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[6]~12 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X51_Y16_N20 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[6]~13 ( +// Equation(s): +// \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[6]~13_combout = (\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[6]~12_combout & +// (((\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30~PORTBDATAOUT0 ) # (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [0])))) # +// (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[6]~12_combout & (\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14~PORTBDATAOUT0 & +// ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [0])))) + + .dataa(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14~PORTBDATAOUT0 ), + .datab(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30~PORTBDATAOUT0 ), + .datac(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[6]~12_combout ), + .datad(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [0]), + .cin(gnd), + .combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[6]~13_combout ), + .cout()); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[6]~13 .lut_mask = 16'hCAF0; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[6]~13 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: M9K_X53_Y23_N0 +fiftyfivenm_ram_block \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23 ( + .portawe(gnd), + .portare(vcc), + .portaaddrstall(gnd), + .portbwe(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode244w [2]), + .portbre(vcc), + .portbaddrstall(gnd), + .clk0(\clk~inputclkctrl_outclk ), + .clk1(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .ena0(\main_memory|altsyncram_component|auto_generated|rden_decode|w_anode284w[2]~1_combout ), + .ena1(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode244w[2]~0_combout ), + .ena2(vcc), + .ena3(vcc), + .clr0(gnd), + .clr1(gnd), + .portadatain({vcc}), + .portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o , +\cpu_addr[0]~input_o }), + .portabyteenamasks(1'b1), + .portbdatain({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [7]}), + .portbaddr({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [12],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [11],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [10], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [9],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [8],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [7], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [6],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [5],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [4], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [3],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [2],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [1], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [0]}), + .portbbyteenamasks(1'b1), + .devclrn(devclrn), + .devpor(devpor), + .portadataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23_PORTADATAOUT_bus ), + .portbdataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23_PORTBDATAOUT_bus )); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23 .clk0_core_clock_enable = "ena0"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23 .clk1_core_clock_enable = "ena1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23 .data_interleave_offset_in_bits = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23 .data_interleave_width_in_bits = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23 .logical_ram_name = "rom:boot_rom|altsyncram:altsyncram_component|altsyncram_b7b1:auto_generated|altsyncram_kqc2:altsyncram1|ALTSYNCRAM"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23 .mixed_port_feed_through_mode = "dont_care"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23 .operation_mode = "bidir_dual_port"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23 .port_a_address_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23 .port_a_address_width = 13; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23 .port_a_byte_enable_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23 .port_a_data_out_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23 .port_a_data_out_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23 .port_a_data_width = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23 .port_a_first_address = 0; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23 .port_a_first_bit_number = 7; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23 .port_a_last_address = 8191; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23 .port_a_logical_ram_depth = 32768; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23 .port_a_logical_ram_width = 8; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23 .port_a_read_during_write_mode = "new_data_with_nbe_read"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23 .port_b_address_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23 .port_b_address_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23 .port_b_address_width = 13; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23 .port_b_data_in_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23 .port_b_data_out_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23 .port_b_data_out_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23 .port_b_data_width = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23 .port_b_first_address = 0; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23 .port_b_first_bit_number = 7; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23 .port_b_last_address = 8191; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23 .port_b_logical_ram_depth = 32768; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23 .port_b_logical_ram_width = 8; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23 .port_b_read_during_write_mode = "new_data_with_nbe_read"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23 .port_b_read_enable_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23 .port_b_write_enable_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23 .ram_block_type = "M9K"; +// synopsys translate_on + +// Location: M9K_X33_Y23_N0 +fiftyfivenm_ram_block \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31 ( + .portawe(gnd), + .portare(vcc), + .portaaddrstall(gnd), + .portbwe(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode252w [2]), + .portbre(vcc), + .portbaddrstall(gnd), + .clk0(\clk~inputclkctrl_outclk ), + .clk1(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .ena0(\main_memory|altsyncram_component|auto_generated|rden_decode|w_anode284w[2]~2_combout ), + .ena1(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode252w[2]~0_combout ), + .ena2(vcc), + .ena3(vcc), + .clr0(gnd), + .clr1(gnd), + .portadatain({vcc}), + .portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o , +\cpu_addr[0]~input_o }), + .portabyteenamasks(1'b1), + .portbdatain({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [7]}), + .portbaddr({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [12],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [11],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [10], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [9],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [8],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [7], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [6],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [5],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [4], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [3],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [2],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [1], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [0]}), + .portbbyteenamasks(1'b1), + .devclrn(devclrn), + .devpor(devpor), + .portadataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31_PORTADATAOUT_bus ), + .portbdataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31_PORTBDATAOUT_bus )); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31 .clk0_core_clock_enable = "ena0"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31 .clk1_core_clock_enable = "ena1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31 .data_interleave_offset_in_bits = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31 .data_interleave_width_in_bits = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31 .logical_ram_name = "rom:boot_rom|altsyncram:altsyncram_component|altsyncram_b7b1:auto_generated|altsyncram_kqc2:altsyncram1|ALTSYNCRAM"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31 .mixed_port_feed_through_mode = "dont_care"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31 .operation_mode = "bidir_dual_port"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31 .port_a_address_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31 .port_a_address_width = 13; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31 .port_a_byte_enable_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31 .port_a_data_out_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31 .port_a_data_out_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31 .port_a_data_width = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31 .port_a_first_address = 0; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31 .port_a_first_bit_number = 7; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31 .port_a_last_address = 8191; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31 .port_a_logical_ram_depth = 32768; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31 .port_a_logical_ram_width = 8; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31 .port_a_read_during_write_mode = "new_data_with_nbe_read"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31 .port_b_address_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31 .port_b_address_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31 .port_b_address_width = 13; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31 .port_b_data_in_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31 .port_b_data_out_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31 .port_b_data_out_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31 .port_b_data_width = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31 .port_b_first_address = 0; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31 .port_b_first_bit_number = 7; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31 .port_b_last_address = 8191; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31 .port_b_logical_ram_depth = 32768; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31 .port_b_logical_ram_width = 8; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31 .port_b_read_during_write_mode = "new_data_with_nbe_read"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31 .port_b_read_enable_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31 .port_b_write_enable_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31 .ram_block_type = "M9K"; +// synopsys translate_on + +// Location: M9K_X33_Y9_N0 +fiftyfivenm_ram_block \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15 ( + .portawe(gnd), + .portare(vcc), + .portaaddrstall(gnd), + .portbwe(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode236w [2]), + .portbre(vcc), + .portbaddrstall(gnd), + .clk0(\clk~inputclkctrl_outclk ), + .clk1(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .ena0(\main_memory|altsyncram_component|auto_generated|rden_decode|w_anode284w[2]~0_combout ), + .ena1(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode236w[2]~0_combout ), + .ena2(vcc), + .ena3(vcc), + .clr0(gnd), + .clr1(gnd), + .portadatain({vcc}), + .portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o , +\cpu_addr[0]~input_o }), + .portabyteenamasks(1'b1), + .portbdatain({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [7]}), + .portbaddr({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [12],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [11],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [10], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [9],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [8],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [7], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [6],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [5],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [4], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [3],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [2],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [1], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [0]}), + .portbbyteenamasks(1'b1), + .devclrn(devclrn), + .devpor(devpor), + .portadataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15_PORTADATAOUT_bus ), + .portbdataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15_PORTBDATAOUT_bus )); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15 .clk0_core_clock_enable = "ena0"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15 .clk1_core_clock_enable = "ena1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15 .data_interleave_offset_in_bits = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15 .data_interleave_width_in_bits = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15 .logical_ram_name = "rom:boot_rom|altsyncram:altsyncram_component|altsyncram_b7b1:auto_generated|altsyncram_kqc2:altsyncram1|ALTSYNCRAM"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15 .mixed_port_feed_through_mode = "dont_care"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15 .operation_mode = "bidir_dual_port"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15 .port_a_address_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15 .port_a_address_width = 13; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15 .port_a_byte_enable_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15 .port_a_data_out_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15 .port_a_data_out_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15 .port_a_data_width = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15 .port_a_first_address = 0; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15 .port_a_first_bit_number = 7; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15 .port_a_last_address = 8191; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15 .port_a_logical_ram_depth = 32768; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15 .port_a_logical_ram_width = 8; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15 .port_a_read_during_write_mode = "new_data_with_nbe_read"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15 .port_b_address_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15 .port_b_address_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15 .port_b_address_width = 13; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15 .port_b_data_in_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15 .port_b_data_out_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15 .port_b_data_out_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15 .port_b_data_width = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15 .port_b_first_address = 0; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15 .port_b_first_bit_number = 7; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15 .port_b_last_address = 8191; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15 .port_b_logical_ram_depth = 32768; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15 .port_b_logical_ram_width = 8; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15 .port_b_read_during_write_mode = "new_data_with_nbe_read"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15 .port_b_read_enable_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15 .port_b_write_enable_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15 .ram_block_type = "M9K"; +// synopsys translate_on + +// Location: M9K_X33_Y8_N0 +fiftyfivenm_ram_block \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7 ( + .portawe(gnd), + .portare(vcc), + .portaaddrstall(gnd), + .portbwe(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode223w [2]), + .portbre(vcc), + .portbaddrstall(gnd), + .clk0(\clk~inputclkctrl_outclk ), + .clk1(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .ena0(\main_memory|altsyncram_component|auto_generated|rden_decode|w_anode261w[2]~0_combout ), + .ena1(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode223w[2]~0_combout ), + .ena2(vcc), + .ena3(vcc), + .clr0(gnd), + .clr1(gnd), + .portadatain({vcc}), + .portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o , +\cpu_addr[0]~input_o }), + .portabyteenamasks(1'b1), + .portbdatain({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [7]}), + .portbaddr({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [12],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [11],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [10], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [9],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [8],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [7], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [6],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [5],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [4], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [3],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [2],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [1], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [0]}), + .portbbyteenamasks(1'b1), + .devclrn(devclrn), + .devpor(devpor), + .portadataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7_PORTADATAOUT_bus ), + .portbdataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7_PORTBDATAOUT_bus )); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7 .clk0_core_clock_enable = "ena0"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7 .clk1_core_clock_enable = "ena1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7 .data_interleave_offset_in_bits = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7 .data_interleave_width_in_bits = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7 .logical_ram_name = "rom:boot_rom|altsyncram:altsyncram_component|altsyncram_b7b1:auto_generated|altsyncram_kqc2:altsyncram1|ALTSYNCRAM"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7 .mixed_port_feed_through_mode = "dont_care"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7 .operation_mode = "bidir_dual_port"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7 .port_a_address_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7 .port_a_address_width = 13; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7 .port_a_byte_enable_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7 .port_a_data_out_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7 .port_a_data_out_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7 .port_a_data_width = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7 .port_a_first_address = 0; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7 .port_a_first_bit_number = 7; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7 .port_a_last_address = 8191; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7 .port_a_logical_ram_depth = 32768; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7 .port_a_logical_ram_width = 8; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7 .port_a_read_during_write_mode = "new_data_with_nbe_read"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7 .port_b_address_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7 .port_b_address_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7 .port_b_address_width = 13; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7 .port_b_data_in_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7 .port_b_data_out_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7 .port_b_data_out_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7 .port_b_data_width = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7 .port_b_first_address = 0; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7 .port_b_first_bit_number = 7; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7 .port_b_last_address = 8191; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7 .port_b_logical_ram_depth = 32768; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7 .port_b_logical_ram_width = 8; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7 .port_b_read_during_write_mode = "new_data_with_nbe_read"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7 .port_b_read_enable_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7 .port_b_write_enable_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7 .ram_block_type = "M9K"; +// synopsys translate_on + +// Location: LCCOMB_X52_Y16_N4 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[7]~14 ( +// Equation(s): +// \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[7]~14_combout = (\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [0] & +// ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15~PORTBDATAOUT0 ) # ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [1])))) # (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [0] & +// (((\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7~PORTBDATAOUT0 & !\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [1])))) + + .dataa(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15~PORTBDATAOUT0 ), + .datab(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [0]), + .datac(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7~PORTBDATAOUT0 ), + .datad(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [1]), + .cin(gnd), + .combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[7]~14_combout ), + .cout()); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[7]~14 .lut_mask = 16'hCCB8; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[7]~14 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X52_Y16_N14 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[7]~15 ( +// Equation(s): +// \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[7]~15_combout = (\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[7]~14_combout & +// (((\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31~PORTBDATAOUT0 ) # (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [1])))) # +// (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[7]~14_combout & (\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23~PORTBDATAOUT0 & +// ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [1])))) + + .dataa(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23~PORTBDATAOUT0 ), + .datab(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31~PORTBDATAOUT0 ), + .datac(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[7]~14_combout ), + .datad(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [1]), + .cin(gnd), + .combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[7]~15_combout ), + .cout()); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[7]~15 .lut_mask = 16'hCAF0; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[7]~15 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X51_Y16_N10 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~26 ( + .dataa(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~2_combout ), + .datab(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[7]~15_combout ), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][3]~q ), + .datad(\altera_internal_jtag~TDIUTAP ), + .cin(gnd), + .combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~26_combout ), + .cout()); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~26 .lut_mask = 16'hCDC8; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~26 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X51_Y16_N14 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[6]~19 ( + .dataa(gnd), + .datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][3]~q ), + .datac(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~2_combout ), + .datad(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~3_combout ), + .cin(gnd), + .combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[6]~19_combout ), + .cout()); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[6]~19 .lut_mask = 16'hFCFF; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[6]~19 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X51_Y16_N11 +dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[7] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~26_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[6]~19_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [7]), + .prn(vcc)); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[7] .is_wysiwyg = "true"; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[7] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X51_Y16_N16 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~25 ( + .dataa(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~2_combout ), + .datab(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[6]~13_combout ), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][3]~q ), + .datad(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [7]), + .cin(gnd), + .combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~25_combout ), + .cout()); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~25 .lut_mask = 16'hCDC8; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~25 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X51_Y16_N17 +dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[6] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~25_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[6]~19_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [6]), + .prn(vcc)); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[6] .is_wysiwyg = "true"; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[6] .power_up = "low"; +// synopsys translate_on + +// Location: M9K_X33_Y24_N0 +fiftyfivenm_ram_block \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21 ( + .portawe(gnd), + .portare(vcc), + .portaaddrstall(gnd), + .portbwe(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode244w [2]), + .portbre(vcc), + .portbaddrstall(gnd), + .clk0(\clk~inputclkctrl_outclk ), + .clk1(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .ena0(\main_memory|altsyncram_component|auto_generated|rden_decode|w_anode284w[2]~1_combout ), + .ena1(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode244w[2]~0_combout ), + .ena2(vcc), + .ena3(vcc), + .clr0(gnd), + .clr1(gnd), + .portadatain({vcc}), + .portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o , +\cpu_addr[0]~input_o }), + .portabyteenamasks(1'b1), + .portbdatain({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [5]}), + .portbaddr({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [12],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [11],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [10], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [9],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [8],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [7], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [6],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [5],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [4], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [3],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [2],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [1], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [0]}), + .portbbyteenamasks(1'b1), + .devclrn(devclrn), + .devpor(devpor), + .portadataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21_PORTADATAOUT_bus ), + .portbdataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21_PORTBDATAOUT_bus )); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21 .clk0_core_clock_enable = "ena0"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21 .clk1_core_clock_enable = "ena1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21 .data_interleave_offset_in_bits = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21 .data_interleave_width_in_bits = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21 .logical_ram_name = "rom:boot_rom|altsyncram:altsyncram_component|altsyncram_b7b1:auto_generated|altsyncram_kqc2:altsyncram1|ALTSYNCRAM"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21 .mixed_port_feed_through_mode = "dont_care"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21 .operation_mode = "bidir_dual_port"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21 .port_a_address_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21 .port_a_address_width = 13; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21 .port_a_byte_enable_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21 .port_a_data_out_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21 .port_a_data_out_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21 .port_a_data_width = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21 .port_a_first_address = 0; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21 .port_a_first_bit_number = 5; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21 .port_a_last_address = 8191; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21 .port_a_logical_ram_depth = 32768; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21 .port_a_logical_ram_width = 8; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21 .port_a_read_during_write_mode = "new_data_with_nbe_read"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21 .port_b_address_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21 .port_b_address_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21 .port_b_address_width = 13; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21 .port_b_data_in_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21 .port_b_data_out_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21 .port_b_data_out_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21 .port_b_data_width = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21 .port_b_first_address = 0; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21 .port_b_first_bit_number = 5; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21 .port_b_last_address = 8191; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21 .port_b_logical_ram_depth = 32768; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21 .port_b_logical_ram_width = 8; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21 .port_b_read_during_write_mode = "new_data_with_nbe_read"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21 .port_b_read_enable_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21 .port_b_write_enable_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21 .ram_block_type = "M9K"; +// synopsys translate_on + +// Location: M9K_X33_Y20_N0 +fiftyfivenm_ram_block \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13 ( + .portawe(gnd), + .portare(vcc), + .portaaddrstall(gnd), + .portbwe(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode236w [2]), + .portbre(vcc), + .portbaddrstall(gnd), + .clk0(\clk~inputclkctrl_outclk ), + .clk1(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .ena0(\main_memory|altsyncram_component|auto_generated|rden_decode|w_anode284w[2]~0_combout ), + .ena1(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode236w[2]~0_combout ), + .ena2(vcc), + .ena3(vcc), + .clr0(gnd), + .clr1(gnd), + .portadatain({vcc}), + .portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o , +\cpu_addr[0]~input_o }), + .portabyteenamasks(1'b1), + .portbdatain({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [5]}), + .portbaddr({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [12],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [11],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [10], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [9],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [8],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [7], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [6],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [5],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [4], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [3],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [2],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [1], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [0]}), + .portbbyteenamasks(1'b1), + .devclrn(devclrn), + .devpor(devpor), + .portadataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13_PORTADATAOUT_bus ), + .portbdataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13_PORTBDATAOUT_bus )); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13 .clk0_core_clock_enable = "ena0"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13 .clk1_core_clock_enable = "ena1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13 .data_interleave_offset_in_bits = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13 .data_interleave_width_in_bits = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13 .logical_ram_name = "rom:boot_rom|altsyncram:altsyncram_component|altsyncram_b7b1:auto_generated|altsyncram_kqc2:altsyncram1|ALTSYNCRAM"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13 .mixed_port_feed_through_mode = "dont_care"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13 .operation_mode = "bidir_dual_port"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13 .port_a_address_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13 .port_a_address_width = 13; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13 .port_a_byte_enable_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13 .port_a_data_out_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13 .port_a_data_out_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13 .port_a_data_width = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13 .port_a_first_address = 0; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13 .port_a_first_bit_number = 5; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13 .port_a_last_address = 8191; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13 .port_a_logical_ram_depth = 32768; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13 .port_a_logical_ram_width = 8; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13 .port_a_read_during_write_mode = "new_data_with_nbe_read"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13 .port_b_address_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13 .port_b_address_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13 .port_b_address_width = 13; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13 .port_b_data_in_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13 .port_b_data_out_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13 .port_b_data_out_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13 .port_b_data_width = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13 .port_b_first_address = 0; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13 .port_b_first_bit_number = 5; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13 .port_b_last_address = 8191; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13 .port_b_logical_ram_depth = 32768; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13 .port_b_logical_ram_width = 8; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13 .port_b_read_during_write_mode = "new_data_with_nbe_read"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13 .port_b_read_enable_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13 .port_b_write_enable_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13 .ram_block_type = "M9K"; +// synopsys translate_on + +// Location: M9K_X33_Y16_N0 +fiftyfivenm_ram_block \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5 ( + .portawe(gnd), + .portare(vcc), + .portaaddrstall(gnd), + .portbwe(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode223w [2]), + .portbre(vcc), + .portbaddrstall(gnd), + .clk0(\clk~inputclkctrl_outclk ), + .clk1(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .ena0(\main_memory|altsyncram_component|auto_generated|rden_decode|w_anode261w[2]~0_combout ), + .ena1(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode223w[2]~0_combout ), + .ena2(vcc), + .ena3(vcc), + .clr0(gnd), + .clr1(gnd), + .portadatain({vcc}), + .portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o , +\cpu_addr[0]~input_o }), + .portabyteenamasks(1'b1), + .portbdatain({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [5]}), + .portbaddr({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [12],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [11],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [10], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [9],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [8],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [7], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [6],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [5],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [4], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [3],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [2],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [1], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [0]}), + .portbbyteenamasks(1'b1), + .devclrn(devclrn), + .devpor(devpor), + .portadataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5_PORTADATAOUT_bus ), + .portbdataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5_PORTBDATAOUT_bus )); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5 .clk0_core_clock_enable = "ena0"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5 .clk1_core_clock_enable = "ena1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5 .data_interleave_offset_in_bits = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5 .data_interleave_width_in_bits = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5 .logical_ram_name = "rom:boot_rom|altsyncram:altsyncram_component|altsyncram_b7b1:auto_generated|altsyncram_kqc2:altsyncram1|ALTSYNCRAM"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5 .mixed_port_feed_through_mode = "dont_care"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5 .operation_mode = "bidir_dual_port"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5 .port_a_address_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5 .port_a_address_width = 13; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5 .port_a_byte_enable_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5 .port_a_data_out_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5 .port_a_data_out_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5 .port_a_data_width = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5 .port_a_first_address = 0; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5 .port_a_first_bit_number = 5; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5 .port_a_last_address = 8191; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5 .port_a_logical_ram_depth = 32768; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5 .port_a_logical_ram_width = 8; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5 .port_a_read_during_write_mode = "new_data_with_nbe_read"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5 .port_b_address_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5 .port_b_address_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5 .port_b_address_width = 13; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5 .port_b_data_in_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5 .port_b_data_out_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5 .port_b_data_out_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5 .port_b_data_width = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5 .port_b_first_address = 0; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5 .port_b_first_bit_number = 5; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5 .port_b_last_address = 8191; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5 .port_b_logical_ram_depth = 32768; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5 .port_b_logical_ram_width = 8; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5 .port_b_read_during_write_mode = "new_data_with_nbe_read"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5 .port_b_read_enable_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5 .port_b_write_enable_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5 .ram_block_type = "M9K"; +// synopsys translate_on + +// Location: LCCOMB_X52_Y16_N8 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[5]~10 ( +// Equation(s): +// \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[5]~10_combout = (\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [0] & +// ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13~PORTBDATAOUT0 ) # ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [1])))) # (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [0] & +// (((\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5~PORTBDATAOUT0 & !\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [1])))) + + .dataa(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13~PORTBDATAOUT0 ), + .datab(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [0]), + .datac(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5~PORTBDATAOUT0 ), + .datad(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [1]), + .cin(gnd), + .combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[5]~10_combout ), + .cout()); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[5]~10 .lut_mask = 16'hCCB8; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[5]~10 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: M9K_X53_Y24_N0 +fiftyfivenm_ram_block \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29 ( + .portawe(gnd), + .portare(vcc), + .portaaddrstall(gnd), + .portbwe(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode252w [2]), + .portbre(vcc), + .portbaddrstall(gnd), + .clk0(\clk~inputclkctrl_outclk ), + .clk1(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .ena0(\main_memory|altsyncram_component|auto_generated|rden_decode|w_anode284w[2]~2_combout ), + .ena1(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode252w[2]~0_combout ), + .ena2(vcc), + .ena3(vcc), + .clr0(gnd), + .clr1(gnd), + .portadatain({vcc}), + .portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o , +\cpu_addr[0]~input_o }), + .portabyteenamasks(1'b1), + .portbdatain({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [5]}), + .portbaddr({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [12],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [11],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [10], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [9],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [8],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [7], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [6],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [5],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [4], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [3],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [2],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [1], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [0]}), + .portbbyteenamasks(1'b1), + .devclrn(devclrn), + .devpor(devpor), + .portadataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29_PORTADATAOUT_bus ), + .portbdataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29_PORTBDATAOUT_bus )); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29 .clk0_core_clock_enable = "ena0"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29 .clk1_core_clock_enable = "ena1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29 .data_interleave_offset_in_bits = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29 .data_interleave_width_in_bits = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29 .logical_ram_name = "rom:boot_rom|altsyncram:altsyncram_component|altsyncram_b7b1:auto_generated|altsyncram_kqc2:altsyncram1|ALTSYNCRAM"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29 .mixed_port_feed_through_mode = "dont_care"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29 .operation_mode = "bidir_dual_port"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29 .port_a_address_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29 .port_a_address_width = 13; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29 .port_a_byte_enable_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29 .port_a_data_out_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29 .port_a_data_out_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29 .port_a_data_width = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29 .port_a_first_address = 0; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29 .port_a_first_bit_number = 5; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29 .port_a_last_address = 8191; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29 .port_a_logical_ram_depth = 32768; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29 .port_a_logical_ram_width = 8; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29 .port_a_read_during_write_mode = "new_data_with_nbe_read"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29 .port_b_address_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29 .port_b_address_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29 .port_b_address_width = 13; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29 .port_b_data_in_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29 .port_b_data_out_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29 .port_b_data_out_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29 .port_b_data_width = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29 .port_b_first_address = 0; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29 .port_b_first_bit_number = 5; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29 .port_b_last_address = 8191; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29 .port_b_logical_ram_depth = 32768; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29 .port_b_logical_ram_width = 8; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29 .port_b_read_during_write_mode = "new_data_with_nbe_read"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29 .port_b_read_enable_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29 .port_b_write_enable_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29 .ram_block_type = "M9K"; +// synopsys translate_on + +// Location: LCCOMB_X52_Y16_N2 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[5]~11 ( +// Equation(s): +// \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[5]~11_combout = (\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [1] & +// ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[5]~10_combout & ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29~PORTBDATAOUT0 ))) # +// (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[5]~10_combout & (\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21~PORTBDATAOUT0 )))) # +// (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [1] & (((\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[5]~10_combout )))) + + .dataa(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [1]), + .datab(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21~PORTBDATAOUT0 ), + .datac(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[5]~10_combout ), + .datad(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29~PORTBDATAOUT0 ), + .cin(gnd), + .combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[5]~11_combout ), + .cout()); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[5]~11 .lut_mask = 16'hF858; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[5]~11 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X51_Y16_N6 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~24 ( + .dataa(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~2_combout ), + .datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [6]), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][3]~q ), + .datad(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[5]~11_combout ), + .cin(gnd), + .combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~24_combout ), + .cout()); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~24 .lut_mask = 16'hFE04; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~24 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X51_Y16_N7 +dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[5] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~24_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[6]~19_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [5]), + .prn(vcc)); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[5] .is_wysiwyg = "true"; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[5] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X51_Y16_N4 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~23 ( + .dataa(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~2_combout ), + .datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][3]~q ), + .datac(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[4]~9_combout ), + .datad(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [5]), + .cin(gnd), + .combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~23_combout ), + .cout()); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~23 .lut_mask = 16'hF1E0; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~23 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X51_Y16_N5 +dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[4] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~23_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[6]~19_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [4]), + .prn(vcc)); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[4] .is_wysiwyg = "true"; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[4] .power_up = "low"; +// synopsys translate_on + +// Location: M9K_X53_Y18_N0 +fiftyfivenm_ram_block \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19 ( + .portawe(gnd), + .portare(vcc), + .portaaddrstall(gnd), + .portbwe(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode244w [2]), + .portbre(vcc), + .portbaddrstall(gnd), + .clk0(\clk~inputclkctrl_outclk ), + .clk1(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .ena0(\main_memory|altsyncram_component|auto_generated|rden_decode|w_anode284w[2]~1_combout ), + .ena1(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode244w[2]~0_combout ), + .ena2(vcc), + .ena3(vcc), + .clr0(gnd), + .clr1(gnd), + .portadatain({vcc}), + .portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o , +\cpu_addr[0]~input_o }), + .portabyteenamasks(1'b1), + .portbdatain({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [3]}), + .portbaddr({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [12],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [11],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [10], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [9],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [8],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [7], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [6],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [5],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [4], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [3],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [2],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [1], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [0]}), + .portbbyteenamasks(1'b1), + .devclrn(devclrn), + .devpor(devpor), + .portadataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19_PORTADATAOUT_bus ), + .portbdataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19_PORTBDATAOUT_bus )); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19 .clk0_core_clock_enable = "ena0"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19 .clk1_core_clock_enable = "ena1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19 .data_interleave_offset_in_bits = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19 .data_interleave_width_in_bits = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19 .logical_ram_name = "rom:boot_rom|altsyncram:altsyncram_component|altsyncram_b7b1:auto_generated|altsyncram_kqc2:altsyncram1|ALTSYNCRAM"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19 .mixed_port_feed_through_mode = "dont_care"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19 .operation_mode = "bidir_dual_port"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19 .port_a_address_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19 .port_a_address_width = 13; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19 .port_a_byte_enable_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19 .port_a_data_out_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19 .port_a_data_out_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19 .port_a_data_width = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19 .port_a_first_address = 0; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19 .port_a_first_bit_number = 3; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19 .port_a_last_address = 8191; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19 .port_a_logical_ram_depth = 32768; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19 .port_a_logical_ram_width = 8; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19 .port_a_read_during_write_mode = "new_data_with_nbe_read"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19 .port_b_address_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19 .port_b_address_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19 .port_b_address_width = 13; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19 .port_b_data_in_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19 .port_b_data_out_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19 .port_b_data_out_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19 .port_b_data_width = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19 .port_b_first_address = 0; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19 .port_b_first_bit_number = 3; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19 .port_b_last_address = 8191; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19 .port_b_logical_ram_depth = 32768; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19 .port_b_logical_ram_width = 8; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19 .port_b_read_during_write_mode = "new_data_with_nbe_read"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19 .port_b_read_enable_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19 .port_b_write_enable_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19 .ram_block_type = "M9K"; +// synopsys translate_on + +// Location: M9K_X53_Y19_N0 +fiftyfivenm_ram_block \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27 ( + .portawe(gnd), + .portare(vcc), + .portaaddrstall(gnd), + .portbwe(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode252w [2]), + .portbre(vcc), + .portbaddrstall(gnd), + .clk0(\clk~inputclkctrl_outclk ), + .clk1(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .ena0(\main_memory|altsyncram_component|auto_generated|rden_decode|w_anode284w[2]~2_combout ), + .ena1(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode252w[2]~0_combout ), + .ena2(vcc), + .ena3(vcc), + .clr0(gnd), + .clr1(gnd), + .portadatain({vcc}), + .portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o , +\cpu_addr[0]~input_o }), + .portabyteenamasks(1'b1), + .portbdatain({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [3]}), + .portbaddr({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [12],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [11],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [10], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [9],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [8],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [7], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [6],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [5],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [4], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [3],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [2],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [1], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [0]}), + .portbbyteenamasks(1'b1), + .devclrn(devclrn), + .devpor(devpor), + .portadataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27_PORTADATAOUT_bus ), + .portbdataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27_PORTBDATAOUT_bus )); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27 .clk0_core_clock_enable = "ena0"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27 .clk1_core_clock_enable = "ena1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27 .data_interleave_offset_in_bits = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27 .data_interleave_width_in_bits = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27 .logical_ram_name = "rom:boot_rom|altsyncram:altsyncram_component|altsyncram_b7b1:auto_generated|altsyncram_kqc2:altsyncram1|ALTSYNCRAM"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27 .mixed_port_feed_through_mode = "dont_care"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27 .operation_mode = "bidir_dual_port"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27 .port_a_address_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27 .port_a_address_width = 13; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27 .port_a_byte_enable_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27 .port_a_data_out_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27 .port_a_data_out_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27 .port_a_data_width = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27 .port_a_first_address = 0; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27 .port_a_first_bit_number = 3; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27 .port_a_last_address = 8191; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27 .port_a_logical_ram_depth = 32768; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27 .port_a_logical_ram_width = 8; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27 .port_a_read_during_write_mode = "new_data_with_nbe_read"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27 .port_b_address_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27 .port_b_address_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27 .port_b_address_width = 13; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27 .port_b_data_in_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27 .port_b_data_out_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27 .port_b_data_out_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27 .port_b_data_width = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27 .port_b_first_address = 0; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27 .port_b_first_bit_number = 3; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27 .port_b_last_address = 8191; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27 .port_b_logical_ram_depth = 32768; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27 .port_b_logical_ram_width = 8; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27 .port_b_read_during_write_mode = "new_data_with_nbe_read"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27 .port_b_read_enable_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27 .port_b_write_enable_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27 .ram_block_type = "M9K"; +// synopsys translate_on + +// Location: M9K_X53_Y17_N0 +fiftyfivenm_ram_block \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11 ( + .portawe(gnd), + .portare(vcc), + .portaaddrstall(gnd), + .portbwe(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode236w [2]), + .portbre(vcc), + .portbaddrstall(gnd), + .clk0(\clk~inputclkctrl_outclk ), + .clk1(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .ena0(\main_memory|altsyncram_component|auto_generated|rden_decode|w_anode284w[2]~0_combout ), + .ena1(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode236w[2]~0_combout ), + .ena2(vcc), + .ena3(vcc), + .clr0(gnd), + .clr1(gnd), + .portadatain({vcc}), + .portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o , +\cpu_addr[0]~input_o }), + .portabyteenamasks(1'b1), + .portbdatain({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [3]}), + .portbaddr({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [12],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [11],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [10], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [9],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [8],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [7], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [6],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [5],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [4], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [3],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [2],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [1], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [0]}), + .portbbyteenamasks(1'b1), + .devclrn(devclrn), + .devpor(devpor), + .portadataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11_PORTADATAOUT_bus ), + .portbdataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11_PORTBDATAOUT_bus )); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11 .clk0_core_clock_enable = "ena0"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11 .clk1_core_clock_enable = "ena1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11 .data_interleave_offset_in_bits = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11 .data_interleave_width_in_bits = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11 .logical_ram_name = "rom:boot_rom|altsyncram:altsyncram_component|altsyncram_b7b1:auto_generated|altsyncram_kqc2:altsyncram1|ALTSYNCRAM"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11 .mixed_port_feed_through_mode = "dont_care"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11 .operation_mode = "bidir_dual_port"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11 .port_a_address_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11 .port_a_address_width = 13; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11 .port_a_byte_enable_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11 .port_a_data_out_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11 .port_a_data_out_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11 .port_a_data_width = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11 .port_a_first_address = 0; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11 .port_a_first_bit_number = 3; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11 .port_a_last_address = 8191; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11 .port_a_logical_ram_depth = 32768; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11 .port_a_logical_ram_width = 8; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11 .port_a_read_during_write_mode = "new_data_with_nbe_read"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11 .port_b_address_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11 .port_b_address_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11 .port_b_address_width = 13; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11 .port_b_data_in_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11 .port_b_data_out_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11 .port_b_data_out_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11 .port_b_data_width = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11 .port_b_first_address = 0; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11 .port_b_first_bit_number = 3; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11 .port_b_last_address = 8191; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11 .port_b_logical_ram_depth = 32768; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11 .port_b_logical_ram_width = 8; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11 .port_b_read_during_write_mode = "new_data_with_nbe_read"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11 .port_b_read_enable_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11 .port_b_write_enable_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11 .ram_block_type = "M9K"; +// synopsys translate_on + +// Location: M9K_X53_Y16_N0 +fiftyfivenm_ram_block \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3 ( + .portawe(gnd), + .portare(vcc), + .portaaddrstall(gnd), + .portbwe(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode223w [2]), + .portbre(vcc), + .portbaddrstall(gnd), + .clk0(\clk~inputclkctrl_outclk ), + .clk1(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .ena0(\main_memory|altsyncram_component|auto_generated|rden_decode|w_anode261w[2]~0_combout ), + .ena1(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode223w[2]~0_combout ), + .ena2(vcc), + .ena3(vcc), + .clr0(gnd), + .clr1(gnd), + .portadatain({vcc}), + .portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o , +\cpu_addr[0]~input_o }), + .portabyteenamasks(1'b1), + .portbdatain({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [3]}), + .portbaddr({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [12],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [11],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [10], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [9],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [8],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [7], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [6],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [5],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [4], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [3],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [2],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [1], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [0]}), + .portbbyteenamasks(1'b1), + .devclrn(devclrn), + .devpor(devpor), + .portadataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3_PORTADATAOUT_bus ), + .portbdataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3_PORTBDATAOUT_bus )); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3 .clk0_core_clock_enable = "ena0"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3 .clk1_core_clock_enable = "ena1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3 .data_interleave_offset_in_bits = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3 .data_interleave_width_in_bits = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3 .logical_ram_name = "rom:boot_rom|altsyncram:altsyncram_component|altsyncram_b7b1:auto_generated|altsyncram_kqc2:altsyncram1|ALTSYNCRAM"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3 .mixed_port_feed_through_mode = "dont_care"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3 .operation_mode = "bidir_dual_port"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3 .port_a_address_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3 .port_a_address_width = 13; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3 .port_a_byte_enable_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3 .port_a_data_out_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3 .port_a_data_out_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3 .port_a_data_width = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3 .port_a_first_address = 0; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3 .port_a_first_bit_number = 3; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3 .port_a_last_address = 8191; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3 .port_a_logical_ram_depth = 32768; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3 .port_a_logical_ram_width = 8; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3 .port_a_read_during_write_mode = "new_data_with_nbe_read"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3 .port_b_address_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3 .port_b_address_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3 .port_b_address_width = 13; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3 .port_b_data_in_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3 .port_b_data_out_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3 .port_b_data_out_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3 .port_b_data_width = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3 .port_b_first_address = 0; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3 .port_b_first_bit_number = 3; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3 .port_b_last_address = 8191; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3 .port_b_logical_ram_depth = 32768; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3 .port_b_logical_ram_width = 8; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3 .port_b_read_during_write_mode = "new_data_with_nbe_read"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3 .port_b_read_enable_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3 .port_b_write_enable_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3 .ram_block_type = "M9K"; +// synopsys translate_on + +// Location: LCCOMB_X52_Y16_N16 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[3]~6 ( +// Equation(s): +// \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[3]~6_combout = (\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [1] & (\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [0])) # +// (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [1] & ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [0] & (\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11~PORTBDATAOUT0 )) # +// (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [0] & ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3~PORTBDATAOUT0 ))))) + + .dataa(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [1]), + .datab(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [0]), + .datac(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11~PORTBDATAOUT0 ), + .datad(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3~PORTBDATAOUT0 ), + .cin(gnd), + .combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[3]~6_combout ), + .cout()); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[3]~6 .lut_mask = 16'hD9C8; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[3]~6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X52_Y16_N26 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[3]~7 ( +// Equation(s): +// \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[3]~7_combout = (\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [1] & +// ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[3]~6_combout & ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27~PORTBDATAOUT0 ))) # +// (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[3]~6_combout & (\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19~PORTBDATAOUT0 )))) # +// (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [1] & (((\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[3]~6_combout )))) + + .dataa(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [1]), + .datab(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19~PORTBDATAOUT0 ), + .datac(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27~PORTBDATAOUT0 ), + .datad(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[3]~6_combout ), + .cin(gnd), + .combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[3]~7_combout ), + .cout()); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[3]~7 .lut_mask = 16'hF588; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[3]~7 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X51_Y16_N2 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~22 ( + .dataa(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~2_combout ), + .datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [4]), + .datac(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[3]~7_combout ), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][3]~q ), + .cin(gnd), + .combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~22_combout ), + .cout()); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~22 .lut_mask = 16'hF0E4; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~22 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X51_Y16_N3 +dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[3] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~22_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[6]~19_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [3]), + .prn(vcc)); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[3] .is_wysiwyg = "true"; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[3] .power_up = "low"; +// synopsys translate_on + +// Location: M9K_X73_Y11_N0 +fiftyfivenm_ram_block \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26 ( + .portawe(gnd), + .portare(vcc), + .portaaddrstall(gnd), + .portbwe(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode252w [2]), + .portbre(vcc), + .portbaddrstall(gnd), + .clk0(\clk~inputclkctrl_outclk ), + .clk1(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .ena0(\main_memory|altsyncram_component|auto_generated|rden_decode|w_anode284w[2]~2_combout ), + .ena1(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode252w[2]~0_combout ), + .ena2(vcc), + .ena3(vcc), + .clr0(gnd), + .clr1(gnd), + .portadatain({vcc}), + .portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o , +\cpu_addr[0]~input_o }), + .portabyteenamasks(1'b1), + .portbdatain({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [2]}), + .portbaddr({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [12],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [11],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [10], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [9],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [8],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [7], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [6],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [5],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [4], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [3],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [2],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [1], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [0]}), + .portbbyteenamasks(1'b1), + .devclrn(devclrn), + .devpor(devpor), + .portadataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26_PORTADATAOUT_bus ), + .portbdataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26_PORTBDATAOUT_bus )); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26 .clk0_core_clock_enable = "ena0"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26 .clk1_core_clock_enable = "ena1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26 .data_interleave_offset_in_bits = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26 .data_interleave_width_in_bits = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26 .logical_ram_name = "rom:boot_rom|altsyncram:altsyncram_component|altsyncram_b7b1:auto_generated|altsyncram_kqc2:altsyncram1|ALTSYNCRAM"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26 .mixed_port_feed_through_mode = "dont_care"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26 .operation_mode = "bidir_dual_port"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26 .port_a_address_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26 .port_a_address_width = 13; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26 .port_a_byte_enable_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26 .port_a_data_out_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26 .port_a_data_out_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26 .port_a_data_width = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26 .port_a_first_address = 0; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26 .port_a_first_bit_number = 2; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26 .port_a_last_address = 8191; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26 .port_a_logical_ram_depth = 32768; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26 .port_a_logical_ram_width = 8; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26 .port_a_read_during_write_mode = "new_data_with_nbe_read"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26 .port_b_address_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26 .port_b_address_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26 .port_b_address_width = 13; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26 .port_b_data_in_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26 .port_b_data_out_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26 .port_b_data_out_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26 .port_b_data_width = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26 .port_b_first_address = 0; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26 .port_b_first_bit_number = 2; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26 .port_b_last_address = 8191; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26 .port_b_logical_ram_depth = 32768; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26 .port_b_logical_ram_width = 8; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26 .port_b_read_during_write_mode = "new_data_with_nbe_read"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26 .port_b_read_enable_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26 .port_b_write_enable_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26 .ram_block_type = "M9K"; +// synopsys translate_on + +// Location: M9K_X53_Y12_N0 +fiftyfivenm_ram_block \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10 ( + .portawe(gnd), + .portare(vcc), + .portaaddrstall(gnd), + .portbwe(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode236w [2]), + .portbre(vcc), + .portbaddrstall(gnd), + .clk0(\clk~inputclkctrl_outclk ), + .clk1(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .ena0(\main_memory|altsyncram_component|auto_generated|rden_decode|w_anode284w[2]~0_combout ), + .ena1(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode236w[2]~0_combout ), + .ena2(vcc), + .ena3(vcc), + .clr0(gnd), + .clr1(gnd), + .portadatain({vcc}), + .portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o , +\cpu_addr[0]~input_o }), + .portabyteenamasks(1'b1), + .portbdatain({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [2]}), + .portbaddr({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [12],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [11],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [10], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [9],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [8],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [7], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [6],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [5],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [4], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [3],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [2],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [1], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [0]}), + .portbbyteenamasks(1'b1), + .devclrn(devclrn), + .devpor(devpor), + .portadataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10_PORTADATAOUT_bus ), + .portbdataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10_PORTBDATAOUT_bus )); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10 .clk0_core_clock_enable = "ena0"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10 .clk1_core_clock_enable = "ena1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10 .data_interleave_offset_in_bits = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10 .data_interleave_width_in_bits = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10 .logical_ram_name = "rom:boot_rom|altsyncram:altsyncram_component|altsyncram_b7b1:auto_generated|altsyncram_kqc2:altsyncram1|ALTSYNCRAM"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10 .mixed_port_feed_through_mode = "dont_care"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10 .operation_mode = "bidir_dual_port"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10 .port_a_address_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10 .port_a_address_width = 13; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10 .port_a_byte_enable_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10 .port_a_data_out_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10 .port_a_data_out_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10 .port_a_data_width = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10 .port_a_first_address = 0; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10 .port_a_first_bit_number = 2; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10 .port_a_last_address = 8191; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10 .port_a_logical_ram_depth = 32768; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10 .port_a_logical_ram_width = 8; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10 .port_a_read_during_write_mode = "new_data_with_nbe_read"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10 .port_b_address_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10 .port_b_address_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10 .port_b_address_width = 13; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10 .port_b_data_in_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10 .port_b_data_out_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10 .port_b_data_out_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10 .port_b_data_width = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10 .port_b_first_address = 0; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10 .port_b_first_bit_number = 2; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10 .port_b_last_address = 8191; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10 .port_b_logical_ram_depth = 32768; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10 .port_b_logical_ram_width = 8; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10 .port_b_read_during_write_mode = "new_data_with_nbe_read"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10 .port_b_read_enable_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10 .port_b_write_enable_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10 .ram_block_type = "M9K"; +// synopsys translate_on + +// Location: M9K_X53_Y8_N0 +fiftyfivenm_ram_block \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2 ( + .portawe(gnd), + .portare(vcc), + .portaaddrstall(gnd), + .portbwe(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode223w [2]), + .portbre(vcc), + .portbaddrstall(gnd), + .clk0(\clk~inputclkctrl_outclk ), + .clk1(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .ena0(\main_memory|altsyncram_component|auto_generated|rden_decode|w_anode261w[2]~0_combout ), + .ena1(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode223w[2]~0_combout ), + .ena2(vcc), + .ena3(vcc), + .clr0(gnd), + .clr1(gnd), + .portadatain({vcc}), + .portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o , +\cpu_addr[0]~input_o }), + .portabyteenamasks(1'b1), + .portbdatain({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [2]}), + .portbaddr({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [12],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [11],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [10], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [9],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [8],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [7], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [6],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [5],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [4], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [3],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [2],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [1], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [0]}), + .portbbyteenamasks(1'b1), + .devclrn(devclrn), + .devpor(devpor), + .portadataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2_PORTADATAOUT_bus ), + .portbdataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2_PORTBDATAOUT_bus )); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2 .clk0_core_clock_enable = "ena0"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2 .clk1_core_clock_enable = "ena1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2 .data_interleave_offset_in_bits = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2 .data_interleave_width_in_bits = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2 .logical_ram_name = "rom:boot_rom|altsyncram:altsyncram_component|altsyncram_b7b1:auto_generated|altsyncram_kqc2:altsyncram1|ALTSYNCRAM"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2 .mixed_port_feed_through_mode = "dont_care"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2 .operation_mode = "bidir_dual_port"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2 .port_a_address_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2 .port_a_address_width = 13; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2 .port_a_byte_enable_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2 .port_a_data_out_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2 .port_a_data_out_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2 .port_a_data_width = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2 .port_a_first_address = 0; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2 .port_a_first_bit_number = 2; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2 .port_a_last_address = 8191; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2 .port_a_logical_ram_depth = 32768; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2 .port_a_logical_ram_width = 8; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2 .port_a_read_during_write_mode = "new_data_with_nbe_read"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2 .port_b_address_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2 .port_b_address_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2 .port_b_address_width = 13; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2 .port_b_data_in_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2 .port_b_data_out_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2 .port_b_data_out_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2 .port_b_data_width = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2 .port_b_first_address = 0; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2 .port_b_first_bit_number = 2; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2 .port_b_last_address = 8191; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2 .port_b_logical_ram_depth = 32768; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2 .port_b_logical_ram_width = 8; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2 .port_b_read_during_write_mode = "new_data_with_nbe_read"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2 .port_b_read_enable_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2 .port_b_write_enable_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2 .ram_block_type = "M9K"; +// synopsys translate_on + +// Location: M9K_X73_Y15_N0 +fiftyfivenm_ram_block \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18 ( + .portawe(gnd), + .portare(vcc), + .portaaddrstall(gnd), + .portbwe(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode244w [2]), + .portbre(vcc), + .portbaddrstall(gnd), + .clk0(\clk~inputclkctrl_outclk ), + .clk1(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .ena0(\main_memory|altsyncram_component|auto_generated|rden_decode|w_anode284w[2]~1_combout ), + .ena1(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode244w[2]~0_combout ), + .ena2(vcc), + .ena3(vcc), + .clr0(gnd), + .clr1(gnd), + .portadatain({vcc}), + .portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o , +\cpu_addr[0]~input_o }), + .portabyteenamasks(1'b1), + .portbdatain({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [2]}), + .portbaddr({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [12],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [11],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [10], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [9],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [8],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [7], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [6],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [5],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [4], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [3],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [2],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [1], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [0]}), + .portbbyteenamasks(1'b1), + .devclrn(devclrn), + .devpor(devpor), + .portadataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18_PORTADATAOUT_bus ), + .portbdataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18_PORTBDATAOUT_bus )); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18 .clk0_core_clock_enable = "ena0"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18 .clk1_core_clock_enable = "ena1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18 .data_interleave_offset_in_bits = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18 .data_interleave_width_in_bits = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18 .logical_ram_name = "rom:boot_rom|altsyncram:altsyncram_component|altsyncram_b7b1:auto_generated|altsyncram_kqc2:altsyncram1|ALTSYNCRAM"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18 .mixed_port_feed_through_mode = "dont_care"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18 .operation_mode = "bidir_dual_port"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18 .port_a_address_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18 .port_a_address_width = 13; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18 .port_a_byte_enable_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18 .port_a_data_out_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18 .port_a_data_out_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18 .port_a_data_width = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18 .port_a_first_address = 0; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18 .port_a_first_bit_number = 2; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18 .port_a_last_address = 8191; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18 .port_a_logical_ram_depth = 32768; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18 .port_a_logical_ram_width = 8; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18 .port_a_read_during_write_mode = "new_data_with_nbe_read"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18 .port_b_address_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18 .port_b_address_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18 .port_b_address_width = 13; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18 .port_b_data_in_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18 .port_b_data_out_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18 .port_b_data_out_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18 .port_b_data_width = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18 .port_b_first_address = 0; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18 .port_b_first_bit_number = 2; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18 .port_b_last_address = 8191; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18 .port_b_logical_ram_depth = 32768; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18 .port_b_logical_ram_width = 8; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18 .port_b_read_during_write_mode = "new_data_with_nbe_read"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18 .port_b_read_enable_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18 .port_b_write_enable_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18 .ram_block_type = "M9K"; +// synopsys translate_on + +// Location: LCCOMB_X52_Y16_N28 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[2]~4 ( +// Equation(s): +// \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[2]~4_combout = (\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [1] & ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [0]) # +// ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18~PORTBDATAOUT0 )))) # (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [1] & (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [0] & +// (\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2~PORTBDATAOUT0 ))) + + .dataa(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [1]), + .datab(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [0]), + .datac(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2~PORTBDATAOUT0 ), + .datad(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18~PORTBDATAOUT0 ), + .cin(gnd), + .combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[2]~4_combout ), + .cout()); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[2]~4 .lut_mask = 16'hBA98; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[2]~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X52_Y16_N6 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[2]~5 ( +// Equation(s): +// \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[2]~5_combout = (\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [0] & +// ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[2]~4_combout & (\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26~PORTBDATAOUT0 )) # +// (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[2]~4_combout & ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10~PORTBDATAOUT0 ))))) # +// (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [0] & (((\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[2]~4_combout )))) + + .dataa(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26~PORTBDATAOUT0 ), + .datab(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [0]), + .datac(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10~PORTBDATAOUT0 ), + .datad(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[2]~4_combout ), + .cin(gnd), + .combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[2]~5_combout ), + .cout()); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[2]~5 .lut_mask = 16'hBBC0; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[2]~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X51_Y16_N8 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~21 ( + .dataa(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~2_combout ), + .datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [3]), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][3]~q ), + .datad(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[2]~5_combout ), + .cin(gnd), + .combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~21_combout ), + .cout()); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~21 .lut_mask = 16'hFE04; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~21 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X51_Y16_N9 +dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[2] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~21_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[6]~19_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [2]), + .prn(vcc)); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[2] .is_wysiwyg = "true"; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[2] .power_up = "low"; +// synopsys translate_on + +// Location: M9K_X73_Y13_N0 +fiftyfivenm_ram_block \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25 ( + .portawe(gnd), + .portare(vcc), + .portaaddrstall(gnd), + .portbwe(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode252w [2]), + .portbre(vcc), + .portbaddrstall(gnd), + .clk0(\clk~inputclkctrl_outclk ), + .clk1(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .ena0(\main_memory|altsyncram_component|auto_generated|rden_decode|w_anode284w[2]~2_combout ), + .ena1(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode252w[2]~0_combout ), + .ena2(vcc), + .ena3(vcc), + .clr0(gnd), + .clr1(gnd), + .portadatain({vcc}), + .portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o , +\cpu_addr[0]~input_o }), + .portabyteenamasks(1'b1), + .portbdatain({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [1]}), + .portbaddr({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [12],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [11],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [10], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [9],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [8],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [7], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [6],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [5],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [4], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [3],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [2],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [1], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [0]}), + .portbbyteenamasks(1'b1), + .devclrn(devclrn), + .devpor(devpor), + .portadataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25_PORTADATAOUT_bus ), + .portbdataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25_PORTBDATAOUT_bus )); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25 .clk0_core_clock_enable = "ena0"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25 .clk1_core_clock_enable = "ena1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25 .data_interleave_offset_in_bits = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25 .data_interleave_width_in_bits = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25 .logical_ram_name = "rom:boot_rom|altsyncram:altsyncram_component|altsyncram_b7b1:auto_generated|altsyncram_kqc2:altsyncram1|ALTSYNCRAM"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25 .mixed_port_feed_through_mode = "dont_care"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25 .operation_mode = "bidir_dual_port"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25 .port_a_address_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25 .port_a_address_width = 13; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25 .port_a_byte_enable_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25 .port_a_data_out_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25 .port_a_data_out_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25 .port_a_data_width = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25 .port_a_first_address = 0; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25 .port_a_first_bit_number = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25 .port_a_last_address = 8191; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25 .port_a_logical_ram_depth = 32768; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25 .port_a_logical_ram_width = 8; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25 .port_a_read_during_write_mode = "new_data_with_nbe_read"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25 .port_b_address_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25 .port_b_address_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25 .port_b_address_width = 13; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25 .port_b_data_in_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25 .port_b_data_out_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25 .port_b_data_out_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25 .port_b_data_width = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25 .port_b_first_address = 0; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25 .port_b_first_bit_number = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25 .port_b_last_address = 8191; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25 .port_b_logical_ram_depth = 32768; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25 .port_b_logical_ram_width = 8; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25 .port_b_read_during_write_mode = "new_data_with_nbe_read"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25 .port_b_read_enable_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25 .port_b_write_enable_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25 .ram_block_type = "M9K"; +// synopsys translate_on + +// Location: M9K_X53_Y10_N0 +fiftyfivenm_ram_block \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9 ( + .portawe(gnd), + .portare(vcc), + .portaaddrstall(gnd), + .portbwe(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode236w [2]), + .portbre(vcc), + .portbaddrstall(gnd), + .clk0(\clk~inputclkctrl_outclk ), + .clk1(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .ena0(\main_memory|altsyncram_component|auto_generated|rden_decode|w_anode284w[2]~0_combout ), + .ena1(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode236w[2]~0_combout ), + .ena2(vcc), + .ena3(vcc), + .clr0(gnd), + .clr1(gnd), + .portadatain({vcc}), + .portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o , +\cpu_addr[0]~input_o }), + .portabyteenamasks(1'b1), + .portbdatain({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [1]}), + .portbaddr({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [12],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [11],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [10], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [9],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [8],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [7], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [6],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [5],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [4], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [3],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [2],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [1], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [0]}), + .portbbyteenamasks(1'b1), + .devclrn(devclrn), + .devpor(devpor), + .portadataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9_PORTADATAOUT_bus ), + .portbdataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9_PORTBDATAOUT_bus )); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9 .clk0_core_clock_enable = "ena0"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9 .clk1_core_clock_enable = "ena1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9 .data_interleave_offset_in_bits = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9 .data_interleave_width_in_bits = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9 .logical_ram_name = "rom:boot_rom|altsyncram:altsyncram_component|altsyncram_b7b1:auto_generated|altsyncram_kqc2:altsyncram1|ALTSYNCRAM"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9 .mixed_port_feed_through_mode = "dont_care"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9 .operation_mode = "bidir_dual_port"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9 .port_a_address_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9 .port_a_address_width = 13; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9 .port_a_byte_enable_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9 .port_a_data_out_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9 .port_a_data_out_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9 .port_a_data_width = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9 .port_a_first_address = 0; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9 .port_a_first_bit_number = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9 .port_a_last_address = 8191; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9 .port_a_logical_ram_depth = 32768; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9 .port_a_logical_ram_width = 8; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9 .port_a_read_during_write_mode = "new_data_with_nbe_read"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9 .port_b_address_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9 .port_b_address_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9 .port_b_address_width = 13; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9 .port_b_data_in_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9 .port_b_data_out_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9 .port_b_data_out_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9 .port_b_data_width = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9 .port_b_first_address = 0; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9 .port_b_first_bit_number = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9 .port_b_last_address = 8191; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9 .port_b_logical_ram_depth = 32768; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9 .port_b_logical_ram_width = 8; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9 .port_b_read_during_write_mode = "new_data_with_nbe_read"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9 .port_b_read_enable_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9 .port_b_write_enable_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9 .ram_block_type = "M9K"; +// synopsys translate_on + +// Location: M9K_X53_Y9_N0 +fiftyfivenm_ram_block \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1 ( + .portawe(gnd), + .portare(vcc), + .portaaddrstall(gnd), + .portbwe(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode223w [2]), + .portbre(vcc), + .portbaddrstall(gnd), + .clk0(\clk~inputclkctrl_outclk ), + .clk1(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .ena0(\main_memory|altsyncram_component|auto_generated|rden_decode|w_anode261w[2]~0_combout ), + .ena1(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode223w[2]~0_combout ), + .ena2(vcc), + .ena3(vcc), + .clr0(gnd), + .clr1(gnd), + .portadatain({vcc}), + .portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o , +\cpu_addr[0]~input_o }), + .portabyteenamasks(1'b1), + .portbdatain({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [1]}), + .portbaddr({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [12],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [11],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [10], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [9],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [8],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [7], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [6],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [5],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [4], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [3],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [2],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [1], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [0]}), + .portbbyteenamasks(1'b1), + .devclrn(devclrn), + .devpor(devpor), + .portadataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1_PORTADATAOUT_bus ), + .portbdataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1_PORTBDATAOUT_bus )); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1 .clk0_core_clock_enable = "ena0"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1 .clk1_core_clock_enable = "ena1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1 .data_interleave_offset_in_bits = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1 .data_interleave_width_in_bits = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1 .logical_ram_name = "rom:boot_rom|altsyncram:altsyncram_component|altsyncram_b7b1:auto_generated|altsyncram_kqc2:altsyncram1|ALTSYNCRAM"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1 .mixed_port_feed_through_mode = "dont_care"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1 .operation_mode = "bidir_dual_port"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1 .port_a_address_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1 .port_a_address_width = 13; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1 .port_a_byte_enable_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1 .port_a_data_out_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1 .port_a_data_out_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1 .port_a_data_width = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1 .port_a_first_address = 0; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1 .port_a_first_bit_number = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1 .port_a_last_address = 8191; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1 .port_a_logical_ram_depth = 32768; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1 .port_a_logical_ram_width = 8; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1 .port_a_read_during_write_mode = "new_data_with_nbe_read"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1 .port_b_address_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1 .port_b_address_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1 .port_b_address_width = 13; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1 .port_b_data_in_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1 .port_b_data_out_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1 .port_b_data_out_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1 .port_b_data_width = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1 .port_b_first_address = 0; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1 .port_b_first_bit_number = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1 .port_b_last_address = 8191; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1 .port_b_logical_ram_depth = 32768; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1 .port_b_logical_ram_width = 8; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1 .port_b_read_during_write_mode = "new_data_with_nbe_read"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1 .port_b_read_enable_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1 .port_b_write_enable_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1 .ram_block_type = "M9K"; +// synopsys translate_on + +// Location: LCCOMB_X52_Y16_N0 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[1]~2 ( +// Equation(s): +// \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[1]~2_combout = (\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [1] & (\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [0])) # +// (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [1] & ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [0] & (\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9~PORTBDATAOUT0 )) # +// (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [0] & ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1~PORTBDATAOUT0 ))))) + + .dataa(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [1]), + .datab(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [0]), + .datac(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9~PORTBDATAOUT0 ), + .datad(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1~PORTBDATAOUT0 ), + .cin(gnd), + .combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[1]~2_combout ), + .cout()); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[1]~2 .lut_mask = 16'hD9C8; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[1]~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: M9K_X73_Y17_N0 +fiftyfivenm_ram_block \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17 ( + .portawe(gnd), + .portare(vcc), + .portaaddrstall(gnd), + .portbwe(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode244w [2]), + .portbre(vcc), + .portbaddrstall(gnd), + .clk0(\clk~inputclkctrl_outclk ), + .clk1(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .ena0(\main_memory|altsyncram_component|auto_generated|rden_decode|w_anode284w[2]~1_combout ), + .ena1(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode244w[2]~0_combout ), + .ena2(vcc), + .ena3(vcc), + .clr0(gnd), + .clr1(gnd), + .portadatain({vcc}), + .portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o , +\cpu_addr[0]~input_o }), + .portabyteenamasks(1'b1), + .portbdatain({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [1]}), + .portbaddr({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [12],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [11],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [10], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [9],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [8],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [7], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [6],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [5],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [4], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [3],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [2],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [1], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [0]}), + .portbbyteenamasks(1'b1), + .devclrn(devclrn), + .devpor(devpor), + .portadataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17_PORTADATAOUT_bus ), + .portbdataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17_PORTBDATAOUT_bus )); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17 .clk0_core_clock_enable = "ena0"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17 .clk1_core_clock_enable = "ena1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17 .data_interleave_offset_in_bits = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17 .data_interleave_width_in_bits = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17 .logical_ram_name = "rom:boot_rom|altsyncram:altsyncram_component|altsyncram_b7b1:auto_generated|altsyncram_kqc2:altsyncram1|ALTSYNCRAM"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17 .mixed_port_feed_through_mode = "dont_care"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17 .operation_mode = "bidir_dual_port"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17 .port_a_address_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17 .port_a_address_width = 13; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17 .port_a_byte_enable_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17 .port_a_data_out_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17 .port_a_data_out_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17 .port_a_data_width = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17 .port_a_first_address = 0; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17 .port_a_first_bit_number = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17 .port_a_last_address = 8191; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17 .port_a_logical_ram_depth = 32768; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17 .port_a_logical_ram_width = 8; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17 .port_a_read_during_write_mode = "new_data_with_nbe_read"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17 .port_b_address_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17 .port_b_address_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17 .port_b_address_width = 13; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17 .port_b_data_in_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17 .port_b_data_out_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17 .port_b_data_out_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17 .port_b_data_width = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17 .port_b_first_address = 0; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17 .port_b_first_bit_number = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17 .port_b_last_address = 8191; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17 .port_b_logical_ram_depth = 32768; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17 .port_b_logical_ram_width = 8; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17 .port_b_read_during_write_mode = "new_data_with_nbe_read"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17 .port_b_read_enable_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17 .port_b_write_enable_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17 .ram_block_type = "M9K"; +// synopsys translate_on + +// Location: LCCOMB_X52_Y16_N18 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[1]~3 ( +// Equation(s): +// \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[1]~3_combout = (\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[1]~2_combout & +// ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25~PORTBDATAOUT0 ) # ((!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [1])))) # +// (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[1]~2_combout & (((\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17~PORTBDATAOUT0 & +// \boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [1])))) + + .dataa(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25~PORTBDATAOUT0 ), + .datab(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[1]~2_combout ), + .datac(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17~PORTBDATAOUT0 ), + .datad(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [1]), + .cin(gnd), + .combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[1]~3_combout ), + .cout()); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[1]~3 .lut_mask = 16'hB8CC; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[1]~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X51_Y16_N18 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~20 ( + .dataa(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~2_combout ), + .datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [2]), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][3]~q ), + .datad(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[1]~3_combout ), + .cin(gnd), + .combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~20_combout ), + .cout()); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~20 .lut_mask = 16'hFE04; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~20 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X51_Y16_N19 +dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[1] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~20_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[6]~19_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [1]), + .prn(vcc)); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[1] .is_wysiwyg = "true"; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[1] .power_up = "low"; +// synopsys translate_on + +// Location: M9K_X73_Y16_N0 +fiftyfivenm_ram_block \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16 ( + .portawe(gnd), + .portare(vcc), + .portaaddrstall(gnd), + .portbwe(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode244w [2]), + .portbre(vcc), + .portbaddrstall(gnd), + .clk0(\clk~inputclkctrl_outclk ), + .clk1(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .ena0(\main_memory|altsyncram_component|auto_generated|rden_decode|w_anode284w[2]~1_combout ), + .ena1(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode244w[2]~0_combout ), + .ena2(vcc), + .ena3(vcc), + .clr0(gnd), + .clr1(gnd), + .portadatain({vcc}), + .portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o , +\cpu_addr[0]~input_o }), + .portabyteenamasks(1'b1), + .portbdatain({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [0]}), + .portbaddr({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [12],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [11],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [10], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [9],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [8],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [7], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [6],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [5],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [4], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [3],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [2],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [1], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [0]}), + .portbbyteenamasks(1'b1), + .devclrn(devclrn), + .devpor(devpor), + .portadataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16_PORTADATAOUT_bus ), + .portbdataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16_PORTBDATAOUT_bus )); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16 .clk0_core_clock_enable = "ena0"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16 .clk1_core_clock_enable = "ena1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16 .data_interleave_offset_in_bits = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16 .data_interleave_width_in_bits = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16 .logical_ram_name = "rom:boot_rom|altsyncram:altsyncram_component|altsyncram_b7b1:auto_generated|altsyncram_kqc2:altsyncram1|ALTSYNCRAM"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16 .mixed_port_feed_through_mode = "dont_care"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16 .operation_mode = "bidir_dual_port"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16 .port_a_address_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16 .port_a_address_width = 13; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16 .port_a_byte_enable_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16 .port_a_data_out_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16 .port_a_data_out_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16 .port_a_data_width = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16 .port_a_first_address = 0; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16 .port_a_first_bit_number = 0; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16 .port_a_last_address = 8191; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16 .port_a_logical_ram_depth = 32768; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16 .port_a_logical_ram_width = 8; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16 .port_a_read_during_write_mode = "new_data_with_nbe_read"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16 .port_b_address_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16 .port_b_address_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16 .port_b_address_width = 13; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16 .port_b_data_in_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16 .port_b_data_out_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16 .port_b_data_out_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16 .port_b_data_width = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16 .port_b_first_address = 0; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16 .port_b_first_bit_number = 0; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16 .port_b_last_address = 8191; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16 .port_b_logical_ram_depth = 32768; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16 .port_b_logical_ram_width = 8; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16 .port_b_read_during_write_mode = "new_data_with_nbe_read"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16 .port_b_read_enable_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16 .port_b_write_enable_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16 .ram_block_type = "M9K"; +// synopsys translate_on + +// Location: M9K_X73_Y8_N0 +fiftyfivenm_ram_block \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0 ( + .portawe(gnd), + .portare(vcc), + .portaaddrstall(gnd), + .portbwe(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode223w [2]), + .portbre(vcc), + .portbaddrstall(gnd), + .clk0(\clk~inputclkctrl_outclk ), + .clk1(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .ena0(\main_memory|altsyncram_component|auto_generated|rden_decode|w_anode261w[2]~0_combout ), + .ena1(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode223w[2]~0_combout ), + .ena2(vcc), + .ena3(vcc), + .clr0(gnd), + .clr1(gnd), + .portadatain({vcc}), + .portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o , +\cpu_addr[0]~input_o }), + .portabyteenamasks(1'b1), + .portbdatain({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [0]}), + .portbaddr({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [12],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [11],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [10], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [9],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [8],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [7], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [6],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [5],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [4], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [3],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [2],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [1], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [0]}), + .portbbyteenamasks(1'b1), + .devclrn(devclrn), + .devpor(devpor), + .portadataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0_PORTADATAOUT_bus ), + .portbdataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0_PORTBDATAOUT_bus )); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0 .clk0_core_clock_enable = "ena0"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0 .clk1_core_clock_enable = "ena1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0 .data_interleave_offset_in_bits = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0 .data_interleave_width_in_bits = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0 .logical_ram_name = "rom:boot_rom|altsyncram:altsyncram_component|altsyncram_b7b1:auto_generated|altsyncram_kqc2:altsyncram1|ALTSYNCRAM"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0 .mixed_port_feed_through_mode = "dont_care"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0 .operation_mode = "bidir_dual_port"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0 .port_a_address_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0 .port_a_address_width = 13; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0 .port_a_byte_enable_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0 .port_a_data_out_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0 .port_a_data_out_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0 .port_a_data_width = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0 .port_a_first_address = 0; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0 .port_a_first_bit_number = 0; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0 .port_a_last_address = 8191; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0 .port_a_logical_ram_depth = 32768; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0 .port_a_logical_ram_width = 8; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0 .port_a_read_during_write_mode = "new_data_with_nbe_read"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0 .port_b_address_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0 .port_b_address_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0 .port_b_address_width = 13; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0 .port_b_data_in_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0 .port_b_data_out_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0 .port_b_data_out_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0 .port_b_data_width = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0 .port_b_first_address = 0; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0 .port_b_first_bit_number = 0; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0 .port_b_last_address = 8191; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0 .port_b_logical_ram_depth = 32768; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0 .port_b_logical_ram_width = 8; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0 .port_b_read_during_write_mode = "new_data_with_nbe_read"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0 .port_b_read_enable_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0 .port_b_write_enable_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0 .ram_block_type = "M9K"; +// synopsys translate_on + +// Location: LCCOMB_X52_Y16_N12 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[0]~0 ( +// Equation(s): +// \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[0]~0_combout = (\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [0] & (((\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [1])))) # +// (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [0] & ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [1] & (\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16~PORTBDATAOUT0 )) # +// (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [1] & ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0~PORTBDATAOUT0 ))))) + + .dataa(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16~PORTBDATAOUT0 ), + .datab(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [0]), + .datac(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0~PORTBDATAOUT0 ), + .datad(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [1]), + .cin(gnd), + .combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[0]~0_combout ), + .cout()); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[0]~0 .lut_mask = 16'hEE30; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[0]~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: M9K_X73_Y10_N0 +fiftyfivenm_ram_block \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8 ( + .portawe(gnd), + .portare(vcc), + .portaaddrstall(gnd), + .portbwe(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode236w [2]), + .portbre(vcc), + .portbaddrstall(gnd), + .clk0(\clk~inputclkctrl_outclk ), + .clk1(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .ena0(\main_memory|altsyncram_component|auto_generated|rden_decode|w_anode284w[2]~0_combout ), + .ena1(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode236w[2]~0_combout ), + .ena2(vcc), + .ena3(vcc), + .clr0(gnd), + .clr1(gnd), + .portadatain({vcc}), + .portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o , +\cpu_addr[0]~input_o }), + .portabyteenamasks(1'b1), + .portbdatain({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [0]}), + .portbaddr({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [12],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [11],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [10], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [9],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [8],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [7], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [6],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [5],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [4], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [3],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [2],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [1], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [0]}), + .portbbyteenamasks(1'b1), + .devclrn(devclrn), + .devpor(devpor), + .portadataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8_PORTADATAOUT_bus ), + .portbdataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8_PORTBDATAOUT_bus )); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8 .clk0_core_clock_enable = "ena0"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8 .clk1_core_clock_enable = "ena1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8 .data_interleave_offset_in_bits = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8 .data_interleave_width_in_bits = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8 .logical_ram_name = "rom:boot_rom|altsyncram:altsyncram_component|altsyncram_b7b1:auto_generated|altsyncram_kqc2:altsyncram1|ALTSYNCRAM"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8 .mixed_port_feed_through_mode = "dont_care"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8 .operation_mode = "bidir_dual_port"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8 .port_a_address_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8 .port_a_address_width = 13; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8 .port_a_byte_enable_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8 .port_a_data_out_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8 .port_a_data_out_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8 .port_a_data_width = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8 .port_a_first_address = 0; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8 .port_a_first_bit_number = 0; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8 .port_a_last_address = 8191; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8 .port_a_logical_ram_depth = 32768; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8 .port_a_logical_ram_width = 8; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8 .port_a_read_during_write_mode = "new_data_with_nbe_read"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8 .port_b_address_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8 .port_b_address_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8 .port_b_address_width = 13; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8 .port_b_data_in_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8 .port_b_data_out_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8 .port_b_data_out_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8 .port_b_data_width = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8 .port_b_first_address = 0; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8 .port_b_first_bit_number = 0; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8 .port_b_last_address = 8191; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8 .port_b_logical_ram_depth = 32768; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8 .port_b_logical_ram_width = 8; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8 .port_b_read_during_write_mode = "new_data_with_nbe_read"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8 .port_b_read_enable_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8 .port_b_write_enable_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8 .ram_block_type = "M9K"; +// synopsys translate_on + +// Location: M9K_X73_Y12_N0 +fiftyfivenm_ram_block \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24 ( + .portawe(gnd), + .portare(vcc), + .portaaddrstall(gnd), + .portbwe(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode252w [2]), + .portbre(vcc), + .portbaddrstall(gnd), + .clk0(\clk~inputclkctrl_outclk ), + .clk1(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .ena0(\main_memory|altsyncram_component|auto_generated|rden_decode|w_anode284w[2]~2_combout ), + .ena1(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode252w[2]~0_combout ), + .ena2(vcc), + .ena3(vcc), + .clr0(gnd), + .clr1(gnd), + .portadatain({vcc}), + .portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o , +\cpu_addr[0]~input_o }), + .portabyteenamasks(1'b1), + .portbdatain({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [0]}), + .portbaddr({\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [12],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [11],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [10], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [9],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [8],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [7], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [6],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [5],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [4], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [3],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [2],\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [1], +\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [0]}), + .portbbyteenamasks(1'b1), + .devclrn(devclrn), + .devpor(devpor), + .portadataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24_PORTADATAOUT_bus ), + .portbdataout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24_PORTBDATAOUT_bus )); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24 .clk0_core_clock_enable = "ena0"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24 .clk1_core_clock_enable = "ena1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24 .data_interleave_offset_in_bits = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24 .data_interleave_width_in_bits = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24 .logical_ram_name = "rom:boot_rom|altsyncram:altsyncram_component|altsyncram_b7b1:auto_generated|altsyncram_kqc2:altsyncram1|ALTSYNCRAM"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24 .mixed_port_feed_through_mode = "dont_care"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24 .operation_mode = "bidir_dual_port"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24 .port_a_address_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24 .port_a_address_width = 13; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24 .port_a_byte_enable_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24 .port_a_data_out_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24 .port_a_data_out_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24 .port_a_data_width = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24 .port_a_first_address = 0; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24 .port_a_first_bit_number = 0; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24 .port_a_last_address = 8191; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24 .port_a_logical_ram_depth = 32768; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24 .port_a_logical_ram_width = 8; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24 .port_a_read_during_write_mode = "new_data_with_nbe_read"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24 .port_b_address_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24 .port_b_address_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24 .port_b_address_width = 13; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24 .port_b_data_in_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24 .port_b_data_out_clear = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24 .port_b_data_out_clock = "none"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24 .port_b_data_width = 1; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24 .port_b_first_address = 0; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24 .port_b_first_bit_number = 0; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24 .port_b_last_address = 8191; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24 .port_b_logical_ram_depth = 32768; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24 .port_b_logical_ram_width = 8; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24 .port_b_read_during_write_mode = "new_data_with_nbe_read"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24 .port_b_read_enable_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24 .port_b_write_enable_clock = "clock1"; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24 .ram_block_type = "M9K"; +// synopsys translate_on + +// Location: LCCOMB_X52_Y16_N22 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[0]~1 ( +// Equation(s): +// \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[0]~1_combout = (\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[0]~0_combout & +// (((\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24~PORTBDATAOUT0 )) # (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [0]))) # +// (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[0]~0_combout & (\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [0] & +// (\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8~PORTBDATAOUT0 ))) + + .dataa(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[0]~0_combout ), + .datab(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b [0]), + .datac(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8~PORTBDATAOUT0 ), + .datad(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24~PORTBDATAOUT0 ), + .cin(gnd), + .combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[0]~1_combout ), + .cout()); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[0]~1 .lut_mask = 16'hEA62; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[0]~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X51_Y16_N24 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~18 ( + .dataa(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~2_combout ), + .datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [1]), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][3]~q ), + .datad(\boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[0]~1_combout ), + .cin(gnd), + .combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~18_combout ), + .cout()); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~18 .lut_mask = 16'hFE04; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~18 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X51_Y16_N25 +dffeas \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[0] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~18_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[6]~19_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [0]), + .prn(vcc)); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[0] .is_wysiwyg = "true"; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X47_Y21_N4 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|adapted_tdo~1 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][2]~q ), + .datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|adapted_tdo~0_combout ), + .datac(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg [0]), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][1]~q ), + .cin(gnd), + .combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|adapted_tdo~1_combout ), + .cout()); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|adapted_tdo~1 .lut_mask = 16'hF0E4; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|adapted_tdo~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X46_Y21_N18 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|mgl_prim2|adapted_tdo~2 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~q ), + .datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR [0]), + .datac(gnd), + .datad(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|adapted_tdo~1_combout ), + .cin(gnd), + .combout(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|adapted_tdo~2_combout ), + .cout()); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|adapted_tdo~2 .lut_mask = 16'hDD88; +defparam \boot_rom|altsyncram_component|auto_generated|mgl_prim2|adapted_tdo~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X46_Y24_N19 +dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_tdo_sel_reg[0] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(gnd), + .asdata(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [8]), + .clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|reset_ena_reg_proc~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_tdo_sel_reg [0]), + .prn(vcc)); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_tdo_sel_reg[0] .is_wysiwyg = "true"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_tdo_sel_reg[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X46_Y24_N18 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~7 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [8]), + .datab(gnd), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_tdo_sel_reg [0]), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~7_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~7 .lut_mask = 16'hF0AA; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~7 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X46_Y24_N20 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~12 ( + .dataa(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|adapted_tdo~2_combout ), + .datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~7_combout ), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [4]), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~12_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~12 .lut_mask = 16'h8880; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~12 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X46_Y21_N22 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~2 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]), + .datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_bypass_reg~q ), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [4]), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [8]), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~2_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~2 .lut_mask = 16'hFF04; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X45_Y24_N2 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg_ena~0 ( + .dataa(gnd), + .datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [4]), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]), + .datad(gnd), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg_ena~0_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg_ena~0 .lut_mask = 16'hFCFC; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg_ena~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X46_Y24_N26 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|clear_signal ( + .dataa(gnd), + .datab(gnd), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [8]), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|clear_signal~combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|clear_signal .lut_mask = 16'hF000; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|clear_signal .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X45_Y25_N10 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~11 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter [0]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~11_combout ), + .cout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~12 )); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~11 .lut_mask = 16'h55AA; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~11 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X45_Y25_N12 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[1]~14 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter [1]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~12 ), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[1]~14_combout ), + .cout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[1]~15 )); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[1]~14 .lut_mask = 16'h5A5F; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[1]~14 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X45_Y25_N30 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~23 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|clear_signal~combout ), + .datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_dr_scan_reg~q ), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [4]), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~23_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~23 .lut_mask = 16'hAEAA; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~23 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X45_Y25_N13 +dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[1] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[1]~14_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~22_combout ), + .sload(gnd), + .ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~23_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter [1]), + .prn(vcc)); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[1] .is_wysiwyg = "true"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X45_Y25_N14 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[2]~16 ( + .dataa(gnd), + .datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter [2]), + .datac(gnd), + .datad(vcc), + .cin(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[1]~15 ), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[2]~16_combout ), + .cout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[2]~17 )); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[2]~16 .lut_mask = 16'hC30C; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[2]~16 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X45_Y25_N15 +dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[2] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[2]~16_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~22_combout ), + .sload(gnd), + .ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~23_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter [2]), + .prn(vcc)); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[2] .is_wysiwyg = "true"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X45_Y25_N16 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[3]~18 ( + .dataa(gnd), + .datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter [3]), + .datac(gnd), + .datad(vcc), + .cin(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[2]~17 ), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[3]~18_combout ), + .cout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[3]~19 )); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[3]~18 .lut_mask = 16'h3C3F; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[3]~18 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X45_Y25_N17 +dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[3] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[3]~18_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~22_combout ), + .sload(gnd), + .ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~23_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter [3]), + .prn(vcc)); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[3] .is_wysiwyg = "true"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[3] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X45_Y25_N18 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[4]~20 ( + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter [4]), + .cin(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[3]~19 ), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[4]~20_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[4]~20 .lut_mask = 16'hF00F; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[4]~20 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X45_Y25_N19 +dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[4] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[4]~20_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~22_combout ), + .sload(gnd), + .ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~23_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter [4]), + .prn(vcc)); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[4] .is_wysiwyg = "true"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[4] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X45_Y25_N6 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~13 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter [0]), + .datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter [3]), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter [2]), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter [4]), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~13_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~13 .lut_mask = 16'hFEFF; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~13 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X45_Y25_N20 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~22 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter [1]), + .datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [8]), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~13_combout ), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~22_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~22 .lut_mask = 16'hC0D5; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~22 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X45_Y25_N11 +dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~11_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~22_combout ), + .sload(gnd), + .ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~23_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter [0]), + .prn(vcc)); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0] .is_wysiwyg = "true"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X45_Y25_N28 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~6 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter [0]), + .datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter [4]), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter [2]), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter [1]), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~6_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~6 .lut_mask = 16'h0B00; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X45_Y25_N24 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~9 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter [1]), + .datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter [3]), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter [2]), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter [4]), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~9_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~9 .lut_mask = 16'h007B; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~9 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X45_Y25_N26 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~10 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter [0]), + .datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~9_combout ), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [4]), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|clear_signal~combout ), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~10_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~10 .lut_mask = 16'h0004; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~10 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X45_Y25_N22 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~11 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~10_combout ), + .datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [4]), + .datac(\altera_internal_jtag~TDIUTAP ), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|clear_signal~combout ), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~11_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~11 .lut_mask = 16'hAAEA; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~11 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X45_Y24_N12 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR[1]~12 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [4]), + .datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|clear_signal~combout ), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_dr_scan_reg~q ), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR[1]~12_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR[1]~12 .lut_mask = 16'hFECC; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR[1]~12 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X45_Y25_N23 +dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR[3] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~11_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR[1]~12_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR [3]), + .prn(vcc)); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR[3] .is_wysiwyg = "true"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR[3] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X45_Y25_N0 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~8 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR [3]), + .datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~6_combout ), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [4]), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|clear_signal~combout ), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~8_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~8 .lut_mask = 16'h00AC; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~8 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X45_Y25_N1 +dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR[2] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~8_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR[1]~12_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR [2]), + .prn(vcc)); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR[2] .is_wysiwyg = "true"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X45_Y25_N4 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~7 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|clear_signal~combout ), + .datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~6_combout ), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [4]), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR [2]), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~7_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~7 .lut_mask = 16'h5404; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~7 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X45_Y25_N5 +dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR[1] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~7_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR[1]~12_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR [1]), + .prn(vcc)); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR[1] .is_wysiwyg = "true"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X45_Y25_N2 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~4 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter [0]), + .datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [4]), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter [2]), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter [3]), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~4_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~4 .lut_mask = 16'h2000; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X45_Y25_N8 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~5 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|clear_signal~combout ), + .datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [4]), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR [1]), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~4_combout ), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~5_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~5 .lut_mask = 16'h5540; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X45_Y25_N9 +dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR[0] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~5_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR[1]~12_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR [0]), + .prn(vcc)); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR[0] .is_wysiwyg = "true"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X45_Y24_N26 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg~3 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]), + .datab(gnd), + .datac(\altera_internal_jtag~TDIUTAP ), + .datad(gnd), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg~3_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg~3 .lut_mask = 16'h5050; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X45_Y24_N27 +dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg[3] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg~3_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg_ena~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg [3]), + .prn(vcc)); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg[3] .is_wysiwyg = "true"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg[3] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X45_Y24_N24 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg~2 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]), + .datab(gnd), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg [3]), + .datad(gnd), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg~2_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg~2 .lut_mask = 16'hFAFA; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X45_Y24_N25 +dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg[2] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg~2_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg_ena~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg [2]), + .prn(vcc)); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg[2] .is_wysiwyg = "true"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X45_Y24_N10 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg~1 ( + .dataa(gnd), + .datab(gnd), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg [2]), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg~1_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg~1 .lut_mask = 16'h0F00; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X45_Y24_N11 +dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg[1] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg~1_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg_ena~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg [1]), + .prn(vcc)); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg[1] .is_wysiwyg = "true"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X45_Y24_N28 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg~0 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg [1]), + .datab(gnd), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]), + .datad(gnd), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg~0_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg~0 .lut_mask = 16'hFAFA; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X45_Y24_N29 +dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg[0] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg~0_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg_ena~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg [0]), + .prn(vcc)); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg[0] .is_wysiwyg = "true"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X46_Y24_N10 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~3 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [1]), + .datab(gnd), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [0]), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~3_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~3 .lut_mask = 16'hFFFA; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X46_Y24_N4 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~4 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR [0]), + .datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg [0]), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [2]), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~3_combout ), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~4_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~4 .lut_mask = 16'h00CA; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X46_Y24_N6 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~5 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [1]), + .datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [0]), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [2]), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~5_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~5 .lut_mask = 16'h0040; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X46_Y23_N16 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[0]~7 ( + .dataa(gnd), + .datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [0]), + .datac(gnd), + .datad(vcc), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[0]~7_combout ), + .cout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[0]~8 )); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[0]~7 .lut_mask = 16'h33CC; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[0]~7 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X46_Y23_N20 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[2]~13 ( + .dataa(gnd), + .datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [2]), + .datac(gnd), + .datad(vcc), + .cin(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[1]~12 ), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[2]~13_combout ), + .cout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[2]~14 )); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[2]~13 .lut_mask = 16'h3CCF; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[2]~13 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X46_Y23_N22 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[3]~15 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [3]), + .datab(gnd), + .datac(gnd), + .datad(vcc), + .cin(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[2]~14 ), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[3]~15_combout ), + .cout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[3]~16 )); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[3]~15 .lut_mask = 16'hA505; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[3]~15 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: LCCOMB_X45_Y23_N14 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[1]~10 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ), + .datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [8]), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_dr_scan_reg~q ), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[1]~10_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[1]~10 .lut_mask = 16'hF888; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[1]~10 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X46_Y23_N23 +dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[3] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[3]~15_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[1]~19_combout ), + .ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[1]~10_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [3]), + .prn(vcc)); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[3] .is_wysiwyg = "true"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[3] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X46_Y23_N24 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[4]~17 ( + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [4]), + .cin(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[3]~16 ), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[4]~17_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[4]~17 .lut_mask = 16'h0FF0; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[4]~17 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X46_Y23_N25 +dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[4] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[4]~17_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[1]~19_combout ), + .ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[1]~10_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [4]), + .prn(vcc)); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[4] .is_wysiwyg = "true"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[4] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X46_Y23_N10 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[1]~9 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [2]), + .datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [4]), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [3]), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [0]), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[1]~9_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[1]~9 .lut_mask = 16'hFFFE; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[1]~9 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X46_Y23_N28 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[1]~19 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[1]~9_combout ), + .datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [1]), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [8]), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[1]~19_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[1]~19 .lut_mask = 16'hF111; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[1]~19 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X46_Y23_N17 +dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[0] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[0]~7_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[1]~19_combout ), + .ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[1]~10_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [0]), + .prn(vcc)); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[0] .is_wysiwyg = "true"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X46_Y23_N18 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[1]~11 ( + .dataa(gnd), + .datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [1]), + .datac(gnd), + .datad(vcc), + .cin(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[0]~8 ), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[1]~11_combout ), + .cout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[1]~12 )); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[1]~11 .lut_mask = 16'hC303; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[1]~11 .sum_lutc_input = "cin"; +// synopsys translate_on + +// Location: FF_X46_Y23_N19 +dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[1] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[1]~11_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[1]~19_combout ), + .ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[1]~10_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [1]), + .prn(vcc)); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[1] .is_wysiwyg = "true"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X46_Y23_N21 +dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[2] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[2]~13_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[1]~19_combout ), + .ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[1]~10_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [2]), + .prn(vcc)); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[2] .is_wysiwyg = "true"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X46_Y23_N4 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~13 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [2]), + .datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [1]), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [3]), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [0]), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~13_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~13 .lut_mask = 16'hAF13; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~13 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X46_Y23_N14 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~14 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~13_combout ), + .datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [2]), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [3]), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [4]), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~14_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~14 .lut_mask = 16'h03AA; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~14 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X46_Y23_N8 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[1]~4 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [2]), + .datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [1]), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [3]), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [0]), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[1]~4_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[1]~4 .lut_mask = 16'h8000; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[1]~4 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X47_Y23_N28 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[1]~5 ( + .dataa(gnd), + .datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [4]), + .datac(gnd), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[1]~4_combout ), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[1]~5_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[1]~5 .lut_mask = 16'hCC00; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[1]~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X47_Y25_N26 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[3]~feeder ( + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\altera_internal_jtag~TDIUTAP ), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[3]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[3]~feeder .lut_mask = 16'hFF00; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[3]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X46_Y24_N2 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[0]~0 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [1]), + .datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [2]), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_dr_scan_reg~q ), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [0]), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[0]~0_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[0]~0 .lut_mask = 16'h0080; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[0]~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X47_Y24_N4 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[0]~1 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[0]~0_combout ), + .datab(gnd), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [4]), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [8]), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[0]~1_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[0]~1 .lut_mask = 16'h00A0; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[0]~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X47_Y25_N27 +dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[3] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[3]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[0]~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg [3]), + .prn(vcc)); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[3] .is_wysiwyg = "true"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[3] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X47_Y25_N8 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[2]~feeder ( + .dataa(gnd), + .datab(gnd), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg [3]), + .datad(gnd), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[2]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[2]~feeder .lut_mask = 16'hF0F0; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[2]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X47_Y25_N9 +dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[2] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[2]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[0]~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg [2]), + .prn(vcc)); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[2] .is_wysiwyg = "true"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X47_Y25_N30 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[1]~feeder ( + .dataa(gnd), + .datab(gnd), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg [2]), + .datad(gnd), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[1]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[1]~feeder .lut_mask = 16'hF0F0; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[1]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X47_Y25_N31 +dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[1] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[1]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[0]~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg [1]), + .prn(vcc)); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[1] .is_wysiwyg = "true"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X47_Y25_N4 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[0]~feeder ( + .dataa(gnd), + .datab(gnd), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg [1]), + .datad(gnd), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[0]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[0]~feeder .lut_mask = 16'hF0F0; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[0]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X47_Y25_N5 +dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[0] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[0]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[0]~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg [0]), + .prn(vcc)); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[0] .is_wysiwyg = "true"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X47_Y23_N10 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[0]~feeder ( + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg [0]), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[0]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[0]~feeder .lut_mask = 16'hFF00; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[0]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X47_Y24_N2 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[0]~0 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[0]~0_combout ), + .datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [8]), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [4]), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [8]), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[0]~0_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[0]~0 .lut_mask = 16'h0008; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[0]~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X47_Y23_N11 +dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[0] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[0]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[0]~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata [0]), + .prn(vcc)); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[0] .is_wysiwyg = "true"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X47_Y23_N0 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[0]~0 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~14_combout ), + .datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[1]~5_combout ), + .datac(gnd), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata [0]), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[0]~0_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[0]~0 .lut_mask = 16'hEE22; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[0]~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X47_Y23_N24 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[1]~feeder ( + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg [1]), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[1]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[1]~feeder .lut_mask = 16'hFF00; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[1]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X47_Y23_N25 +dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[1] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[1]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[0]~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata [1]), + .prn(vcc)); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[1] .is_wysiwyg = "true"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X46_Y23_N12 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~6 ( + .dataa(gnd), + .datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [1]), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [3]), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [4]), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~6_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~6 .lut_mask = 16'hFC3C; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X46_Y23_N30 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~7 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~6_combout ), + .datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [4]), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [2]), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [0]), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~7_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~7 .lut_mask = 16'h3523; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~7 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X47_Y23_N26 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[1]~1 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata [1]), + .datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[1]~5_combout ), + .datac(gnd), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~7_combout ), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[1]~1_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[1]~1 .lut_mask = 16'hBB88; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[1]~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X46_Y23_N6 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~11 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [2]), + .datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [1]), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [3]), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [0]), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~11_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~11 .lut_mask = 16'h3682; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~11 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X46_Y23_N26 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~12 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~11_combout ), + .datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [4]), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [1]), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [0]), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~12_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~12 .lut_mask = 16'h2622; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~12 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X47_Y23_N2 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[2]~feeder ( + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg [2]), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[2]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[2]~feeder .lut_mask = 16'hFF00; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[2]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X47_Y23_N3 +dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[2] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[2]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[0]~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata [2]), + .prn(vcc)); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[2] .is_wysiwyg = "true"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[2] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X47_Y23_N4 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[2]~2 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~12_combout ), + .datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[1]~5_combout ), + .datac(gnd), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata [2]), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[2]~2_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[2]~2 .lut_mask = 16'hEE22; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[2]~2 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X47_Y23_N6 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[3]~feeder ( + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg [3]), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[3]~feeder_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[3]~feeder .lut_mask = 16'hFF00; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[3]~feeder .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X47_Y23_N7 +dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[3] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[3]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[0]~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata [3]), + .prn(vcc)); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[3] .is_wysiwyg = "true"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[3] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X46_Y23_N0 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~8 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [2]), + .datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [1]), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [3]), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [4]), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~8_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~8 .lut_mask = 16'hFAB4; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~8 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X46_Y23_N2 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~9 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [2]), + .datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [1]), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [3]), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [4]), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~9_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~9 .lut_mask = 16'h05F8; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~9 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X47_Y23_N12 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~10 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~8_combout ), + .datab(gnd), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal [0]), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~9_combout ), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~10_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~10 .lut_mask = 16'h5A55; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~10 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X47_Y23_N30 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[3]~3 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata [3]), + .datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[1]~5_combout ), + .datac(gnd), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~10_combout ), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[3]~3_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[3]~3 .lut_mask = 16'hBB88; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[3]~3 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X47_Y23_N22 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_proc~0 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]), + .datab(gnd), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_dr_scan_reg~q ), + .datad(gnd), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_proc~0_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_proc~0 .lut_mask = 16'h5F5F; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_proc~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X47_Y23_N8 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg_ena ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_dr_scan_reg~q ), + .datab(gnd), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [4]), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg_ena~combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg_ena .lut_mask = 16'hAAA0; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg_ena .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X47_Y23_N31 +dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[3] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[3]~3_combout ), + .asdata(\altera_internal_jtag~TDIUTAP ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_proc~0_combout ), + .ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg_ena~combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg [3]), + .prn(vcc)); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[3] .is_wysiwyg = "true"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X47_Y23_N5 +dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[2] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[2]~2_combout ), + .asdata(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg [3]), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_proc~0_combout ), + .ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg_ena~combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg [2]), + .prn(vcc)); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[2] .is_wysiwyg = "true"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X47_Y23_N27 +dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[1] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[1]~1_combout ), + .asdata(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg [2]), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_proc~0_combout ), + .ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg_ena~combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg [1]), + .prn(vcc)); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[1] .is_wysiwyg = "true"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X47_Y23_N1 +dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[0] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[0]~0_combout ), + .asdata(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg [1]), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_proc~0_combout ), + .ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg_ena~combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg [0]), + .prn(vcc)); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[0] .is_wysiwyg = "true"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[0] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X46_Y24_N24 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~6 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~5_combout ), + .datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg~q ), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg [0]), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg [0]), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~6_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~6 .lut_mask = 16'hEAC0; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X46_Y24_N12 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~8 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg_ena~0_combout ), + .datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~4_combout ), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~7_combout ), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~6_combout ), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~8_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~8 .lut_mask = 16'h0A08; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~8 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X46_Y24_N16 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~11 ( + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~10_combout ), + .datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~12_combout ), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~2_combout ), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~8_combout ), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~11_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~11 .lut_mask = 16'hFFFE; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~11 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X46_Y24_N17 +dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo ( + .clk(!\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~11_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo~q ), + .prn(vcc)); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo .is_wysiwyg = "true"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo .power_up = "low"; +// synopsys translate_on + +// Location: CLKCTRL_G13 +fiftyfivenm_clkctrl \altera_internal_jtag~TCKUTAPclkctrl ( + .ena(vcc), + .inclk({vcc,vcc,vcc,\altera_internal_jtag~TCKUTAP }), + .clkselect(2'b00), + .devclrn(devclrn), + .devpor(devpor), + .outclk(\altera_internal_jtag~TCKUTAPclkctrl_outclk )); +// synopsys translate_off +defparam \altera_internal_jtag~TCKUTAPclkctrl .clock_type = "global clock"; +defparam \altera_internal_jtag~TCKUTAPclkctrl .ena_register_mode = "none"; +// synopsys translate_on + +// Location: LCCOMB_X45_Y24_N20 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~5 ( + .dataa(\altera_internal_jtag~TMSUTAP ), + .datab(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [4]), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [3]), + .datad(gnd), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~5_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~5 .lut_mask = 16'hA8A8; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X45_Y24_N21 +dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[5] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~5_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [5]), + .prn(vcc)); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[5] .is_wysiwyg = "true"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[5] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X46_Y17_N0 +fiftyfivenm_lcell_comb \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode236w[2] ( +// Equation(s): +// \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode236w [2] = +// (\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [5] & +// (!\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [14] & (\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [13] & \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_incr_addr~2_combout ))) + + .dataa(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [5]), + .datab(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [14]), + .datac(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg [13]), + .datad(\boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_incr_addr~2_combout ), + .cin(gnd), + .combout(\boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode236w [2]), + .cout()); +// synopsys translate_off +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode236w[2] .lut_mask = 16'h2000; +defparam \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode236w[2] .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X72_Y8_N24 +fiftyfivenm_lcell_comb \main_memory|altsyncram_component|auto_generated|mux2|result_node[0]~0 ( +// Equation(s): +// \main_memory|altsyncram_component|auto_generated|mux2|result_node[0]~0_combout = (\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [0] & ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [1]) # +// ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8~portadataout )))) # (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [0] & (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [1] & +// ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0~portadataout )))) + + .dataa(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [0]), + .datab(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [1]), + .datac(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8~portadataout ), + .datad(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0~portadataout ), + .cin(gnd), + .combout(\main_memory|altsyncram_component|auto_generated|mux2|result_node[0]~0_combout ), + .cout()); +// synopsys translate_off +defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[0]~0 .lut_mask = 16'hB9A8; +defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[0]~0 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X72_Y8_N10 fiftyfivenm_lcell_comb \main_memory|altsyncram_component|auto_generated|mux2|result_node[0]~1 ( // Equation(s): -// \main_memory|altsyncram_component|auto_generated|mux2|result_node[0]~1_combout = (\main_memory|altsyncram_component|auto_generated|address_reg_a [0] & ((\main_memory|altsyncram_component|auto_generated|mux2|result_node[0]~0_combout & -// ((\main_memory|altsyncram_component|auto_generated|ram_block1a24~portadataout ))) # (!\main_memory|altsyncram_component|auto_generated|mux2|result_node[0]~0_combout & (\main_memory|altsyncram_component|auto_generated|ram_block1a8~portadataout )))) # -// (!\main_memory|altsyncram_component|auto_generated|address_reg_a [0] & (((\main_memory|altsyncram_component|auto_generated|mux2|result_node[0]~0_combout )))) +// \main_memory|altsyncram_component|auto_generated|mux2|result_node[0]~1_combout = (\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [1] & ((\main_memory|altsyncram_component|auto_generated|mux2|result_node[0]~0_combout & +// (\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24~portadataout )) # (!\main_memory|altsyncram_component|auto_generated|mux2|result_node[0]~0_combout & +// ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16~portadataout ))))) # (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [1] & (\main_memory|altsyncram_component|auto_generated|mux2|result_node[0]~0_combout +// )) - .dataa(\main_memory|altsyncram_component|auto_generated|address_reg_a [0]), - .datab(\main_memory|altsyncram_component|auto_generated|ram_block1a8~portadataout ), - .datac(\main_memory|altsyncram_component|auto_generated|mux2|result_node[0]~0_combout ), - .datad(\main_memory|altsyncram_component|auto_generated|ram_block1a24~portadataout ), + .dataa(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [1]), + .datab(\main_memory|altsyncram_component|auto_generated|mux2|result_node[0]~0_combout ), + .datac(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24~portadataout ), + .datad(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16~portadataout ), .cin(gnd), .combout(\main_memory|altsyncram_component|auto_generated|mux2|result_node[0]~1_combout ), .cout()); // synopsys translate_off -defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[0]~1 .lut_mask = 16'hF858; +defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[0]~1 .lut_mask = 16'hE6C4; defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[0]~1 .sum_lutc_input = "datac"; // synopsys translate_on +// Location: LCCOMB_X72_Y8_N16 +fiftyfivenm_lcell_comb \main_memory|altsyncram_component|auto_generated|mux2|result_node[0]~4 ( +// Equation(s): +// \main_memory|altsyncram_component|auto_generated|mux2|result_node[0]~4_combout = (\cpu_addr[15]~input_o & ((\main_memory|altsyncram_component|auto_generated|mux2|result_node[0]~1_combout ))) # (!\cpu_addr[15]~input_o & +// (\main_memory|altsyncram_component|auto_generated|mux2|result_node[0]~3_combout )) + + .dataa(\main_memory|altsyncram_component|auto_generated|mux2|result_node[0]~3_combout ), + .datab(\cpu_addr[15]~input_o ), + .datac(gnd), + .datad(\main_memory|altsyncram_component|auto_generated|mux2|result_node[0]~1_combout ), + .cin(gnd), + .combout(\main_memory|altsyncram_component|auto_generated|mux2|result_node[0]~4_combout ), + .cout()); +// synopsys translate_off +defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[0]~4 .lut_mask = 16'hEE22; +defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[0]~4 .sum_lutc_input = "datac"; +// synopsys translate_on + // Location: IOIBUF_X46_Y0_N8 fiftyfivenm_io_ibuf \cpu_data[1]~input ( .i(cpu_data[1]), @@ -1209,57 +10045,7 @@ defparam \cpu_data[1]~input .listen_to_nsleep_signal = "false"; defparam \cpu_data[1]~input .simulate_z_as = "z"; // synopsys translate_on -// Location: M9K_X53_Y12_N0 -fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block1a25 ( - .portawe(\main_memory|altsyncram_component|auto_generated|decode3|w_anode252w[2]~0_combout ), - .portare(vcc), - .portaaddrstall(gnd), - .portbwe(gnd), - .portbre(vcc), - .portbaddrstall(gnd), - .clk0(\clk~inputclkctrl_outclk ), - .clk1(gnd), - .ena0(\main_memory|altsyncram_component|auto_generated|rden_decode|w_anode293w[2]~0_combout ), - .ena1(vcc), - .ena2(vcc), - .ena3(vcc), - .clr0(gnd), - .clr1(gnd), - .portadatain({\cpu_data[1]~input_o }), - .portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o , -\cpu_addr[0]~input_o }), - .portabyteenamasks(1'b1), - .portbdatain(1'b0), - .portbaddr(13'b0000000000000), - .portbbyteenamasks(1'b1), - .devclrn(devclrn), - .devpor(devpor), - .portadataout(\main_memory|altsyncram_component|auto_generated|ram_block1a25_PORTADATAOUT_bus ), - .portbdataout()); -// synopsys translate_off -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a25 .clk0_core_clock_enable = "ena0"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a25 .data_interleave_offset_in_bits = 1; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a25 .data_interleave_width_in_bits = 1; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a25 .logical_ram_name = "ram:main_memory|altsyncram:altsyncram_component|altsyncram_okf1:auto_generated|ALTSYNCRAM"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a25 .operation_mode = "single_port"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a25 .port_a_address_clear = "none"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a25 .port_a_address_width = 13; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a25 .port_a_byte_enable_clock = "none"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a25 .port_a_data_out_clear = "none"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a25 .port_a_data_out_clock = "none"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a25 .port_a_data_width = 1; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a25 .port_a_first_address = 0; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a25 .port_a_first_bit_number = 1; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a25 .port_a_last_address = 8191; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a25 .port_a_logical_ram_depth = 32768; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a25 .port_a_logical_ram_width = 8; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a25 .port_a_read_during_write_mode = "new_data_with_nbe_read"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a25 .port_b_address_width = 13; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a25 .port_b_data_width = 1; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a25 .ram_block_type = "M9K"; -// synopsys translate_on - -// Location: M9K_X53_Y8_N0 +// Location: M9K_X53_Y7_N0 fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block1a1 ( .portawe(\main_memory|altsyncram_component|auto_generated|decode3|w_anode223w [2]), .portare(vcc), @@ -1309,76 +10095,7 @@ defparam \main_memory|altsyncram_component|auto_generated|ram_block1a1 .port_b_d defparam \main_memory|altsyncram_component|auto_generated|ram_block1a1 .ram_block_type = "M9K"; // synopsys translate_on -// Location: M9K_X53_Y11_N0 -fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block1a9 ( - .portawe(\main_memory|altsyncram_component|auto_generated|decode3|w_anode236w[2]~0_combout ), - .portare(vcc), - .portaaddrstall(gnd), - .portbwe(gnd), - .portbre(vcc), - .portbaddrstall(gnd), - .clk0(\clk~inputclkctrl_outclk ), - .clk1(gnd), - .ena0(\main_memory|altsyncram_component|auto_generated|rden_decode|w_anode275w[2]~0_combout ), - .ena1(vcc), - .ena2(vcc), - .ena3(vcc), - .clr0(gnd), - .clr1(gnd), - .portadatain({\cpu_data[1]~input_o }), - .portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o , -\cpu_addr[0]~input_o }), - .portabyteenamasks(1'b1), - .portbdatain(1'b0), - .portbaddr(13'b0000000000000), - .portbbyteenamasks(1'b1), - .devclrn(devclrn), - .devpor(devpor), - .portadataout(\main_memory|altsyncram_component|auto_generated|ram_block1a9_PORTADATAOUT_bus ), - .portbdataout()); -// synopsys translate_off -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a9 .clk0_core_clock_enable = "ena0"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a9 .data_interleave_offset_in_bits = 1; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a9 .data_interleave_width_in_bits = 1; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a9 .logical_ram_name = "ram:main_memory|altsyncram:altsyncram_component|altsyncram_okf1:auto_generated|ALTSYNCRAM"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a9 .operation_mode = "single_port"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a9 .port_a_address_clear = "none"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a9 .port_a_address_width = 13; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a9 .port_a_byte_enable_clock = "none"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a9 .port_a_data_out_clear = "none"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a9 .port_a_data_out_clock = "none"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a9 .port_a_data_width = 1; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a9 .port_a_first_address = 0; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a9 .port_a_first_bit_number = 1; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a9 .port_a_last_address = 8191; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a9 .port_a_logical_ram_depth = 32768; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a9 .port_a_logical_ram_width = 8; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a9 .port_a_read_during_write_mode = "new_data_with_nbe_read"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a9 .port_b_address_width = 13; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a9 .port_b_data_width = 1; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a9 .ram_block_type = "M9K"; -// synopsys translate_on - -// Location: LCCOMB_X32_Y8_N30 -fiftyfivenm_lcell_comb \main_memory|altsyncram_component|auto_generated|mux2|result_node[1]~2 ( -// Equation(s): -// \main_memory|altsyncram_component|auto_generated|mux2|result_node[1]~2_combout = (\main_memory|altsyncram_component|auto_generated|address_reg_a [0] & (((\main_memory|altsyncram_component|auto_generated|ram_block1a9~portadataout ) # -// (\main_memory|altsyncram_component|auto_generated|address_reg_a [1])))) # (!\main_memory|altsyncram_component|auto_generated|address_reg_a [0] & (\main_memory|altsyncram_component|auto_generated|ram_block1a1~portadataout & -// ((!\main_memory|altsyncram_component|auto_generated|address_reg_a [1])))) - - .dataa(\main_memory|altsyncram_component|auto_generated|ram_block1a1~portadataout ), - .datab(\main_memory|altsyncram_component|auto_generated|address_reg_a [0]), - .datac(\main_memory|altsyncram_component|auto_generated|ram_block1a9~portadataout ), - .datad(\main_memory|altsyncram_component|auto_generated|address_reg_a [1]), - .cin(gnd), - .combout(\main_memory|altsyncram_component|auto_generated|mux2|result_node[1]~2_combout ), - .cout()); -// synopsys translate_off -defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[1]~2 .lut_mask = 16'hCCE2; -defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[1]~2 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: M9K_X53_Y3_N0 +// Location: M9K_X53_Y6_N0 fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block1a17 ( .portawe(\main_memory|altsyncram_component|auto_generated|decode3|w_anode244w[2]~0_combout ), .portare(vcc), @@ -1388,7 +10105,7 @@ fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block .portbaddrstall(gnd), .clk0(\clk~inputclkctrl_outclk ), .clk1(gnd), - .ena0(\main_memory|altsyncram_component|auto_generated|rden_decode|w_anode284w[2]~0_combout ), + .ena0(\main_memory|altsyncram_component|auto_generated|rden_decode|w_anode284w[2]~1_combout ), .ena1(vcc), .ena2(vcc), .ena3(vcc), @@ -1428,23 +10145,198 @@ defparam \main_memory|altsyncram_component|auto_generated|ram_block1a17 .port_b_ defparam \main_memory|altsyncram_component|auto_generated|ram_block1a17 .ram_block_type = "M9K"; // synopsys translate_on -// Location: LCCOMB_X32_Y8_N16 -fiftyfivenm_lcell_comb \main_memory|altsyncram_component|auto_generated|mux2|result_node[1]~3 ( +// Location: LCCOMB_X52_Y9_N12 +fiftyfivenm_lcell_comb \main_memory|altsyncram_component|auto_generated|mux2|result_node[1]~7 ( // Equation(s): -// \main_memory|altsyncram_component|auto_generated|mux2|result_node[1]~3_combout = (\main_memory|altsyncram_component|auto_generated|address_reg_a [1] & ((\main_memory|altsyncram_component|auto_generated|mux2|result_node[1]~2_combout & -// (\main_memory|altsyncram_component|auto_generated|ram_block1a25~portadataout )) # (!\main_memory|altsyncram_component|auto_generated|mux2|result_node[1]~2_combout & ((\main_memory|altsyncram_component|auto_generated|ram_block1a17~portadataout ))))) # -// (!\main_memory|altsyncram_component|auto_generated|address_reg_a [1] & (((\main_memory|altsyncram_component|auto_generated|mux2|result_node[1]~2_combout )))) +// \main_memory|altsyncram_component|auto_generated|mux2|result_node[1]~7_combout = (\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [1] & ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [0]) # +// ((\main_memory|altsyncram_component|auto_generated|ram_block1a17~portadataout )))) # (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [1] & (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [0] & +// (\main_memory|altsyncram_component|auto_generated|ram_block1a1~portadataout ))) - .dataa(\main_memory|altsyncram_component|auto_generated|ram_block1a25~portadataout ), - .datab(\main_memory|altsyncram_component|auto_generated|address_reg_a [1]), - .datac(\main_memory|altsyncram_component|auto_generated|mux2|result_node[1]~2_combout ), + .dataa(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [1]), + .datab(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [0]), + .datac(\main_memory|altsyncram_component|auto_generated|ram_block1a1~portadataout ), .datad(\main_memory|altsyncram_component|auto_generated|ram_block1a17~portadataout ), .cin(gnd), - .combout(\main_memory|altsyncram_component|auto_generated|mux2|result_node[1]~3_combout ), + .combout(\main_memory|altsyncram_component|auto_generated|mux2|result_node[1]~7_combout ), .cout()); // synopsys translate_off -defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[1]~3 .lut_mask = 16'hBCB0; -defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[1]~3 .sum_lutc_input = "datac"; +defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[1]~7 .lut_mask = 16'hBA98; +defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[1]~7 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: M9K_X53_Y25_N0 +fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block1a25 ( + .portawe(\main_memory|altsyncram_component|auto_generated|decode3|w_anode252w[2]~0_combout ), + .portare(vcc), + .portaaddrstall(gnd), + .portbwe(gnd), + .portbre(vcc), + .portbaddrstall(gnd), + .clk0(\clk~inputclkctrl_outclk ), + .clk1(gnd), + .ena0(\main_memory|altsyncram_component|auto_generated|rden_decode|w_anode284w[2]~2_combout ), + .ena1(vcc), + .ena2(vcc), + .ena3(vcc), + .clr0(gnd), + .clr1(gnd), + .portadatain({\cpu_data[1]~input_o }), + .portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o , +\cpu_addr[0]~input_o }), + .portabyteenamasks(1'b1), + .portbdatain(1'b0), + .portbaddr(13'b0000000000000), + .portbbyteenamasks(1'b1), + .devclrn(devclrn), + .devpor(devpor), + .portadataout(\main_memory|altsyncram_component|auto_generated|ram_block1a25_PORTADATAOUT_bus ), + .portbdataout()); +// synopsys translate_off +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a25 .clk0_core_clock_enable = "ena0"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a25 .data_interleave_offset_in_bits = 1; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a25 .data_interleave_width_in_bits = 1; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a25 .logical_ram_name = "ram:main_memory|altsyncram:altsyncram_component|altsyncram_okf1:auto_generated|ALTSYNCRAM"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a25 .operation_mode = "single_port"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a25 .port_a_address_clear = "none"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a25 .port_a_address_width = 13; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a25 .port_a_byte_enable_clock = "none"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a25 .port_a_data_out_clear = "none"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a25 .port_a_data_out_clock = "none"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a25 .port_a_data_width = 1; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a25 .port_a_first_address = 0; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a25 .port_a_first_bit_number = 1; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a25 .port_a_last_address = 8191; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a25 .port_a_logical_ram_depth = 32768; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a25 .port_a_logical_ram_width = 8; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a25 .port_a_read_during_write_mode = "new_data_with_nbe_read"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a25 .port_b_address_width = 13; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a25 .port_b_data_width = 1; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a25 .ram_block_type = "M9K"; +// synopsys translate_on + +// Location: M9K_X73_Y9_N0 +fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block1a9 ( + .portawe(\main_memory|altsyncram_component|auto_generated|decode3|w_anode236w[2]~0_combout ), + .portare(vcc), + .portaaddrstall(gnd), + .portbwe(gnd), + .portbre(vcc), + .portbaddrstall(gnd), + .clk0(\clk~inputclkctrl_outclk ), + .clk1(gnd), + .ena0(\main_memory|altsyncram_component|auto_generated|rden_decode|w_anode284w[2]~0_combout ), + .ena1(vcc), + .ena2(vcc), + .ena3(vcc), + .clr0(gnd), + .clr1(gnd), + .portadatain({\cpu_data[1]~input_o }), + .portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o , +\cpu_addr[0]~input_o }), + .portabyteenamasks(1'b1), + .portbdatain(1'b0), + .portbaddr(13'b0000000000000), + .portbbyteenamasks(1'b1), + .devclrn(devclrn), + .devpor(devpor), + .portadataout(\main_memory|altsyncram_component|auto_generated|ram_block1a9_PORTADATAOUT_bus ), + .portbdataout()); +// synopsys translate_off +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a9 .clk0_core_clock_enable = "ena0"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a9 .data_interleave_offset_in_bits = 1; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a9 .data_interleave_width_in_bits = 1; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a9 .logical_ram_name = "ram:main_memory|altsyncram:altsyncram_component|altsyncram_okf1:auto_generated|ALTSYNCRAM"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a9 .operation_mode = "single_port"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a9 .port_a_address_clear = "none"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a9 .port_a_address_width = 13; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a9 .port_a_byte_enable_clock = "none"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a9 .port_a_data_out_clear = "none"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a9 .port_a_data_out_clock = "none"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a9 .port_a_data_width = 1; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a9 .port_a_first_address = 0; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a9 .port_a_first_bit_number = 1; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a9 .port_a_last_address = 8191; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a9 .port_a_logical_ram_depth = 32768; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a9 .port_a_logical_ram_width = 8; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a9 .port_a_read_during_write_mode = "new_data_with_nbe_read"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a9 .port_b_address_width = 13; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a9 .port_b_data_width = 1; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a9 .ram_block_type = "M9K"; +// synopsys translate_on + +// Location: LCCOMB_X52_Y9_N6 +fiftyfivenm_lcell_comb \main_memory|altsyncram_component|auto_generated|mux2|result_node[1]~8 ( +// Equation(s): +// \main_memory|altsyncram_component|auto_generated|mux2|result_node[1]~8_combout = (\main_memory|altsyncram_component|auto_generated|mux2|result_node[1]~7_combout & (((\main_memory|altsyncram_component|auto_generated|ram_block1a25~portadataout )) # +// (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [0]))) # (!\main_memory|altsyncram_component|auto_generated|mux2|result_node[1]~7_combout & (\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [0] & +// ((\main_memory|altsyncram_component|auto_generated|ram_block1a9~portadataout )))) + + .dataa(\main_memory|altsyncram_component|auto_generated|mux2|result_node[1]~7_combout ), + .datab(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [0]), + .datac(\main_memory|altsyncram_component|auto_generated|ram_block1a25~portadataout ), + .datad(\main_memory|altsyncram_component|auto_generated|ram_block1a9~portadataout ), + .cin(gnd), + .combout(\main_memory|altsyncram_component|auto_generated|mux2|result_node[1]~8_combout ), + .cout()); +// synopsys translate_off +defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[1]~8 .lut_mask = 16'hE6A2; +defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[1]~8 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X52_Y9_N24 +fiftyfivenm_lcell_comb \main_memory|altsyncram_component|auto_generated|mux2|result_node[1]~5 ( +// Equation(s): +// \main_memory|altsyncram_component|auto_generated|mux2|result_node[1]~5_combout = (\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [0] & (((\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [1]) # +// (\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9~portadataout )))) # (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [0] & +// (\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1~portadataout & (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [1]))) + + .dataa(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1~portadataout ), + .datab(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [0]), + .datac(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [1]), + .datad(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9~portadataout ), + .cin(gnd), + .combout(\main_memory|altsyncram_component|auto_generated|mux2|result_node[1]~5_combout ), + .cout()); +// synopsys translate_off +defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[1]~5 .lut_mask = 16'hCEC2; +defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[1]~5 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X52_Y9_N10 +fiftyfivenm_lcell_comb \main_memory|altsyncram_component|auto_generated|mux2|result_node[1]~6 ( +// Equation(s): +// \main_memory|altsyncram_component|auto_generated|mux2|result_node[1]~6_combout = (\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [1] & ((\main_memory|altsyncram_component|auto_generated|mux2|result_node[1]~5_combout & +// ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25~portadataout ))) # (!\main_memory|altsyncram_component|auto_generated|mux2|result_node[1]~5_combout & +// (\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17~portadataout )))) # (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [1] & (\main_memory|altsyncram_component|auto_generated|mux2|result_node[1]~5_combout )) + + .dataa(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [1]), + .datab(\main_memory|altsyncram_component|auto_generated|mux2|result_node[1]~5_combout ), + .datac(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17~portadataout ), + .datad(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25~portadataout ), + .cin(gnd), + .combout(\main_memory|altsyncram_component|auto_generated|mux2|result_node[1]~6_combout ), + .cout()); +// synopsys translate_off +defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[1]~6 .lut_mask = 16'hEC64; +defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[1]~6 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X52_Y9_N8 +fiftyfivenm_lcell_comb \main_memory|altsyncram_component|auto_generated|mux2|result_node[1]~9 ( +// Equation(s): +// \main_memory|altsyncram_component|auto_generated|mux2|result_node[1]~9_combout = (\cpu_addr[15]~input_o & ((\main_memory|altsyncram_component|auto_generated|mux2|result_node[1]~6_combout ))) # (!\cpu_addr[15]~input_o & +// (\main_memory|altsyncram_component|auto_generated|mux2|result_node[1]~8_combout )) + + .dataa(\main_memory|altsyncram_component|auto_generated|mux2|result_node[1]~8_combout ), + .datab(gnd), + .datac(\cpu_addr[15]~input_o ), + .datad(\main_memory|altsyncram_component|auto_generated|mux2|result_node[1]~6_combout ), + .cin(gnd), + .combout(\main_memory|altsyncram_component|auto_generated|mux2|result_node[1]~9_combout ), + .cout()); +// synopsys translate_off +defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[1]~9 .lut_mask = 16'hFA0A; +defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[1]~9 .sum_lutc_input = "datac"; // synopsys translate_on // Location: IOIBUF_X40_Y0_N22 @@ -1459,7 +10351,107 @@ defparam \cpu_data[2]~input .listen_to_nsleep_signal = "false"; defparam \cpu_data[2]~input .simulate_z_as = "z"; // synopsys translate_on -// Location: M9K_X33_Y7_N0 +// Location: M9K_X53_Y2_N0 +fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block1a26 ( + .portawe(\main_memory|altsyncram_component|auto_generated|decode3|w_anode252w[2]~0_combout ), + .portare(vcc), + .portaaddrstall(gnd), + .portbwe(gnd), + .portbre(vcc), + .portbaddrstall(gnd), + .clk0(\clk~inputclkctrl_outclk ), + .clk1(gnd), + .ena0(\main_memory|altsyncram_component|auto_generated|rden_decode|w_anode284w[2]~2_combout ), + .ena1(vcc), + .ena2(vcc), + .ena3(vcc), + .clr0(gnd), + .clr1(gnd), + .portadatain({\cpu_data[2]~input_o }), + .portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o , +\cpu_addr[0]~input_o }), + .portabyteenamasks(1'b1), + .portbdatain(1'b0), + .portbaddr(13'b0000000000000), + .portbbyteenamasks(1'b1), + .devclrn(devclrn), + .devpor(devpor), + .portadataout(\main_memory|altsyncram_component|auto_generated|ram_block1a26_PORTADATAOUT_bus ), + .portbdataout()); +// synopsys translate_off +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a26 .clk0_core_clock_enable = "ena0"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a26 .data_interleave_offset_in_bits = 1; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a26 .data_interleave_width_in_bits = 1; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a26 .logical_ram_name = "ram:main_memory|altsyncram:altsyncram_component|altsyncram_okf1:auto_generated|ALTSYNCRAM"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a26 .operation_mode = "single_port"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a26 .port_a_address_clear = "none"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a26 .port_a_address_width = 13; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a26 .port_a_byte_enable_clock = "none"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a26 .port_a_data_out_clear = "none"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a26 .port_a_data_out_clock = "none"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a26 .port_a_data_width = 1; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a26 .port_a_first_address = 0; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a26 .port_a_first_bit_number = 2; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a26 .port_a_last_address = 8191; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a26 .port_a_logical_ram_depth = 32768; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a26 .port_a_logical_ram_width = 8; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a26 .port_a_read_during_write_mode = "new_data_with_nbe_read"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a26 .port_b_address_width = 13; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a26 .port_b_data_width = 1; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a26 .ram_block_type = "M9K"; +// synopsys translate_on + +// Location: M9K_X53_Y1_N0 +fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block1a10 ( + .portawe(\main_memory|altsyncram_component|auto_generated|decode3|w_anode236w[2]~0_combout ), + .portare(vcc), + .portaaddrstall(gnd), + .portbwe(gnd), + .portbre(vcc), + .portbaddrstall(gnd), + .clk0(\clk~inputclkctrl_outclk ), + .clk1(gnd), + .ena0(\main_memory|altsyncram_component|auto_generated|rden_decode|w_anode284w[2]~0_combout ), + .ena1(vcc), + .ena2(vcc), + .ena3(vcc), + .clr0(gnd), + .clr1(gnd), + .portadatain({\cpu_data[2]~input_o }), + .portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o , +\cpu_addr[0]~input_o }), + .portabyteenamasks(1'b1), + .portbdatain(1'b0), + .portbaddr(13'b0000000000000), + .portbbyteenamasks(1'b1), + .devclrn(devclrn), + .devpor(devpor), + .portadataout(\main_memory|altsyncram_component|auto_generated|ram_block1a10_PORTADATAOUT_bus ), + .portbdataout()); +// synopsys translate_off +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a10 .clk0_core_clock_enable = "ena0"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a10 .data_interleave_offset_in_bits = 1; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a10 .data_interleave_width_in_bits = 1; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a10 .logical_ram_name = "ram:main_memory|altsyncram:altsyncram_component|altsyncram_okf1:auto_generated|ALTSYNCRAM"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a10 .operation_mode = "single_port"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a10 .port_a_address_clear = "none"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a10 .port_a_address_width = 13; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a10 .port_a_byte_enable_clock = "none"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a10 .port_a_data_out_clear = "none"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a10 .port_a_data_out_clock = "none"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a10 .port_a_data_width = 1; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a10 .port_a_first_address = 0; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a10 .port_a_first_bit_number = 2; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a10 .port_a_last_address = 8191; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a10 .port_a_logical_ram_depth = 32768; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a10 .port_a_logical_ram_width = 8; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a10 .port_a_read_during_write_mode = "new_data_with_nbe_read"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a10 .port_b_address_width = 13; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a10 .port_b_data_width = 1; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a10 .ram_block_type = "M9K"; +// synopsys translate_on + +// Location: M9K_X53_Y4_N0 fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block1a18 ( .portawe(\main_memory|altsyncram_component|auto_generated|decode3|w_anode244w[2]~0_combout ), .portare(vcc), @@ -1469,7 +10461,7 @@ fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block .portbaddrstall(gnd), .clk0(\clk~inputclkctrl_outclk ), .clk1(gnd), - .ena0(\main_memory|altsyncram_component|auto_generated|rden_decode|w_anode284w[2]~0_combout ), + .ena0(\main_memory|altsyncram_component|auto_generated|rden_decode|w_anode284w[2]~1_combout ), .ena1(vcc), .ena2(vcc), .ena3(vcc), @@ -1509,7 +10501,7 @@ defparam \main_memory|altsyncram_component|auto_generated|ram_block1a18 .port_b_ defparam \main_memory|altsyncram_component|auto_generated|ram_block1a18 .ram_block_type = "M9K"; // synopsys translate_on -// Location: M9K_X33_Y9_N0 +// Location: M9K_X53_Y5_N0 fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block1a2 ( .portawe(\main_memory|altsyncram_component|auto_generated|decode3|w_anode223w [2]), .portare(vcc), @@ -1559,142 +10551,99 @@ defparam \main_memory|altsyncram_component|auto_generated|ram_block1a2 .port_b_d defparam \main_memory|altsyncram_component|auto_generated|ram_block1a2 .ram_block_type = "M9K"; // synopsys translate_on -// Location: LCCOMB_X32_Y8_N10 -fiftyfivenm_lcell_comb \main_memory|altsyncram_component|auto_generated|mux2|result_node[2]~4 ( +// Location: LCCOMB_X52_Y8_N12 +fiftyfivenm_lcell_comb \main_memory|altsyncram_component|auto_generated|mux2|result_node[2]~12 ( // Equation(s): -// \main_memory|altsyncram_component|auto_generated|mux2|result_node[2]~4_combout = (\main_memory|altsyncram_component|auto_generated|address_reg_a [0] & (((\main_memory|altsyncram_component|auto_generated|address_reg_a [1])))) # -// (!\main_memory|altsyncram_component|auto_generated|address_reg_a [0] & ((\main_memory|altsyncram_component|auto_generated|address_reg_a [1] & (\main_memory|altsyncram_component|auto_generated|ram_block1a18~portadataout )) # -// (!\main_memory|altsyncram_component|auto_generated|address_reg_a [1] & ((\main_memory|altsyncram_component|auto_generated|ram_block1a2~portadataout ))))) +// \main_memory|altsyncram_component|auto_generated|mux2|result_node[2]~12_combout = (\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [0] & (((\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [1])))) # +// (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [0] & ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [1] & (\main_memory|altsyncram_component|auto_generated|ram_block1a18~portadataout )) # +// (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [1] & ((\main_memory|altsyncram_component|auto_generated|ram_block1a2~portadataout ))))) - .dataa(\main_memory|altsyncram_component|auto_generated|ram_block1a18~portadataout ), - .datab(\main_memory|altsyncram_component|auto_generated|address_reg_a [0]), - .datac(\main_memory|altsyncram_component|auto_generated|ram_block1a2~portadataout ), - .datad(\main_memory|altsyncram_component|auto_generated|address_reg_a [1]), + .dataa(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [0]), + .datab(\main_memory|altsyncram_component|auto_generated|ram_block1a18~portadataout ), + .datac(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [1]), + .datad(\main_memory|altsyncram_component|auto_generated|ram_block1a2~portadataout ), .cin(gnd), - .combout(\main_memory|altsyncram_component|auto_generated|mux2|result_node[2]~4_combout ), + .combout(\main_memory|altsyncram_component|auto_generated|mux2|result_node[2]~12_combout ), .cout()); // synopsys translate_off -defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[2]~4 .lut_mask = 16'hEE30; -defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[2]~4 .sum_lutc_input = "datac"; +defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[2]~12 .lut_mask = 16'hE5E0; +defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[2]~12 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: M9K_X53_Y5_N0 -fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block1a26 ( - .portawe(\main_memory|altsyncram_component|auto_generated|decode3|w_anode252w[2]~0_combout ), - .portare(vcc), - .portaaddrstall(gnd), - .portbwe(gnd), - .portbre(vcc), - .portbaddrstall(gnd), - .clk0(\clk~inputclkctrl_outclk ), - .clk1(gnd), - .ena0(\main_memory|altsyncram_component|auto_generated|rden_decode|w_anode293w[2]~0_combout ), - .ena1(vcc), - .ena2(vcc), - .ena3(vcc), - .clr0(gnd), - .clr1(gnd), - .portadatain({\cpu_data[2]~input_o }), - .portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o , -\cpu_addr[0]~input_o }), - .portabyteenamasks(1'b1), - .portbdatain(1'b0), - .portbaddr(13'b0000000000000), - .portbbyteenamasks(1'b1), - .devclrn(devclrn), - .devpor(devpor), - .portadataout(\main_memory|altsyncram_component|auto_generated|ram_block1a26_PORTADATAOUT_bus ), - .portbdataout()); -// synopsys translate_off -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a26 .clk0_core_clock_enable = "ena0"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a26 .data_interleave_offset_in_bits = 1; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a26 .data_interleave_width_in_bits = 1; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a26 .logical_ram_name = "ram:main_memory|altsyncram:altsyncram_component|altsyncram_okf1:auto_generated|ALTSYNCRAM"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a26 .operation_mode = "single_port"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a26 .port_a_address_clear = "none"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a26 .port_a_address_width = 13; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a26 .port_a_byte_enable_clock = "none"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a26 .port_a_data_out_clear = "none"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a26 .port_a_data_out_clock = "none"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a26 .port_a_data_width = 1; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a26 .port_a_first_address = 0; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a26 .port_a_first_bit_number = 2; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a26 .port_a_last_address = 8191; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a26 .port_a_logical_ram_depth = 32768; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a26 .port_a_logical_ram_width = 8; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a26 .port_a_read_during_write_mode = "new_data_with_nbe_read"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a26 .port_b_address_width = 13; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a26 .port_b_data_width = 1; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a26 .ram_block_type = "M9K"; -// synopsys translate_on - -// Location: M9K_X53_Y9_N0 -fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block1a10 ( - .portawe(\main_memory|altsyncram_component|auto_generated|decode3|w_anode236w[2]~0_combout ), - .portare(vcc), - .portaaddrstall(gnd), - .portbwe(gnd), - .portbre(vcc), - .portbaddrstall(gnd), - .clk0(\clk~inputclkctrl_outclk ), - .clk1(gnd), - .ena0(\main_memory|altsyncram_component|auto_generated|rden_decode|w_anode275w[2]~0_combout ), - .ena1(vcc), - .ena2(vcc), - .ena3(vcc), - .clr0(gnd), - .clr1(gnd), - .portadatain({\cpu_data[2]~input_o }), - .portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o , -\cpu_addr[0]~input_o }), - .portabyteenamasks(1'b1), - .portbdatain(1'b0), - .portbaddr(13'b0000000000000), - .portbbyteenamasks(1'b1), - .devclrn(devclrn), - .devpor(devpor), - .portadataout(\main_memory|altsyncram_component|auto_generated|ram_block1a10_PORTADATAOUT_bus ), - .portbdataout()); -// synopsys translate_off -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a10 .clk0_core_clock_enable = "ena0"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a10 .data_interleave_offset_in_bits = 1; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a10 .data_interleave_width_in_bits = 1; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a10 .logical_ram_name = "ram:main_memory|altsyncram:altsyncram_component|altsyncram_okf1:auto_generated|ALTSYNCRAM"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a10 .operation_mode = "single_port"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a10 .port_a_address_clear = "none"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a10 .port_a_address_width = 13; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a10 .port_a_byte_enable_clock = "none"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a10 .port_a_data_out_clear = "none"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a10 .port_a_data_out_clock = "none"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a10 .port_a_data_width = 1; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a10 .port_a_first_address = 0; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a10 .port_a_first_bit_number = 2; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a10 .port_a_last_address = 8191; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a10 .port_a_logical_ram_depth = 32768; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a10 .port_a_logical_ram_width = 8; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a10 .port_a_read_during_write_mode = "new_data_with_nbe_read"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a10 .port_b_address_width = 13; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a10 .port_b_data_width = 1; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a10 .ram_block_type = "M9K"; -// synopsys translate_on - -// Location: LCCOMB_X41_Y8_N16 -fiftyfivenm_lcell_comb \main_memory|altsyncram_component|auto_generated|mux2|result_node[2]~5 ( +// Location: LCCOMB_X52_Y8_N6 +fiftyfivenm_lcell_comb \main_memory|altsyncram_component|auto_generated|mux2|result_node[2]~13 ( // Equation(s): -// \main_memory|altsyncram_component|auto_generated|mux2|result_node[2]~5_combout = (\main_memory|altsyncram_component|auto_generated|mux2|result_node[2]~4_combout & ((\main_memory|altsyncram_component|auto_generated|ram_block1a26~portadataout ) # -// ((!\main_memory|altsyncram_component|auto_generated|address_reg_a [0])))) # (!\main_memory|altsyncram_component|auto_generated|mux2|result_node[2]~4_combout & (((\main_memory|altsyncram_component|auto_generated|address_reg_a [0] & -// \main_memory|altsyncram_component|auto_generated|ram_block1a10~portadataout )))) +// \main_memory|altsyncram_component|auto_generated|mux2|result_node[2]~13_combout = (\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [0] & ((\main_memory|altsyncram_component|auto_generated|mux2|result_node[2]~12_combout & +// (\main_memory|altsyncram_component|auto_generated|ram_block1a26~portadataout )) # (!\main_memory|altsyncram_component|auto_generated|mux2|result_node[2]~12_combout & ((\main_memory|altsyncram_component|auto_generated|ram_block1a10~portadataout ))))) # +// (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [0] & (((\main_memory|altsyncram_component|auto_generated|mux2|result_node[2]~12_combout )))) - .dataa(\main_memory|altsyncram_component|auto_generated|mux2|result_node[2]~4_combout ), + .dataa(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [0]), .datab(\main_memory|altsyncram_component|auto_generated|ram_block1a26~portadataout ), - .datac(\main_memory|altsyncram_component|auto_generated|address_reg_a [0]), - .datad(\main_memory|altsyncram_component|auto_generated|ram_block1a10~portadataout ), + .datac(\main_memory|altsyncram_component|auto_generated|ram_block1a10~portadataout ), + .datad(\main_memory|altsyncram_component|auto_generated|mux2|result_node[2]~12_combout ), .cin(gnd), - .combout(\main_memory|altsyncram_component|auto_generated|mux2|result_node[2]~5_combout ), + .combout(\main_memory|altsyncram_component|auto_generated|mux2|result_node[2]~13_combout ), .cout()); // synopsys translate_off -defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[2]~5 .lut_mask = 16'hDA8A; -defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[2]~5 .sum_lutc_input = "datac"; +defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[2]~13 .lut_mask = 16'hDDA0; +defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[2]~13 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X52_Y8_N24 +fiftyfivenm_lcell_comb \main_memory|altsyncram_component|auto_generated|mux2|result_node[2]~10 ( +// Equation(s): +// \main_memory|altsyncram_component|auto_generated|mux2|result_node[2]~10_combout = (\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [0] & (((\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [1]) # +// (\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10~portadataout )))) # (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [0] & +// (\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2~portadataout & (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [1]))) + + .dataa(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [0]), + .datab(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2~portadataout ), + .datac(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [1]), + .datad(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10~portadataout ), + .cin(gnd), + .combout(\main_memory|altsyncram_component|auto_generated|mux2|result_node[2]~10_combout ), + .cout()); +// synopsys translate_off +defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[2]~10 .lut_mask = 16'hAEA4; +defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[2]~10 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X52_Y8_N10 +fiftyfivenm_lcell_comb \main_memory|altsyncram_component|auto_generated|mux2|result_node[2]~11 ( +// Equation(s): +// \main_memory|altsyncram_component|auto_generated|mux2|result_node[2]~11_combout = (\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [1] & ((\main_memory|altsyncram_component|auto_generated|mux2|result_node[2]~10_combout & +// ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26~portadataout ))) # (!\main_memory|altsyncram_component|auto_generated|mux2|result_node[2]~10_combout & +// (\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18~portadataout )))) # (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [1] & (\main_memory|altsyncram_component|auto_generated|mux2|result_node[2]~10_combout +// )) + + .dataa(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [1]), + .datab(\main_memory|altsyncram_component|auto_generated|mux2|result_node[2]~10_combout ), + .datac(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18~portadataout ), + .datad(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26~portadataout ), + .cin(gnd), + .combout(\main_memory|altsyncram_component|auto_generated|mux2|result_node[2]~11_combout ), + .cout()); +// synopsys translate_off +defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[2]~11 .lut_mask = 16'hEC64; +defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[2]~11 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X52_Y8_N8 +fiftyfivenm_lcell_comb \main_memory|altsyncram_component|auto_generated|mux2|result_node[2]~14 ( +// Equation(s): +// \main_memory|altsyncram_component|auto_generated|mux2|result_node[2]~14_combout = (\cpu_addr[15]~input_o & ((\main_memory|altsyncram_component|auto_generated|mux2|result_node[2]~11_combout ))) # (!\cpu_addr[15]~input_o & +// (\main_memory|altsyncram_component|auto_generated|mux2|result_node[2]~13_combout )) + + .dataa(\main_memory|altsyncram_component|auto_generated|mux2|result_node[2]~13_combout ), + .datab(gnd), + .datac(\cpu_addr[15]~input_o ), + .datad(\main_memory|altsyncram_component|auto_generated|mux2|result_node[2]~11_combout ), + .cin(gnd), + .combout(\main_memory|altsyncram_component|auto_generated|mux2|result_node[2]~14_combout ), + .cout()); +// synopsys translate_off +defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[2]~14 .lut_mask = 16'hFA0A; +defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[2]~14 .sum_lutc_input = "datac"; // synopsys translate_on // Location: IOIBUF_X38_Y0_N8 @@ -1709,7 +10658,7 @@ defparam \cpu_data[3]~input .listen_to_nsleep_signal = "false"; defparam \cpu_data[3]~input .simulate_z_as = "z"; // synopsys translate_on -// Location: M9K_X33_Y14_N0 +// Location: M9K_X53_Y13_N0 fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block1a3 ( .portawe(\main_memory|altsyncram_component|auto_generated|decode3|w_anode223w [2]), .portare(vcc), @@ -1759,76 +10708,7 @@ defparam \main_memory|altsyncram_component|auto_generated|ram_block1a3 .port_b_d defparam \main_memory|altsyncram_component|auto_generated|ram_block1a3 .ram_block_type = "M9K"; // synopsys translate_on -// Location: M9K_X53_Y10_N0 -fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block1a11 ( - .portawe(\main_memory|altsyncram_component|auto_generated|decode3|w_anode236w[2]~0_combout ), - .portare(vcc), - .portaaddrstall(gnd), - .portbwe(gnd), - .portbre(vcc), - .portbaddrstall(gnd), - .clk0(\clk~inputclkctrl_outclk ), - .clk1(gnd), - .ena0(\main_memory|altsyncram_component|auto_generated|rden_decode|w_anode275w[2]~0_combout ), - .ena1(vcc), - .ena2(vcc), - .ena3(vcc), - .clr0(gnd), - .clr1(gnd), - .portadatain({\cpu_data[3]~input_o }), - .portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o , -\cpu_addr[0]~input_o }), - .portabyteenamasks(1'b1), - .portbdatain(1'b0), - .portbaddr(13'b0000000000000), - .portbbyteenamasks(1'b1), - .devclrn(devclrn), - .devpor(devpor), - .portadataout(\main_memory|altsyncram_component|auto_generated|ram_block1a11_PORTADATAOUT_bus ), - .portbdataout()); -// synopsys translate_off -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a11 .clk0_core_clock_enable = "ena0"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a11 .data_interleave_offset_in_bits = 1; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a11 .data_interleave_width_in_bits = 1; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a11 .logical_ram_name = "ram:main_memory|altsyncram:altsyncram_component|altsyncram_okf1:auto_generated|ALTSYNCRAM"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a11 .operation_mode = "single_port"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a11 .port_a_address_clear = "none"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a11 .port_a_address_width = 13; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a11 .port_a_byte_enable_clock = "none"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a11 .port_a_data_out_clear = "none"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a11 .port_a_data_out_clock = "none"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a11 .port_a_data_width = 1; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a11 .port_a_first_address = 0; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a11 .port_a_first_bit_number = 3; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a11 .port_a_last_address = 8191; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a11 .port_a_logical_ram_depth = 32768; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a11 .port_a_logical_ram_width = 8; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a11 .port_a_read_during_write_mode = "new_data_with_nbe_read"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a11 .port_b_address_width = 13; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a11 .port_b_data_width = 1; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a11 .ram_block_type = "M9K"; -// synopsys translate_on - -// Location: LCCOMB_X32_Y8_N20 -fiftyfivenm_lcell_comb \main_memory|altsyncram_component|auto_generated|mux2|result_node[3]~6 ( -// Equation(s): -// \main_memory|altsyncram_component|auto_generated|mux2|result_node[3]~6_combout = (\main_memory|altsyncram_component|auto_generated|address_reg_a [0] & ((\main_memory|altsyncram_component|auto_generated|address_reg_a [1]) # -// ((\main_memory|altsyncram_component|auto_generated|ram_block1a11~portadataout )))) # (!\main_memory|altsyncram_component|auto_generated|address_reg_a [0] & (!\main_memory|altsyncram_component|auto_generated|address_reg_a [1] & -// (\main_memory|altsyncram_component|auto_generated|ram_block1a3~portadataout ))) - - .dataa(\main_memory|altsyncram_component|auto_generated|address_reg_a [0]), - .datab(\main_memory|altsyncram_component|auto_generated|address_reg_a [1]), - .datac(\main_memory|altsyncram_component|auto_generated|ram_block1a3~portadataout ), - .datad(\main_memory|altsyncram_component|auto_generated|ram_block1a11~portadataout ), - .cin(gnd), - .combout(\main_memory|altsyncram_component|auto_generated|mux2|result_node[3]~6_combout ), - .cout()); -// synopsys translate_off -defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[3]~6 .lut_mask = 16'hBA98; -defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[3]~6 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: M9K_X33_Y2_N0 +// Location: M9K_X53_Y14_N0 fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block1a19 ( .portawe(\main_memory|altsyncram_component|auto_generated|decode3|w_anode244w[2]~0_combout ), .portare(vcc), @@ -1838,7 +10718,7 @@ fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block .portbaddrstall(gnd), .clk0(\clk~inputclkctrl_outclk ), .clk1(gnd), - .ena0(\main_memory|altsyncram_component|auto_generated|rden_decode|w_anode284w[2]~0_combout ), + .ena0(\main_memory|altsyncram_component|auto_generated|rden_decode|w_anode284w[2]~1_combout ), .ena1(vcc), .ena2(vcc), .ena3(vcc), @@ -1878,7 +10758,76 @@ defparam \main_memory|altsyncram_component|auto_generated|ram_block1a19 .port_b_ defparam \main_memory|altsyncram_component|auto_generated|ram_block1a19 .ram_block_type = "M9K"; // synopsys translate_on -// Location: M9K_X53_Y14_N0 +// Location: LCCOMB_X52_Y14_N28 +fiftyfivenm_lcell_comb \main_memory|altsyncram_component|auto_generated|mux2|result_node[3]~17 ( +// Equation(s): +// \main_memory|altsyncram_component|auto_generated|mux2|result_node[3]~17_combout = (\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [0] & (\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [1])) # +// (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [0] & ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [1] & ((\main_memory|altsyncram_component|auto_generated|ram_block1a19~portadataout ))) # +// (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [1] & (\main_memory|altsyncram_component|auto_generated|ram_block1a3~portadataout )))) + + .dataa(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [0]), + .datab(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [1]), + .datac(\main_memory|altsyncram_component|auto_generated|ram_block1a3~portadataout ), + .datad(\main_memory|altsyncram_component|auto_generated|ram_block1a19~portadataout ), + .cin(gnd), + .combout(\main_memory|altsyncram_component|auto_generated|mux2|result_node[3]~17_combout ), + .cout()); +// synopsys translate_off +defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[3]~17 .lut_mask = 16'hDC98; +defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[3]~17 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: M9K_X73_Y14_N0 +fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block1a11 ( + .portawe(\main_memory|altsyncram_component|auto_generated|decode3|w_anode236w[2]~0_combout ), + .portare(vcc), + .portaaddrstall(gnd), + .portbwe(gnd), + .portbre(vcc), + .portbaddrstall(gnd), + .clk0(\clk~inputclkctrl_outclk ), + .clk1(gnd), + .ena0(\main_memory|altsyncram_component|auto_generated|rden_decode|w_anode284w[2]~0_combout ), + .ena1(vcc), + .ena2(vcc), + .ena3(vcc), + .clr0(gnd), + .clr1(gnd), + .portadatain({\cpu_data[3]~input_o }), + .portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o , +\cpu_addr[0]~input_o }), + .portabyteenamasks(1'b1), + .portbdatain(1'b0), + .portbaddr(13'b0000000000000), + .portbbyteenamasks(1'b1), + .devclrn(devclrn), + .devpor(devpor), + .portadataout(\main_memory|altsyncram_component|auto_generated|ram_block1a11_PORTADATAOUT_bus ), + .portbdataout()); +// synopsys translate_off +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a11 .clk0_core_clock_enable = "ena0"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a11 .data_interleave_offset_in_bits = 1; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a11 .data_interleave_width_in_bits = 1; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a11 .logical_ram_name = "ram:main_memory|altsyncram:altsyncram_component|altsyncram_okf1:auto_generated|ALTSYNCRAM"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a11 .operation_mode = "single_port"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a11 .port_a_address_clear = "none"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a11 .port_a_address_width = 13; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a11 .port_a_byte_enable_clock = "none"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a11 .port_a_data_out_clear = "none"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a11 .port_a_data_out_clock = "none"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a11 .port_a_data_width = 1; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a11 .port_a_first_address = 0; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a11 .port_a_first_bit_number = 3; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a11 .port_a_last_address = 8191; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a11 .port_a_logical_ram_depth = 32768; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a11 .port_a_logical_ram_width = 8; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a11 .port_a_read_during_write_mode = "new_data_with_nbe_read"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a11 .port_b_address_width = 13; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a11 .port_b_data_width = 1; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a11 .ram_block_type = "M9K"; +// synopsys translate_on + +// Location: M9K_X53_Y11_N0 fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block1a27 ( .portawe(\main_memory|altsyncram_component|auto_generated|decode3|w_anode252w[2]~0_combout ), .portare(vcc), @@ -1888,7 +10837,7 @@ fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block .portbaddrstall(gnd), .clk0(\clk~inputclkctrl_outclk ), .clk1(gnd), - .ena0(\main_memory|altsyncram_component|auto_generated|rden_decode|w_anode293w[2]~0_combout ), + .ena0(\main_memory|altsyncram_component|auto_generated|rden_decode|w_anode284w[2]~2_combout ), .ena1(vcc), .ena2(vcc), .ena3(vcc), @@ -1928,23 +10877,80 @@ defparam \main_memory|altsyncram_component|auto_generated|ram_block1a27 .port_b_ defparam \main_memory|altsyncram_component|auto_generated|ram_block1a27 .ram_block_type = "M9K"; // synopsys translate_on -// Location: LCCOMB_X32_Y8_N6 -fiftyfivenm_lcell_comb \main_memory|altsyncram_component|auto_generated|mux2|result_node[3]~7 ( +// Location: LCCOMB_X52_Y14_N6 +fiftyfivenm_lcell_comb \main_memory|altsyncram_component|auto_generated|mux2|result_node[3]~18 ( // Equation(s): -// \main_memory|altsyncram_component|auto_generated|mux2|result_node[3]~7_combout = (\main_memory|altsyncram_component|auto_generated|address_reg_a [1] & ((\main_memory|altsyncram_component|auto_generated|mux2|result_node[3]~6_combout & -// ((\main_memory|altsyncram_component|auto_generated|ram_block1a27~portadataout ))) # (!\main_memory|altsyncram_component|auto_generated|mux2|result_node[3]~6_combout & (\main_memory|altsyncram_component|auto_generated|ram_block1a19~portadataout )))) # -// (!\main_memory|altsyncram_component|auto_generated|address_reg_a [1] & (\main_memory|altsyncram_component|auto_generated|mux2|result_node[3]~6_combout )) +// \main_memory|altsyncram_component|auto_generated|mux2|result_node[3]~18_combout = (\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [0] & ((\main_memory|altsyncram_component|auto_generated|mux2|result_node[3]~17_combout & +// ((\main_memory|altsyncram_component|auto_generated|ram_block1a27~portadataout ))) # (!\main_memory|altsyncram_component|auto_generated|mux2|result_node[3]~17_combout & (\main_memory|altsyncram_component|auto_generated|ram_block1a11~portadataout )))) # +// (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [0] & (\main_memory|altsyncram_component|auto_generated|mux2|result_node[3]~17_combout )) - .dataa(\main_memory|altsyncram_component|auto_generated|address_reg_a [1]), - .datab(\main_memory|altsyncram_component|auto_generated|mux2|result_node[3]~6_combout ), - .datac(\main_memory|altsyncram_component|auto_generated|ram_block1a19~portadataout ), + .dataa(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [0]), + .datab(\main_memory|altsyncram_component|auto_generated|mux2|result_node[3]~17_combout ), + .datac(\main_memory|altsyncram_component|auto_generated|ram_block1a11~portadataout ), .datad(\main_memory|altsyncram_component|auto_generated|ram_block1a27~portadataout ), .cin(gnd), - .combout(\main_memory|altsyncram_component|auto_generated|mux2|result_node[3]~7_combout ), + .combout(\main_memory|altsyncram_component|auto_generated|mux2|result_node[3]~18_combout ), .cout()); // synopsys translate_off -defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[3]~7 .lut_mask = 16'hEC64; -defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[3]~7 .sum_lutc_input = "datac"; +defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[3]~18 .lut_mask = 16'hEC64; +defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[3]~18 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X52_Y14_N24 +fiftyfivenm_lcell_comb \main_memory|altsyncram_component|auto_generated|mux2|result_node[3]~15 ( +// Equation(s): +// \main_memory|altsyncram_component|auto_generated|mux2|result_node[3]~15_combout = (\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [0] & (((\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [1]) # +// (\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11~portadataout )))) # (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [0] & +// (\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3~portadataout & (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [1]))) + + .dataa(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [0]), + .datab(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3~portadataout ), + .datac(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [1]), + .datad(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11~portadataout ), + .cin(gnd), + .combout(\main_memory|altsyncram_component|auto_generated|mux2|result_node[3]~15_combout ), + .cout()); +// synopsys translate_off +defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[3]~15 .lut_mask = 16'hAEA4; +defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[3]~15 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X52_Y14_N10 +fiftyfivenm_lcell_comb \main_memory|altsyncram_component|auto_generated|mux2|result_node[3]~16 ( +// Equation(s): +// \main_memory|altsyncram_component|auto_generated|mux2|result_node[3]~16_combout = (\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [1] & ((\main_memory|altsyncram_component|auto_generated|mux2|result_node[3]~15_combout & +// ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27~portadataout ))) # (!\main_memory|altsyncram_component|auto_generated|mux2|result_node[3]~15_combout & +// (\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19~portadataout )))) # (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [1] & (((\main_memory|altsyncram_component|auto_generated|mux2|result_node[3]~15_combout +// )))) + + .dataa(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19~portadataout ), + .datab(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [1]), + .datac(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27~portadataout ), + .datad(\main_memory|altsyncram_component|auto_generated|mux2|result_node[3]~15_combout ), + .cin(gnd), + .combout(\main_memory|altsyncram_component|auto_generated|mux2|result_node[3]~16_combout ), + .cout()); +// synopsys translate_off +defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[3]~16 .lut_mask = 16'hF388; +defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[3]~16 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X52_Y14_N0 +fiftyfivenm_lcell_comb \main_memory|altsyncram_component|auto_generated|mux2|result_node[3]~19 ( +// Equation(s): +// \main_memory|altsyncram_component|auto_generated|mux2|result_node[3]~19_combout = (\cpu_addr[15]~input_o & ((\main_memory|altsyncram_component|auto_generated|mux2|result_node[3]~16_combout ))) # (!\cpu_addr[15]~input_o & +// (\main_memory|altsyncram_component|auto_generated|mux2|result_node[3]~18_combout )) + + .dataa(\main_memory|altsyncram_component|auto_generated|mux2|result_node[3]~18_combout ), + .datab(gnd), + .datac(\cpu_addr[15]~input_o ), + .datad(\main_memory|altsyncram_component|auto_generated|mux2|result_node[3]~16_combout ), + .cin(gnd), + .combout(\main_memory|altsyncram_component|auto_generated|mux2|result_node[3]~19_combout ), + .cout()); +// synopsys translate_off +defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[3]~19 .lut_mask = 16'hFA0A; +defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[3]~19 .sum_lutc_input = "datac"; // synopsys translate_on // Location: IOIBUF_X38_Y0_N15 @@ -1959,57 +10965,7 @@ defparam \cpu_data[4]~input .listen_to_nsleep_signal = "false"; defparam \cpu_data[4]~input .simulate_z_as = "z"; // synopsys translate_on -// Location: M9K_X53_Y16_N0 -fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block1a12 ( - .portawe(\main_memory|altsyncram_component|auto_generated|decode3|w_anode236w[2]~0_combout ), - .portare(vcc), - .portaaddrstall(gnd), - .portbwe(gnd), - .portbre(vcc), - .portbaddrstall(gnd), - .clk0(\clk~inputclkctrl_outclk ), - .clk1(gnd), - .ena0(\main_memory|altsyncram_component|auto_generated|rden_decode|w_anode275w[2]~0_combout ), - .ena1(vcc), - .ena2(vcc), - .ena3(vcc), - .clr0(gnd), - .clr1(gnd), - .portadatain({\cpu_data[4]~input_o }), - .portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o , -\cpu_addr[0]~input_o }), - .portabyteenamasks(1'b1), - .portbdatain(1'b0), - .portbaddr(13'b0000000000000), - .portbbyteenamasks(1'b1), - .devclrn(devclrn), - .devpor(devpor), - .portadataout(\main_memory|altsyncram_component|auto_generated|ram_block1a12_PORTADATAOUT_bus ), - .portbdataout()); -// synopsys translate_off -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a12 .clk0_core_clock_enable = "ena0"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a12 .data_interleave_offset_in_bits = 1; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a12 .data_interleave_width_in_bits = 1; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a12 .logical_ram_name = "ram:main_memory|altsyncram:altsyncram_component|altsyncram_okf1:auto_generated|ALTSYNCRAM"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a12 .operation_mode = "single_port"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a12 .port_a_address_clear = "none"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a12 .port_a_address_width = 13; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a12 .port_a_byte_enable_clock = "none"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a12 .port_a_data_out_clear = "none"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a12 .port_a_data_out_clock = "none"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a12 .port_a_data_width = 1; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a12 .port_a_first_address = 0; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a12 .port_a_first_bit_number = 4; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a12 .port_a_last_address = 8191; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a12 .port_a_logical_ram_depth = 32768; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a12 .port_a_logical_ram_width = 8; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a12 .port_a_read_during_write_mode = "new_data_with_nbe_read"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a12 .port_b_address_width = 13; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a12 .port_b_data_width = 1; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a12 .ram_block_type = "M9K"; -// synopsys translate_on - -// Location: M9K_X53_Y15_N0 +// Location: M9K_X33_Y14_N0 fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block1a28 ( .portawe(\main_memory|altsyncram_component|auto_generated|decode3|w_anode252w[2]~0_combout ), .portare(vcc), @@ -2019,7 +10975,7 @@ fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block .portbaddrstall(gnd), .clk0(\clk~inputclkctrl_outclk ), .clk1(gnd), - .ena0(\main_memory|altsyncram_component|auto_generated|rden_decode|w_anode293w[2]~0_combout ), + .ena0(\main_memory|altsyncram_component|auto_generated|rden_decode|w_anode284w[2]~2_combout ), .ena1(vcc), .ena2(vcc), .ena3(vcc), @@ -2059,7 +11015,57 @@ defparam \main_memory|altsyncram_component|auto_generated|ram_block1a28 .port_b_ defparam \main_memory|altsyncram_component|auto_generated|ram_block1a28 .ram_block_type = "M9K"; // synopsys translate_on -// Location: M9K_X53_Y13_N0 +// Location: M9K_X33_Y10_N0 +fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block1a12 ( + .portawe(\main_memory|altsyncram_component|auto_generated|decode3|w_anode236w[2]~0_combout ), + .portare(vcc), + .portaaddrstall(gnd), + .portbwe(gnd), + .portbre(vcc), + .portbaddrstall(gnd), + .clk0(\clk~inputclkctrl_outclk ), + .clk1(gnd), + .ena0(\main_memory|altsyncram_component|auto_generated|rden_decode|w_anode284w[2]~0_combout ), + .ena1(vcc), + .ena2(vcc), + .ena3(vcc), + .clr0(gnd), + .clr1(gnd), + .portadatain({\cpu_data[4]~input_o }), + .portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o , +\cpu_addr[0]~input_o }), + .portabyteenamasks(1'b1), + .portbdatain(1'b0), + .portbaddr(13'b0000000000000), + .portbbyteenamasks(1'b1), + .devclrn(devclrn), + .devpor(devpor), + .portadataout(\main_memory|altsyncram_component|auto_generated|ram_block1a12_PORTADATAOUT_bus ), + .portbdataout()); +// synopsys translate_off +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a12 .clk0_core_clock_enable = "ena0"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a12 .data_interleave_offset_in_bits = 1; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a12 .data_interleave_width_in_bits = 1; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a12 .logical_ram_name = "ram:main_memory|altsyncram:altsyncram_component|altsyncram_okf1:auto_generated|ALTSYNCRAM"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a12 .operation_mode = "single_port"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a12 .port_a_address_clear = "none"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a12 .port_a_address_width = 13; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a12 .port_a_byte_enable_clock = "none"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a12 .port_a_data_out_clear = "none"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a12 .port_a_data_out_clock = "none"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a12 .port_a_data_width = 1; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a12 .port_a_first_address = 0; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a12 .port_a_first_bit_number = 4; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a12 .port_a_last_address = 8191; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a12 .port_a_logical_ram_depth = 32768; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a12 .port_a_logical_ram_width = 8; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a12 .port_a_read_during_write_mode = "new_data_with_nbe_read"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a12 .port_b_address_width = 13; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a12 .port_b_data_width = 1; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a12 .ram_block_type = "M9K"; +// synopsys translate_on + +// Location: M9K_X33_Y11_N0 fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block1a4 ( .portawe(\main_memory|altsyncram_component|auto_generated|decode3|w_anode223w [2]), .portare(vcc), @@ -2109,7 +11115,7 @@ defparam \main_memory|altsyncram_component|auto_generated|ram_block1a4 .port_b_d defparam \main_memory|altsyncram_component|auto_generated|ram_block1a4 .ram_block_type = "M9K"; // synopsys translate_on -// Location: M9K_X53_Y6_N0 +// Location: M9K_X33_Y12_N0 fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block1a20 ( .portawe(\main_memory|altsyncram_component|auto_generated|decode3|w_anode244w[2]~0_combout ), .portare(vcc), @@ -2119,7 +11125,7 @@ fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block .portbaddrstall(gnd), .clk0(\clk~inputclkctrl_outclk ), .clk1(gnd), - .ena0(\main_memory|altsyncram_component|auto_generated|rden_decode|w_anode284w[2]~0_combout ), + .ena0(\main_memory|altsyncram_component|auto_generated|rden_decode|w_anode284w[2]~1_combout ), .ena1(vcc), .ena2(vcc), .ena3(vcc), @@ -2159,42 +11165,99 @@ defparam \main_memory|altsyncram_component|auto_generated|ram_block1a20 .port_b_ defparam \main_memory|altsyncram_component|auto_generated|ram_block1a20 .ram_block_type = "M9K"; // synopsys translate_on -// Location: LCCOMB_X32_Y8_N24 -fiftyfivenm_lcell_comb \main_memory|altsyncram_component|auto_generated|mux2|result_node[4]~8 ( +// Location: LCCOMB_X34_Y14_N12 +fiftyfivenm_lcell_comb \main_memory|altsyncram_component|auto_generated|mux2|result_node[4]~22 ( // Equation(s): -// \main_memory|altsyncram_component|auto_generated|mux2|result_node[4]~8_combout = (\main_memory|altsyncram_component|auto_generated|address_reg_a [1] & ((\main_memory|altsyncram_component|auto_generated|address_reg_a [0]) # -// ((\main_memory|altsyncram_component|auto_generated|ram_block1a20~portadataout )))) # (!\main_memory|altsyncram_component|auto_generated|address_reg_a [1] & (!\main_memory|altsyncram_component|auto_generated|address_reg_a [0] & +// \main_memory|altsyncram_component|auto_generated|mux2|result_node[4]~22_combout = (\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [1] & ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [0]) # +// ((\main_memory|altsyncram_component|auto_generated|ram_block1a20~portadataout )))) # (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [1] & (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [0] & // (\main_memory|altsyncram_component|auto_generated|ram_block1a4~portadataout ))) - .dataa(\main_memory|altsyncram_component|auto_generated|address_reg_a [1]), - .datab(\main_memory|altsyncram_component|auto_generated|address_reg_a [0]), + .dataa(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [1]), + .datab(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [0]), .datac(\main_memory|altsyncram_component|auto_generated|ram_block1a4~portadataout ), .datad(\main_memory|altsyncram_component|auto_generated|ram_block1a20~portadataout ), .cin(gnd), - .combout(\main_memory|altsyncram_component|auto_generated|mux2|result_node[4]~8_combout ), + .combout(\main_memory|altsyncram_component|auto_generated|mux2|result_node[4]~22_combout ), .cout()); // synopsys translate_off -defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[4]~8 .lut_mask = 16'hBA98; -defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[4]~8 .sum_lutc_input = "datac"; +defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[4]~22 .lut_mask = 16'hBA98; +defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[4]~22 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X32_Y8_N2 -fiftyfivenm_lcell_comb \main_memory|altsyncram_component|auto_generated|mux2|result_node[4]~9 ( +// Location: LCCOMB_X34_Y14_N6 +fiftyfivenm_lcell_comb \main_memory|altsyncram_component|auto_generated|mux2|result_node[4]~23 ( // Equation(s): -// \main_memory|altsyncram_component|auto_generated|mux2|result_node[4]~9_combout = (\main_memory|altsyncram_component|auto_generated|address_reg_a [0] & ((\main_memory|altsyncram_component|auto_generated|mux2|result_node[4]~8_combout & -// ((\main_memory|altsyncram_component|auto_generated|ram_block1a28~portadataout ))) # (!\main_memory|altsyncram_component|auto_generated|mux2|result_node[4]~8_combout & (\main_memory|altsyncram_component|auto_generated|ram_block1a12~portadataout )))) # -// (!\main_memory|altsyncram_component|auto_generated|address_reg_a [0] & (((\main_memory|altsyncram_component|auto_generated|mux2|result_node[4]~8_combout )))) +// \main_memory|altsyncram_component|auto_generated|mux2|result_node[4]~23_combout = (\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [0] & ((\main_memory|altsyncram_component|auto_generated|mux2|result_node[4]~22_combout & +// (\main_memory|altsyncram_component|auto_generated|ram_block1a28~portadataout )) # (!\main_memory|altsyncram_component|auto_generated|mux2|result_node[4]~22_combout & ((\main_memory|altsyncram_component|auto_generated|ram_block1a12~portadataout ))))) # +// (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [0] & (((\main_memory|altsyncram_component|auto_generated|mux2|result_node[4]~22_combout )))) - .dataa(\main_memory|altsyncram_component|auto_generated|ram_block1a12~portadataout ), - .datab(\main_memory|altsyncram_component|auto_generated|address_reg_a [0]), - .datac(\main_memory|altsyncram_component|auto_generated|ram_block1a28~portadataout ), - .datad(\main_memory|altsyncram_component|auto_generated|mux2|result_node[4]~8_combout ), + .dataa(\main_memory|altsyncram_component|auto_generated|ram_block1a28~portadataout ), + .datab(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [0]), + .datac(\main_memory|altsyncram_component|auto_generated|ram_block1a12~portadataout ), + .datad(\main_memory|altsyncram_component|auto_generated|mux2|result_node[4]~22_combout ), .cin(gnd), - .combout(\main_memory|altsyncram_component|auto_generated|mux2|result_node[4]~9_combout ), + .combout(\main_memory|altsyncram_component|auto_generated|mux2|result_node[4]~23_combout ), .cout()); // synopsys translate_off -defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[4]~9 .lut_mask = 16'hF388; -defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[4]~9 .sum_lutc_input = "datac"; +defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[4]~23 .lut_mask = 16'hBBC0; +defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[4]~23 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X34_Y14_N24 +fiftyfivenm_lcell_comb \main_memory|altsyncram_component|auto_generated|mux2|result_node[4]~20 ( +// Equation(s): +// \main_memory|altsyncram_component|auto_generated|mux2|result_node[4]~20_combout = (\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [1] & (((\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [0])))) # +// (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [1] & ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [0] & (\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12~portadataout )) # +// (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [0] & ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4~portadataout ))))) + + .dataa(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12~portadataout ), + .datab(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [1]), + .datac(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [0]), + .datad(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4~portadataout ), + .cin(gnd), + .combout(\main_memory|altsyncram_component|auto_generated|mux2|result_node[4]~20_combout ), + .cout()); +// synopsys translate_off +defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[4]~20 .lut_mask = 16'hE3E0; +defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[4]~20 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X34_Y14_N10 +fiftyfivenm_lcell_comb \main_memory|altsyncram_component|auto_generated|mux2|result_node[4]~21 ( +// Equation(s): +// \main_memory|altsyncram_component|auto_generated|mux2|result_node[4]~21_combout = (\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [1] & ((\main_memory|altsyncram_component|auto_generated|mux2|result_node[4]~20_combout & +// ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28~portadataout ))) # (!\main_memory|altsyncram_component|auto_generated|mux2|result_node[4]~20_combout & +// (\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20~portadataout )))) # (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [1] & (((\main_memory|altsyncram_component|auto_generated|mux2|result_node[4]~20_combout +// )))) + + .dataa(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20~portadataout ), + .datab(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [1]), + .datac(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28~portadataout ), + .datad(\main_memory|altsyncram_component|auto_generated|mux2|result_node[4]~20_combout ), + .cin(gnd), + .combout(\main_memory|altsyncram_component|auto_generated|mux2|result_node[4]~21_combout ), + .cout()); +// synopsys translate_off +defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[4]~21 .lut_mask = 16'hF388; +defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[4]~21 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X34_Y14_N16 +fiftyfivenm_lcell_comb \main_memory|altsyncram_component|auto_generated|mux2|result_node[4]~24 ( +// Equation(s): +// \main_memory|altsyncram_component|auto_generated|mux2|result_node[4]~24_combout = (\cpu_addr[15]~input_o & ((\main_memory|altsyncram_component|auto_generated|mux2|result_node[4]~21_combout ))) # (!\cpu_addr[15]~input_o & +// (\main_memory|altsyncram_component|auto_generated|mux2|result_node[4]~23_combout )) + + .dataa(\main_memory|altsyncram_component|auto_generated|mux2|result_node[4]~23_combout ), + .datab(\cpu_addr[15]~input_o ), + .datac(gnd), + .datad(\main_memory|altsyncram_component|auto_generated|mux2|result_node[4]~21_combout ), + .cin(gnd), + .combout(\main_memory|altsyncram_component|auto_generated|mux2|result_node[4]~24_combout ), + .cout()); +// synopsys translate_off +defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[4]~24 .lut_mask = 16'hEE22; +defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[4]~24 .sum_lutc_input = "datac"; // synopsys translate_on // Location: IOIBUF_X34_Y0_N22 @@ -2209,7 +11272,7 @@ defparam \cpu_data[5]~input .listen_to_nsleep_signal = "false"; defparam \cpu_data[5]~input .simulate_z_as = "z"; // synopsys translate_on -// Location: M9K_X33_Y11_N0 +// Location: M9K_X33_Y13_N0 fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block1a5 ( .portawe(\main_memory|altsyncram_component|auto_generated|decode3|w_anode223w [2]), .portare(vcc), @@ -2259,126 +11322,7 @@ defparam \main_memory|altsyncram_component|auto_generated|ram_block1a5 .port_b_d defparam \main_memory|altsyncram_component|auto_generated|ram_block1a5 .ram_block_type = "M9K"; // synopsys translate_on -// Location: M9K_X33_Y8_N0 -fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block1a13 ( - .portawe(\main_memory|altsyncram_component|auto_generated|decode3|w_anode236w[2]~0_combout ), - .portare(vcc), - .portaaddrstall(gnd), - .portbwe(gnd), - .portbre(vcc), - .portbaddrstall(gnd), - .clk0(\clk~inputclkctrl_outclk ), - .clk1(gnd), - .ena0(\main_memory|altsyncram_component|auto_generated|rden_decode|w_anode275w[2]~0_combout ), - .ena1(vcc), - .ena2(vcc), - .ena3(vcc), - .clr0(gnd), - .clr1(gnd), - .portadatain({\cpu_data[5]~input_o }), - .portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o , -\cpu_addr[0]~input_o }), - .portabyteenamasks(1'b1), - .portbdatain(1'b0), - .portbaddr(13'b0000000000000), - .portbbyteenamasks(1'b1), - .devclrn(devclrn), - .devpor(devpor), - .portadataout(\main_memory|altsyncram_component|auto_generated|ram_block1a13_PORTADATAOUT_bus ), - .portbdataout()); -// synopsys translate_off -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a13 .clk0_core_clock_enable = "ena0"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a13 .data_interleave_offset_in_bits = 1; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a13 .data_interleave_width_in_bits = 1; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a13 .logical_ram_name = "ram:main_memory|altsyncram:altsyncram_component|altsyncram_okf1:auto_generated|ALTSYNCRAM"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a13 .operation_mode = "single_port"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a13 .port_a_address_clear = "none"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a13 .port_a_address_width = 13; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a13 .port_a_byte_enable_clock = "none"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a13 .port_a_data_out_clear = "none"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a13 .port_a_data_out_clock = "none"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a13 .port_a_data_width = 1; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a13 .port_a_first_address = 0; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a13 .port_a_first_bit_number = 5; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a13 .port_a_last_address = 8191; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a13 .port_a_logical_ram_depth = 32768; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a13 .port_a_logical_ram_width = 8; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a13 .port_a_read_during_write_mode = "new_data_with_nbe_read"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a13 .port_b_address_width = 13; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a13 .port_b_data_width = 1; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a13 .ram_block_type = "M9K"; -// synopsys translate_on - -// Location: LCCOMB_X32_Y8_N12 -fiftyfivenm_lcell_comb \main_memory|altsyncram_component|auto_generated|mux2|result_node[5]~10 ( -// Equation(s): -// \main_memory|altsyncram_component|auto_generated|mux2|result_node[5]~10_combout = (\main_memory|altsyncram_component|auto_generated|address_reg_a [1] & (((\main_memory|altsyncram_component|auto_generated|address_reg_a [0])))) # -// (!\main_memory|altsyncram_component|auto_generated|address_reg_a [1] & ((\main_memory|altsyncram_component|auto_generated|address_reg_a [0] & ((\main_memory|altsyncram_component|auto_generated|ram_block1a13~portadataout ))) # -// (!\main_memory|altsyncram_component|auto_generated|address_reg_a [0] & (\main_memory|altsyncram_component|auto_generated|ram_block1a5~portadataout )))) - - .dataa(\main_memory|altsyncram_component|auto_generated|ram_block1a5~portadataout ), - .datab(\main_memory|altsyncram_component|auto_generated|address_reg_a [1]), - .datac(\main_memory|altsyncram_component|auto_generated|ram_block1a13~portadataout ), - .datad(\main_memory|altsyncram_component|auto_generated|address_reg_a [0]), - .cin(gnd), - .combout(\main_memory|altsyncram_component|auto_generated|mux2|result_node[5]~10_combout ), - .cout()); -// synopsys translate_off -defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[5]~10 .lut_mask = 16'hFC22; -defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[5]~10 .sum_lutc_input = "datac"; -// synopsys translate_on - -// Location: M9K_X33_Y5_N0 -fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block1a29 ( - .portawe(\main_memory|altsyncram_component|auto_generated|decode3|w_anode252w[2]~0_combout ), - .portare(vcc), - .portaaddrstall(gnd), - .portbwe(gnd), - .portbre(vcc), - .portbaddrstall(gnd), - .clk0(\clk~inputclkctrl_outclk ), - .clk1(gnd), - .ena0(\main_memory|altsyncram_component|auto_generated|rden_decode|w_anode293w[2]~0_combout ), - .ena1(vcc), - .ena2(vcc), - .ena3(vcc), - .clr0(gnd), - .clr1(gnd), - .portadatain({\cpu_data[5]~input_o }), - .portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o , -\cpu_addr[0]~input_o }), - .portabyteenamasks(1'b1), - .portbdatain(1'b0), - .portbaddr(13'b0000000000000), - .portbbyteenamasks(1'b1), - .devclrn(devclrn), - .devpor(devpor), - .portadataout(\main_memory|altsyncram_component|auto_generated|ram_block1a29_PORTADATAOUT_bus ), - .portbdataout()); -// synopsys translate_off -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a29 .clk0_core_clock_enable = "ena0"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a29 .data_interleave_offset_in_bits = 1; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a29 .data_interleave_width_in_bits = 1; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a29 .logical_ram_name = "ram:main_memory|altsyncram:altsyncram_component|altsyncram_okf1:auto_generated|ALTSYNCRAM"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a29 .operation_mode = "single_port"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a29 .port_a_address_clear = "none"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a29 .port_a_address_width = 13; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a29 .port_a_byte_enable_clock = "none"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a29 .port_a_data_out_clear = "none"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a29 .port_a_data_out_clock = "none"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a29 .port_a_data_width = 1; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a29 .port_a_first_address = 0; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a29 .port_a_first_bit_number = 5; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a29 .port_a_last_address = 8191; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a29 .port_a_logical_ram_depth = 32768; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a29 .port_a_logical_ram_width = 8; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a29 .port_a_read_during_write_mode = "new_data_with_nbe_read"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a29 .port_b_address_width = 13; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a29 .port_b_data_width = 1; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a29 .ram_block_type = "M9K"; -// synopsys translate_on - -// Location: M9K_X33_Y6_N0 +// Location: M9K_X33_Y17_N0 fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block1a21 ( .portawe(\main_memory|altsyncram_component|auto_generated|decode3|w_anode244w[2]~0_combout ), .portare(vcc), @@ -2388,7 +11332,7 @@ fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block .portbaddrstall(gnd), .clk0(\clk~inputclkctrl_outclk ), .clk1(gnd), - .ena0(\main_memory|altsyncram_component|auto_generated|rden_decode|w_anode284w[2]~0_combout ), + .ena0(\main_memory|altsyncram_component|auto_generated|rden_decode|w_anode284w[2]~1_combout ), .ena1(vcc), .ena2(vcc), .ena3(vcc), @@ -2428,23 +11372,198 @@ defparam \main_memory|altsyncram_component|auto_generated|ram_block1a21 .port_b_ defparam \main_memory|altsyncram_component|auto_generated|ram_block1a21 .ram_block_type = "M9K"; // synopsys translate_on -// Location: LCCOMB_X32_Y8_N22 -fiftyfivenm_lcell_comb \main_memory|altsyncram_component|auto_generated|mux2|result_node[5]~11 ( +// Location: LCCOMB_X32_Y17_N28 +fiftyfivenm_lcell_comb \main_memory|altsyncram_component|auto_generated|mux2|result_node[5]~27 ( // Equation(s): -// \main_memory|altsyncram_component|auto_generated|mux2|result_node[5]~11_combout = (\main_memory|altsyncram_component|auto_generated|mux2|result_node[5]~10_combout & (((\main_memory|altsyncram_component|auto_generated|ram_block1a29~portadataout )) # -// (!\main_memory|altsyncram_component|auto_generated|address_reg_a [1]))) # (!\main_memory|altsyncram_component|auto_generated|mux2|result_node[5]~10_combout & (\main_memory|altsyncram_component|auto_generated|address_reg_a [1] & -// ((\main_memory|altsyncram_component|auto_generated|ram_block1a21~portadataout )))) +// \main_memory|altsyncram_component|auto_generated|mux2|result_node[5]~27_combout = (\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [0] & (((\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [1])))) # +// (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [0] & ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [1] & ((\main_memory|altsyncram_component|auto_generated|ram_block1a21~portadataout ))) # +// (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [1] & (\main_memory|altsyncram_component|auto_generated|ram_block1a5~portadataout )))) - .dataa(\main_memory|altsyncram_component|auto_generated|mux2|result_node[5]~10_combout ), - .datab(\main_memory|altsyncram_component|auto_generated|address_reg_a [1]), - .datac(\main_memory|altsyncram_component|auto_generated|ram_block1a29~portadataout ), + .dataa(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [0]), + .datab(\main_memory|altsyncram_component|auto_generated|ram_block1a5~portadataout ), + .datac(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [1]), .datad(\main_memory|altsyncram_component|auto_generated|ram_block1a21~portadataout ), .cin(gnd), - .combout(\main_memory|altsyncram_component|auto_generated|mux2|result_node[5]~11_combout ), + .combout(\main_memory|altsyncram_component|auto_generated|mux2|result_node[5]~27_combout ), .cout()); // synopsys translate_off -defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[5]~11 .lut_mask = 16'hE6A2; -defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[5]~11 .sum_lutc_input = "datac"; +defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[5]~27 .lut_mask = 16'hF4A4; +defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[5]~27 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: M9K_X33_Y21_N0 +fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block1a13 ( + .portawe(\main_memory|altsyncram_component|auto_generated|decode3|w_anode236w[2]~0_combout ), + .portare(vcc), + .portaaddrstall(gnd), + .portbwe(gnd), + .portbre(vcc), + .portbaddrstall(gnd), + .clk0(\clk~inputclkctrl_outclk ), + .clk1(gnd), + .ena0(\main_memory|altsyncram_component|auto_generated|rden_decode|w_anode284w[2]~0_combout ), + .ena1(vcc), + .ena2(vcc), + .ena3(vcc), + .clr0(gnd), + .clr1(gnd), + .portadatain({\cpu_data[5]~input_o }), + .portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o , +\cpu_addr[0]~input_o }), + .portabyteenamasks(1'b1), + .portbdatain(1'b0), + .portbaddr(13'b0000000000000), + .portbbyteenamasks(1'b1), + .devclrn(devclrn), + .devpor(devpor), + .portadataout(\main_memory|altsyncram_component|auto_generated|ram_block1a13_PORTADATAOUT_bus ), + .portbdataout()); +// synopsys translate_off +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a13 .clk0_core_clock_enable = "ena0"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a13 .data_interleave_offset_in_bits = 1; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a13 .data_interleave_width_in_bits = 1; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a13 .logical_ram_name = "ram:main_memory|altsyncram:altsyncram_component|altsyncram_okf1:auto_generated|ALTSYNCRAM"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a13 .operation_mode = "single_port"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a13 .port_a_address_clear = "none"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a13 .port_a_address_width = 13; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a13 .port_a_byte_enable_clock = "none"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a13 .port_a_data_out_clear = "none"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a13 .port_a_data_out_clock = "none"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a13 .port_a_data_width = 1; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a13 .port_a_first_address = 0; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a13 .port_a_first_bit_number = 5; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a13 .port_a_last_address = 8191; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a13 .port_a_logical_ram_depth = 32768; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a13 .port_a_logical_ram_width = 8; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a13 .port_a_read_during_write_mode = "new_data_with_nbe_read"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a13 .port_b_address_width = 13; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a13 .port_b_data_width = 1; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a13 .ram_block_type = "M9K"; +// synopsys translate_on + +// Location: M9K_X33_Y25_N0 +fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block1a29 ( + .portawe(\main_memory|altsyncram_component|auto_generated|decode3|w_anode252w[2]~0_combout ), + .portare(vcc), + .portaaddrstall(gnd), + .portbwe(gnd), + .portbre(vcc), + .portbaddrstall(gnd), + .clk0(\clk~inputclkctrl_outclk ), + .clk1(gnd), + .ena0(\main_memory|altsyncram_component|auto_generated|rden_decode|w_anode284w[2]~2_combout ), + .ena1(vcc), + .ena2(vcc), + .ena3(vcc), + .clr0(gnd), + .clr1(gnd), + .portadatain({\cpu_data[5]~input_o }), + .portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o , +\cpu_addr[0]~input_o }), + .portabyteenamasks(1'b1), + .portbdatain(1'b0), + .portbaddr(13'b0000000000000), + .portbbyteenamasks(1'b1), + .devclrn(devclrn), + .devpor(devpor), + .portadataout(\main_memory|altsyncram_component|auto_generated|ram_block1a29_PORTADATAOUT_bus ), + .portbdataout()); +// synopsys translate_off +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a29 .clk0_core_clock_enable = "ena0"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a29 .data_interleave_offset_in_bits = 1; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a29 .data_interleave_width_in_bits = 1; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a29 .logical_ram_name = "ram:main_memory|altsyncram:altsyncram_component|altsyncram_okf1:auto_generated|ALTSYNCRAM"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a29 .operation_mode = "single_port"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a29 .port_a_address_clear = "none"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a29 .port_a_address_width = 13; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a29 .port_a_byte_enable_clock = "none"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a29 .port_a_data_out_clear = "none"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a29 .port_a_data_out_clock = "none"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a29 .port_a_data_width = 1; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a29 .port_a_first_address = 0; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a29 .port_a_first_bit_number = 5; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a29 .port_a_last_address = 8191; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a29 .port_a_logical_ram_depth = 32768; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a29 .port_a_logical_ram_width = 8; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a29 .port_a_read_during_write_mode = "new_data_with_nbe_read"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a29 .port_b_address_width = 13; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a29 .port_b_data_width = 1; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a29 .ram_block_type = "M9K"; +// synopsys translate_on + +// Location: LCCOMB_X32_Y17_N6 +fiftyfivenm_lcell_comb \main_memory|altsyncram_component|auto_generated|mux2|result_node[5]~28 ( +// Equation(s): +// \main_memory|altsyncram_component|auto_generated|mux2|result_node[5]~28_combout = (\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [0] & ((\main_memory|altsyncram_component|auto_generated|mux2|result_node[5]~27_combout & +// ((\main_memory|altsyncram_component|auto_generated|ram_block1a29~portadataout ))) # (!\main_memory|altsyncram_component|auto_generated|mux2|result_node[5]~27_combout & (\main_memory|altsyncram_component|auto_generated|ram_block1a13~portadataout )))) # +// (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [0] & (\main_memory|altsyncram_component|auto_generated|mux2|result_node[5]~27_combout )) + + .dataa(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [0]), + .datab(\main_memory|altsyncram_component|auto_generated|mux2|result_node[5]~27_combout ), + .datac(\main_memory|altsyncram_component|auto_generated|ram_block1a13~portadataout ), + .datad(\main_memory|altsyncram_component|auto_generated|ram_block1a29~portadataout ), + .cin(gnd), + .combout(\main_memory|altsyncram_component|auto_generated|mux2|result_node[5]~28_combout ), + .cout()); +// synopsys translate_off +defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[5]~28 .lut_mask = 16'hEC64; +defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[5]~28 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X32_Y17_N24 +fiftyfivenm_lcell_comb \main_memory|altsyncram_component|auto_generated|mux2|result_node[5]~25 ( +// Equation(s): +// \main_memory|altsyncram_component|auto_generated|mux2|result_node[5]~25_combout = (\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [0] & ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [1]) # +// ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13~portadataout )))) # (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [0] & (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [1] & +// ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5~portadataout )))) + + .dataa(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [0]), + .datab(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [1]), + .datac(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13~portadataout ), + .datad(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5~portadataout ), + .cin(gnd), + .combout(\main_memory|altsyncram_component|auto_generated|mux2|result_node[5]~25_combout ), + .cout()); +// synopsys translate_off +defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[5]~25 .lut_mask = 16'hB9A8; +defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[5]~25 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X32_Y17_N10 +fiftyfivenm_lcell_comb \main_memory|altsyncram_component|auto_generated|mux2|result_node[5]~26 ( +// Equation(s): +// \main_memory|altsyncram_component|auto_generated|mux2|result_node[5]~26_combout = (\main_memory|altsyncram_component|auto_generated|mux2|result_node[5]~25_combout & (((\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29~portadataout +// ) # (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [1])))) # (!\main_memory|altsyncram_component|auto_generated|mux2|result_node[5]~25_combout & +// (\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21~portadataout & (\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [1]))) + + .dataa(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21~portadataout ), + .datab(\main_memory|altsyncram_component|auto_generated|mux2|result_node[5]~25_combout ), + .datac(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [1]), + .datad(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29~portadataout ), + .cin(gnd), + .combout(\main_memory|altsyncram_component|auto_generated|mux2|result_node[5]~26_combout ), + .cout()); +// synopsys translate_off +defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[5]~26 .lut_mask = 16'hEC2C; +defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[5]~26 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X32_Y17_N8 +fiftyfivenm_lcell_comb \main_memory|altsyncram_component|auto_generated|mux2|result_node[5]~29 ( +// Equation(s): +// \main_memory|altsyncram_component|auto_generated|mux2|result_node[5]~29_combout = (\cpu_addr[15]~input_o & ((\main_memory|altsyncram_component|auto_generated|mux2|result_node[5]~26_combout ))) # (!\cpu_addr[15]~input_o & +// (\main_memory|altsyncram_component|auto_generated|mux2|result_node[5]~28_combout )) + + .dataa(\main_memory|altsyncram_component|auto_generated|mux2|result_node[5]~28_combout ), + .datab(gnd), + .datac(\cpu_addr[15]~input_o ), + .datad(\main_memory|altsyncram_component|auto_generated|mux2|result_node[5]~26_combout ), + .cin(gnd), + .combout(\main_memory|altsyncram_component|auto_generated|mux2|result_node[5]~29_combout ), + .cout()); +// synopsys translate_off +defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[5]~29 .lut_mask = 16'hFA0A; +defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[5]~29 .sum_lutc_input = "datac"; // synopsys translate_on // Location: IOIBUF_X31_Y0_N15 @@ -2459,57 +11578,7 @@ defparam \cpu_data[6]~input .listen_to_nsleep_signal = "false"; defparam \cpu_data[6]~input .simulate_z_as = "z"; // synopsys translate_on -// Location: M9K_X33_Y3_N0 -fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block1a22 ( - .portawe(\main_memory|altsyncram_component|auto_generated|decode3|w_anode244w[2]~0_combout ), - .portare(vcc), - .portaaddrstall(gnd), - .portbwe(gnd), - .portbre(vcc), - .portbaddrstall(gnd), - .clk0(\clk~inputclkctrl_outclk ), - .clk1(gnd), - .ena0(\main_memory|altsyncram_component|auto_generated|rden_decode|w_anode284w[2]~0_combout ), - .ena1(vcc), - .ena2(vcc), - .ena3(vcc), - .clr0(gnd), - .clr1(gnd), - .portadatain({\cpu_data[6]~input_o }), - .portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o , -\cpu_addr[0]~input_o }), - .portabyteenamasks(1'b1), - .portbdatain(1'b0), - .portbaddr(13'b0000000000000), - .portbbyteenamasks(1'b1), - .devclrn(devclrn), - .devpor(devpor), - .portadataout(\main_memory|altsyncram_component|auto_generated|ram_block1a22_PORTADATAOUT_bus ), - .portbdataout()); -// synopsys translate_off -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a22 .clk0_core_clock_enable = "ena0"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a22 .data_interleave_offset_in_bits = 1; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a22 .data_interleave_width_in_bits = 1; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a22 .logical_ram_name = "ram:main_memory|altsyncram:altsyncram_component|altsyncram_okf1:auto_generated|ALTSYNCRAM"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a22 .operation_mode = "single_port"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a22 .port_a_address_clear = "none"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a22 .port_a_address_width = 13; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a22 .port_a_byte_enable_clock = "none"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a22 .port_a_data_out_clear = "none"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a22 .port_a_data_out_clock = "none"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a22 .port_a_data_width = 1; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a22 .port_a_first_address = 0; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a22 .port_a_first_bit_number = 6; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a22 .port_a_last_address = 8191; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a22 .port_a_logical_ram_depth = 32768; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a22 .port_a_logical_ram_width = 8; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a22 .port_a_read_during_write_mode = "new_data_with_nbe_read"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a22 .port_b_address_width = 13; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a22 .port_b_data_width = 1; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a22 .ram_block_type = "M9K"; -// synopsys translate_on - -// Location: M9K_X33_Y12_N0 +// Location: M9K_X33_Y5_N0 fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block1a6 ( .portawe(\main_memory|altsyncram_component|auto_generated|decode3|w_anode223w [2]), .portare(vcc), @@ -2559,26 +11628,76 @@ defparam \main_memory|altsyncram_component|auto_generated|ram_block1a6 .port_b_d defparam \main_memory|altsyncram_component|auto_generated|ram_block1a6 .ram_block_type = "M9K"; // synopsys translate_on -// Location: LCCOMB_X32_Y8_N26 -fiftyfivenm_lcell_comb \main_memory|altsyncram_component|auto_generated|mux2|result_node[6]~12 ( -// Equation(s): -// \main_memory|altsyncram_component|auto_generated|mux2|result_node[6]~12_combout = (\main_memory|altsyncram_component|auto_generated|address_reg_a [1] & ((\main_memory|altsyncram_component|auto_generated|ram_block1a22~portadataout ) # -// ((\main_memory|altsyncram_component|auto_generated|address_reg_a [0])))) # (!\main_memory|altsyncram_component|auto_generated|address_reg_a [1] & (((\main_memory|altsyncram_component|auto_generated|ram_block1a6~portadataout & -// !\main_memory|altsyncram_component|auto_generated|address_reg_a [0])))) - - .dataa(\main_memory|altsyncram_component|auto_generated|ram_block1a22~portadataout ), - .datab(\main_memory|altsyncram_component|auto_generated|ram_block1a6~portadataout ), - .datac(\main_memory|altsyncram_component|auto_generated|address_reg_a [1]), - .datad(\main_memory|altsyncram_component|auto_generated|address_reg_a [0]), - .cin(gnd), - .combout(\main_memory|altsyncram_component|auto_generated|mux2|result_node[6]~12_combout ), - .cout()); +// Location: M9K_X33_Y4_N0 +fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block1a22 ( + .portawe(\main_memory|altsyncram_component|auto_generated|decode3|w_anode244w[2]~0_combout ), + .portare(vcc), + .portaaddrstall(gnd), + .portbwe(gnd), + .portbre(vcc), + .portbaddrstall(gnd), + .clk0(\clk~inputclkctrl_outclk ), + .clk1(gnd), + .ena0(\main_memory|altsyncram_component|auto_generated|rden_decode|w_anode284w[2]~1_combout ), + .ena1(vcc), + .ena2(vcc), + .ena3(vcc), + .clr0(gnd), + .clr1(gnd), + .portadatain({\cpu_data[6]~input_o }), + .portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o , +\cpu_addr[0]~input_o }), + .portabyteenamasks(1'b1), + .portbdatain(1'b0), + .portbaddr(13'b0000000000000), + .portbbyteenamasks(1'b1), + .devclrn(devclrn), + .devpor(devpor), + .portadataout(\main_memory|altsyncram_component|auto_generated|ram_block1a22_PORTADATAOUT_bus ), + .portbdataout()); // synopsys translate_off -defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[6]~12 .lut_mask = 16'hF0AC; -defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[6]~12 .sum_lutc_input = "datac"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a22 .clk0_core_clock_enable = "ena0"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a22 .data_interleave_offset_in_bits = 1; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a22 .data_interleave_width_in_bits = 1; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a22 .logical_ram_name = "ram:main_memory|altsyncram:altsyncram_component|altsyncram_okf1:auto_generated|ALTSYNCRAM"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a22 .operation_mode = "single_port"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a22 .port_a_address_clear = "none"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a22 .port_a_address_width = 13; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a22 .port_a_byte_enable_clock = "none"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a22 .port_a_data_out_clear = "none"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a22 .port_a_data_out_clock = "none"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a22 .port_a_data_width = 1; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a22 .port_a_first_address = 0; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a22 .port_a_first_bit_number = 6; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a22 .port_a_last_address = 8191; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a22 .port_a_logical_ram_depth = 32768; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a22 .port_a_logical_ram_width = 8; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a22 .port_a_read_during_write_mode = "new_data_with_nbe_read"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a22 .port_b_address_width = 13; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a22 .port_b_data_width = 1; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a22 .ram_block_type = "M9K"; // synopsys translate_on -// Location: M9K_X33_Y15_N0 +// Location: LCCOMB_X32_Y7_N26 +fiftyfivenm_lcell_comb \main_memory|altsyncram_component|auto_generated|mux2|result_node[6]~32 ( +// Equation(s): +// \main_memory|altsyncram_component|auto_generated|mux2|result_node[6]~32_combout = (\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [1] & ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [0]) # +// ((\main_memory|altsyncram_component|auto_generated|ram_block1a22~portadataout )))) # (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [1] & (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [0] & +// (\main_memory|altsyncram_component|auto_generated|ram_block1a6~portadataout ))) + + .dataa(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [1]), + .datab(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [0]), + .datac(\main_memory|altsyncram_component|auto_generated|ram_block1a6~portadataout ), + .datad(\main_memory|altsyncram_component|auto_generated|ram_block1a22~portadataout ), + .cin(gnd), + .combout(\main_memory|altsyncram_component|auto_generated|mux2|result_node[6]~32_combout ), + .cout()); +// synopsys translate_off +defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[6]~32 .lut_mask = 16'hBA98; +defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[6]~32 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: M9K_X33_Y1_N0 fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block1a14 ( .portawe(\main_memory|altsyncram_component|auto_generated|decode3|w_anode236w[2]~0_combout ), .portare(vcc), @@ -2588,7 +11707,7 @@ fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block .portbaddrstall(gnd), .clk0(\clk~inputclkctrl_outclk ), .clk1(gnd), - .ena0(\main_memory|altsyncram_component|auto_generated|rden_decode|w_anode275w[2]~0_combout ), + .ena0(\main_memory|altsyncram_component|auto_generated|rden_decode|w_anode284w[2]~0_combout ), .ena1(vcc), .ena2(vcc), .ena3(vcc), @@ -2628,7 +11747,7 @@ defparam \main_memory|altsyncram_component|auto_generated|ram_block1a14 .port_b_ defparam \main_memory|altsyncram_component|auto_generated|ram_block1a14 .ram_block_type = "M9K"; // synopsys translate_on -// Location: M9K_X33_Y18_N0 +// Location: M9K_X33_Y3_N0 fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block1a30 ( .portawe(\main_memory|altsyncram_component|auto_generated|decode3|w_anode252w[2]~0_combout ), .portare(vcc), @@ -2638,7 +11757,7 @@ fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block .portbaddrstall(gnd), .clk0(\clk~inputclkctrl_outclk ), .clk1(gnd), - .ena0(\main_memory|altsyncram_component|auto_generated|rden_decode|w_anode293w[2]~0_combout ), + .ena0(\main_memory|altsyncram_component|auto_generated|rden_decode|w_anode284w[2]~2_combout ), .ena1(vcc), .ena2(vcc), .ena3(vcc), @@ -2678,23 +11797,79 @@ defparam \main_memory|altsyncram_component|auto_generated|ram_block1a30 .port_b_ defparam \main_memory|altsyncram_component|auto_generated|ram_block1a30 .ram_block_type = "M9K"; // synopsys translate_on -// Location: LCCOMB_X32_Y8_N8 -fiftyfivenm_lcell_comb \main_memory|altsyncram_component|auto_generated|mux2|result_node[6]~13 ( +// Location: LCCOMB_X32_Y7_N12 +fiftyfivenm_lcell_comb \main_memory|altsyncram_component|auto_generated|mux2|result_node[6]~33 ( // Equation(s): -// \main_memory|altsyncram_component|auto_generated|mux2|result_node[6]~13_combout = (\main_memory|altsyncram_component|auto_generated|mux2|result_node[6]~12_combout & (((\main_memory|altsyncram_component|auto_generated|ram_block1a30~portadataout )) # -// (!\main_memory|altsyncram_component|auto_generated|address_reg_a [0]))) # (!\main_memory|altsyncram_component|auto_generated|mux2|result_node[6]~12_combout & (\main_memory|altsyncram_component|auto_generated|address_reg_a [0] & -// (\main_memory|altsyncram_component|auto_generated|ram_block1a14~portadataout ))) +// \main_memory|altsyncram_component|auto_generated|mux2|result_node[6]~33_combout = (\main_memory|altsyncram_component|auto_generated|mux2|result_node[6]~32_combout & (((\main_memory|altsyncram_component|auto_generated|ram_block1a30~portadataout ) # +// (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [0])))) # (!\main_memory|altsyncram_component|auto_generated|mux2|result_node[6]~32_combout & (\main_memory|altsyncram_component|auto_generated|ram_block1a14~portadataout & +// (\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [0]))) - .dataa(\main_memory|altsyncram_component|auto_generated|mux2|result_node[6]~12_combout ), - .datab(\main_memory|altsyncram_component|auto_generated|address_reg_a [0]), - .datac(\main_memory|altsyncram_component|auto_generated|ram_block1a14~portadataout ), + .dataa(\main_memory|altsyncram_component|auto_generated|mux2|result_node[6]~32_combout ), + .datab(\main_memory|altsyncram_component|auto_generated|ram_block1a14~portadataout ), + .datac(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [0]), .datad(\main_memory|altsyncram_component|auto_generated|ram_block1a30~portadataout ), .cin(gnd), - .combout(\main_memory|altsyncram_component|auto_generated|mux2|result_node[6]~13_combout ), + .combout(\main_memory|altsyncram_component|auto_generated|mux2|result_node[6]~33_combout ), .cout()); // synopsys translate_off -defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[6]~13 .lut_mask = 16'hEA62; -defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[6]~13 .sum_lutc_input = "datac"; +defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[6]~33 .lut_mask = 16'hEA4A; +defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[6]~33 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X32_Y15_N24 +fiftyfivenm_lcell_comb \main_memory|altsyncram_component|auto_generated|mux2|result_node[6]~30 ( +// Equation(s): +// \main_memory|altsyncram_component|auto_generated|mux2|result_node[6]~30_combout = (\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [0] & (((\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [1]) # +// (\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14~portadataout )))) # (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [0] & +// (\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6~portadataout & (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [1]))) + + .dataa(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [0]), + .datab(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6~portadataout ), + .datac(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [1]), + .datad(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14~portadataout ), + .cin(gnd), + .combout(\main_memory|altsyncram_component|auto_generated|mux2|result_node[6]~30_combout ), + .cout()); +// synopsys translate_off +defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[6]~30 .lut_mask = 16'hAEA4; +defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[6]~30 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X32_Y15_N18 +fiftyfivenm_lcell_comb \main_memory|altsyncram_component|auto_generated|mux2|result_node[6]~31 ( +// Equation(s): +// \main_memory|altsyncram_component|auto_generated|mux2|result_node[6]~31_combout = (\main_memory|altsyncram_component|auto_generated|mux2|result_node[6]~30_combout & (((\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30~portadataout +// ) # (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [1])))) # (!\main_memory|altsyncram_component|auto_generated|mux2|result_node[6]~30_combout & +// (\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22~portadataout & (\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [1]))) + + .dataa(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22~portadataout ), + .datab(\main_memory|altsyncram_component|auto_generated|mux2|result_node[6]~30_combout ), + .datac(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [1]), + .datad(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30~portadataout ), + .cin(gnd), + .combout(\main_memory|altsyncram_component|auto_generated|mux2|result_node[6]~31_combout ), + .cout()); +// synopsys translate_off +defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[6]~31 .lut_mask = 16'hEC2C; +defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[6]~31 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X32_Y7_N22 +fiftyfivenm_lcell_comb \main_memory|altsyncram_component|auto_generated|mux2|result_node[6]~34 ( +// Equation(s): +// \main_memory|altsyncram_component|auto_generated|mux2|result_node[6]~34_combout = (\cpu_addr[15]~input_o & ((\main_memory|altsyncram_component|auto_generated|mux2|result_node[6]~31_combout ))) # (!\cpu_addr[15]~input_o & +// (\main_memory|altsyncram_component|auto_generated|mux2|result_node[6]~33_combout )) + + .dataa(\main_memory|altsyncram_component|auto_generated|mux2|result_node[6]~33_combout ), + .datab(\cpu_addr[15]~input_o ), + .datac(gnd), + .datad(\main_memory|altsyncram_component|auto_generated|mux2|result_node[6]~31_combout ), + .cin(gnd), + .combout(\main_memory|altsyncram_component|auto_generated|mux2|result_node[6]~34_combout ), + .cout()); +// synopsys translate_off +defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[6]~34 .lut_mask = 16'hEE22; +defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[6]~34 .sum_lutc_input = "datac"; // synopsys translate_on // Location: IOIBUF_X29_Y0_N15 @@ -2709,7 +11884,107 @@ defparam \cpu_data[7]~input .listen_to_nsleep_signal = "false"; defparam \cpu_data[7]~input .simulate_z_as = "z"; // synopsys translate_on -// Location: M9K_X33_Y13_N0 +// Location: M9K_X53_Y3_N0 +fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block1a31 ( + .portawe(\main_memory|altsyncram_component|auto_generated|decode3|w_anode252w[2]~0_combout ), + .portare(vcc), + .portaaddrstall(gnd), + .portbwe(gnd), + .portbre(vcc), + .portbaddrstall(gnd), + .clk0(\clk~inputclkctrl_outclk ), + .clk1(gnd), + .ena0(\main_memory|altsyncram_component|auto_generated|rden_decode|w_anode284w[2]~2_combout ), + .ena1(vcc), + .ena2(vcc), + .ena3(vcc), + .clr0(gnd), + .clr1(gnd), + .portadatain({\cpu_data[7]~input_o }), + .portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o , +\cpu_addr[0]~input_o }), + .portabyteenamasks(1'b1), + .portbdatain(1'b0), + .portbaddr(13'b0000000000000), + .portbbyteenamasks(1'b1), + .devclrn(devclrn), + .devpor(devpor), + .portadataout(\main_memory|altsyncram_component|auto_generated|ram_block1a31_PORTADATAOUT_bus ), + .portbdataout()); +// synopsys translate_off +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a31 .clk0_core_clock_enable = "ena0"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a31 .data_interleave_offset_in_bits = 1; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a31 .data_interleave_width_in_bits = 1; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a31 .logical_ram_name = "ram:main_memory|altsyncram:altsyncram_component|altsyncram_okf1:auto_generated|ALTSYNCRAM"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a31 .operation_mode = "single_port"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a31 .port_a_address_clear = "none"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a31 .port_a_address_width = 13; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a31 .port_a_byte_enable_clock = "none"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a31 .port_a_data_out_clear = "none"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a31 .port_a_data_out_clock = "none"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a31 .port_a_data_width = 1; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a31 .port_a_first_address = 0; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a31 .port_a_first_bit_number = 7; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a31 .port_a_last_address = 8191; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a31 .port_a_logical_ram_depth = 32768; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a31 .port_a_logical_ram_width = 8; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a31 .port_a_read_during_write_mode = "new_data_with_nbe_read"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a31 .port_b_address_width = 13; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a31 .port_b_data_width = 1; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a31 .ram_block_type = "M9K"; +// synopsys translate_on + +// Location: M9K_X33_Y6_N0 +fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block1a23 ( + .portawe(\main_memory|altsyncram_component|auto_generated|decode3|w_anode244w[2]~0_combout ), + .portare(vcc), + .portaaddrstall(gnd), + .portbwe(gnd), + .portbre(vcc), + .portbaddrstall(gnd), + .clk0(\clk~inputclkctrl_outclk ), + .clk1(gnd), + .ena0(\main_memory|altsyncram_component|auto_generated|rden_decode|w_anode284w[2]~1_combout ), + .ena1(vcc), + .ena2(vcc), + .ena3(vcc), + .clr0(gnd), + .clr1(gnd), + .portadatain({\cpu_data[7]~input_o }), + .portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o , +\cpu_addr[0]~input_o }), + .portabyteenamasks(1'b1), + .portbdatain(1'b0), + .portbaddr(13'b0000000000000), + .portbbyteenamasks(1'b1), + .devclrn(devclrn), + .devpor(devpor), + .portadataout(\main_memory|altsyncram_component|auto_generated|ram_block1a23_PORTADATAOUT_bus ), + .portbdataout()); +// synopsys translate_off +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a23 .clk0_core_clock_enable = "ena0"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a23 .data_interleave_offset_in_bits = 1; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a23 .data_interleave_width_in_bits = 1; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a23 .logical_ram_name = "ram:main_memory|altsyncram:altsyncram_component|altsyncram_okf1:auto_generated|ALTSYNCRAM"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a23 .operation_mode = "single_port"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a23 .port_a_address_clear = "none"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a23 .port_a_address_width = 13; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a23 .port_a_byte_enable_clock = "none"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a23 .port_a_data_out_clear = "none"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a23 .port_a_data_out_clock = "none"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a23 .port_a_data_width = 1; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a23 .port_a_first_address = 0; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a23 .port_a_first_bit_number = 7; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a23 .port_a_last_address = 8191; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a23 .port_a_logical_ram_depth = 32768; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a23 .port_a_logical_ram_width = 8; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a23 .port_a_read_during_write_mode = "new_data_with_nbe_read"; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a23 .port_b_address_width = 13; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a23 .port_b_data_width = 1; +defparam \main_memory|altsyncram_component|auto_generated|ram_block1a23 .ram_block_type = "M9K"; +// synopsys translate_on + +// Location: M9K_X33_Y7_N0 fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block1a7 ( .portawe(\main_memory|altsyncram_component|auto_generated|decode3|w_anode223w [2]), .portare(vcc), @@ -2759,7 +12034,26 @@ defparam \main_memory|altsyncram_component|auto_generated|ram_block1a7 .port_b_d defparam \main_memory|altsyncram_component|auto_generated|ram_block1a7 .ram_block_type = "M9K"; // synopsys translate_on -// Location: M9K_X33_Y16_N0 +// Location: LCCOMB_X32_Y7_N4 +fiftyfivenm_lcell_comb \main_memory|altsyncram_component|auto_generated|mux2|result_node[7]~37 ( +// Equation(s): +// \main_memory|altsyncram_component|auto_generated|mux2|result_node[7]~37_combout = (\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [1] & ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [0]) # +// ((\main_memory|altsyncram_component|auto_generated|ram_block1a23~portadataout )))) # (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [1] & (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [0] & +// ((\main_memory|altsyncram_component|auto_generated|ram_block1a7~portadataout )))) + + .dataa(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [1]), + .datab(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [0]), + .datac(\main_memory|altsyncram_component|auto_generated|ram_block1a23~portadataout ), + .datad(\main_memory|altsyncram_component|auto_generated|ram_block1a7~portadataout ), + .cin(gnd), + .combout(\main_memory|altsyncram_component|auto_generated|mux2|result_node[7]~37_combout ), + .cout()); +// synopsys translate_off +defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[7]~37 .lut_mask = 16'hB9A8; +defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[7]~37 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: M9K_X33_Y2_N0 fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block1a15 ( .portawe(\main_memory|altsyncram_component|auto_generated|decode3|w_anode236w[2]~0_combout ), .portare(vcc), @@ -2769,7 +12063,7 @@ fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block .portbaddrstall(gnd), .clk0(\clk~inputclkctrl_outclk ), .clk1(gnd), - .ena0(\main_memory|altsyncram_component|auto_generated|rden_decode|w_anode275w[2]~0_combout ), + .ena0(\main_memory|altsyncram_component|auto_generated|rden_decode|w_anode284w[2]~0_combout ), .ena1(vcc), .ena2(vcc), .ena3(vcc), @@ -2809,181 +12103,83 @@ defparam \main_memory|altsyncram_component|auto_generated|ram_block1a15 .port_b_ defparam \main_memory|altsyncram_component|auto_generated|ram_block1a15 .ram_block_type = "M9K"; // synopsys translate_on -// Location: LCCOMB_X32_Y8_N0 -fiftyfivenm_lcell_comb \main_memory|altsyncram_component|auto_generated|mux2|result_node[7]~14 ( +// Location: LCCOMB_X32_Y7_N14 +fiftyfivenm_lcell_comb \main_memory|altsyncram_component|auto_generated|mux2|result_node[7]~38 ( // Equation(s): -// \main_memory|altsyncram_component|auto_generated|mux2|result_node[7]~14_combout = (\main_memory|altsyncram_component|auto_generated|address_reg_a [1] & (((\main_memory|altsyncram_component|auto_generated|address_reg_a [0])))) # -// (!\main_memory|altsyncram_component|auto_generated|address_reg_a [1] & ((\main_memory|altsyncram_component|auto_generated|address_reg_a [0] & ((\main_memory|altsyncram_component|auto_generated|ram_block1a15~portadataout ))) # -// (!\main_memory|altsyncram_component|auto_generated|address_reg_a [0] & (\main_memory|altsyncram_component|auto_generated|ram_block1a7~portadataout )))) +// \main_memory|altsyncram_component|auto_generated|mux2|result_node[7]~38_combout = (\main_memory|altsyncram_component|auto_generated|mux2|result_node[7]~37_combout & ((\main_memory|altsyncram_component|auto_generated|ram_block1a31~portadataout ) # +// ((!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [0])))) # (!\main_memory|altsyncram_component|auto_generated|mux2|result_node[7]~37_combout & (((\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [0] & +// \main_memory|altsyncram_component|auto_generated|ram_block1a15~portadataout )))) - .dataa(\main_memory|altsyncram_component|auto_generated|address_reg_a [1]), - .datab(\main_memory|altsyncram_component|auto_generated|ram_block1a7~portadataout ), - .datac(\main_memory|altsyncram_component|auto_generated|address_reg_a [0]), + .dataa(\main_memory|altsyncram_component|auto_generated|ram_block1a31~portadataout ), + .datab(\main_memory|altsyncram_component|auto_generated|mux2|result_node[7]~37_combout ), + .datac(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [0]), .datad(\main_memory|altsyncram_component|auto_generated|ram_block1a15~portadataout ), .cin(gnd), - .combout(\main_memory|altsyncram_component|auto_generated|mux2|result_node[7]~14_combout ), + .combout(\main_memory|altsyncram_component|auto_generated|mux2|result_node[7]~38_combout ), .cout()); // synopsys translate_off -defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[7]~14 .lut_mask = 16'hF4A4; -defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[7]~14 .sum_lutc_input = "datac"; +defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[7]~38 .lut_mask = 16'hBC8C; +defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[7]~38 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: M9K_X33_Y1_N0 -fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block1a23 ( - .portawe(\main_memory|altsyncram_component|auto_generated|decode3|w_anode244w[2]~0_combout ), - .portare(vcc), - .portaaddrstall(gnd), - .portbwe(gnd), - .portbre(vcc), - .portbaddrstall(gnd), - .clk0(\clk~inputclkctrl_outclk ), - .clk1(gnd), - .ena0(\main_memory|altsyncram_component|auto_generated|rden_decode|w_anode284w[2]~0_combout ), - .ena1(vcc), - .ena2(vcc), - .ena3(vcc), - .clr0(gnd), - .clr1(gnd), - .portadatain({\cpu_data[7]~input_o }), - .portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o , -\cpu_addr[0]~input_o }), - .portabyteenamasks(1'b1), - .portbdatain(1'b0), - .portbaddr(13'b0000000000000), - .portbbyteenamasks(1'b1), - .devclrn(devclrn), - .devpor(devpor), - .portadataout(\main_memory|altsyncram_component|auto_generated|ram_block1a23_PORTADATAOUT_bus ), - .portbdataout()); -// synopsys translate_off -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a23 .clk0_core_clock_enable = "ena0"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a23 .data_interleave_offset_in_bits = 1; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a23 .data_interleave_width_in_bits = 1; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a23 .logical_ram_name = "ram:main_memory|altsyncram:altsyncram_component|altsyncram_okf1:auto_generated|ALTSYNCRAM"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a23 .operation_mode = "single_port"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a23 .port_a_address_clear = "none"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a23 .port_a_address_width = 13; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a23 .port_a_byte_enable_clock = "none"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a23 .port_a_data_out_clear = "none"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a23 .port_a_data_out_clock = "none"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a23 .port_a_data_width = 1; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a23 .port_a_first_address = 0; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a23 .port_a_first_bit_number = 7; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a23 .port_a_last_address = 8191; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a23 .port_a_logical_ram_depth = 32768; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a23 .port_a_logical_ram_width = 8; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a23 .port_a_read_during_write_mode = "new_data_with_nbe_read"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a23 .port_b_address_width = 13; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a23 .port_b_data_width = 1; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a23 .ram_block_type = "M9K"; -// synopsys translate_on - -// Location: M9K_X33_Y17_N0 -fiftyfivenm_ram_block \main_memory|altsyncram_component|auto_generated|ram_block1a31 ( - .portawe(\main_memory|altsyncram_component|auto_generated|decode3|w_anode252w[2]~0_combout ), - .portare(vcc), - .portaaddrstall(gnd), - .portbwe(gnd), - .portbre(vcc), - .portbaddrstall(gnd), - .clk0(\clk~inputclkctrl_outclk ), - .clk1(gnd), - .ena0(\main_memory|altsyncram_component|auto_generated|rden_decode|w_anode293w[2]~0_combout ), - .ena1(vcc), - .ena2(vcc), - .ena3(vcc), - .clr0(gnd), - .clr1(gnd), - .portadatain({\cpu_data[7]~input_o }), - .portaaddr({\cpu_addr[12]~input_o ,\cpu_addr[11]~input_o ,\cpu_addr[10]~input_o ,\cpu_addr[9]~input_o ,\cpu_addr[8]~input_o ,\cpu_addr[7]~input_o ,\cpu_addr[6]~input_o ,\cpu_addr[5]~input_o ,\cpu_addr[4]~input_o ,\cpu_addr[3]~input_o ,\cpu_addr[2]~input_o ,\cpu_addr[1]~input_o , -\cpu_addr[0]~input_o }), - .portabyteenamasks(1'b1), - .portbdatain(1'b0), - .portbaddr(13'b0000000000000), - .portbbyteenamasks(1'b1), - .devclrn(devclrn), - .devpor(devpor), - .portadataout(\main_memory|altsyncram_component|auto_generated|ram_block1a31_PORTADATAOUT_bus ), - .portbdataout()); -// synopsys translate_off -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a31 .clk0_core_clock_enable = "ena0"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a31 .data_interleave_offset_in_bits = 1; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a31 .data_interleave_width_in_bits = 1; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a31 .logical_ram_name = "ram:main_memory|altsyncram:altsyncram_component|altsyncram_okf1:auto_generated|ALTSYNCRAM"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a31 .operation_mode = "single_port"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a31 .port_a_address_clear = "none"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a31 .port_a_address_width = 13; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a31 .port_a_byte_enable_clock = "none"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a31 .port_a_data_out_clear = "none"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a31 .port_a_data_out_clock = "none"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a31 .port_a_data_width = 1; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a31 .port_a_first_address = 0; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a31 .port_a_first_bit_number = 7; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a31 .port_a_last_address = 8191; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a31 .port_a_logical_ram_depth = 32768; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a31 .port_a_logical_ram_width = 8; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a31 .port_a_read_during_write_mode = "new_data_with_nbe_read"; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a31 .port_b_address_width = 13; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a31 .port_b_data_width = 1; -defparam \main_memory|altsyncram_component|auto_generated|ram_block1a31 .ram_block_type = "M9K"; -// synopsys translate_on - -// Location: LCCOMB_X32_Y8_N18 -fiftyfivenm_lcell_comb \main_memory|altsyncram_component|auto_generated|mux2|result_node[7]~15 ( +// Location: LCCOMB_X32_Y7_N16 +fiftyfivenm_lcell_comb \main_memory|altsyncram_component|auto_generated|mux2|result_node[7]~35 ( // Equation(s): -// \main_memory|altsyncram_component|auto_generated|mux2|result_node[7]~15_combout = (\main_memory|altsyncram_component|auto_generated|mux2|result_node[7]~14_combout & (((\main_memory|altsyncram_component|auto_generated|ram_block1a31~portadataout )) # -// (!\main_memory|altsyncram_component|auto_generated|address_reg_a [1]))) # (!\main_memory|altsyncram_component|auto_generated|mux2|result_node[7]~14_combout & (\main_memory|altsyncram_component|auto_generated|address_reg_a [1] & -// (\main_memory|altsyncram_component|auto_generated|ram_block1a23~portadataout ))) +// \main_memory|altsyncram_component|auto_generated|mux2|result_node[7]~35_combout = (\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [1] & (((\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [0])))) # +// (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [1] & ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [0] & (\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15~portadataout )) # +// (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [0] & ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7~portadataout ))))) - .dataa(\main_memory|altsyncram_component|auto_generated|mux2|result_node[7]~14_combout ), - .datab(\main_memory|altsyncram_component|auto_generated|address_reg_a [1]), - .datac(\main_memory|altsyncram_component|auto_generated|ram_block1a23~portadataout ), - .datad(\main_memory|altsyncram_component|auto_generated|ram_block1a31~portadataout ), + .dataa(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15~portadataout ), + .datab(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [1]), + .datac(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [0]), + .datad(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7~portadataout ), .cin(gnd), - .combout(\main_memory|altsyncram_component|auto_generated|mux2|result_node[7]~15_combout ), + .combout(\main_memory|altsyncram_component|auto_generated|mux2|result_node[7]~35_combout ), .cout()); // synopsys translate_off -defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[7]~15 .lut_mask = 16'hEA62; -defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[7]~15 .sum_lutc_input = "datac"; +defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[7]~35 .lut_mask = 16'hE3E0; +defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[7]~35 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: LCCOMB_X24_Y1_N12 -fiftyfivenm_lcell_comb \clk_count[1]~1 ( +// Location: LCCOMB_X32_Y7_N18 +fiftyfivenm_lcell_comb \main_memory|altsyncram_component|auto_generated|mux2|result_node[7]~36 ( // Equation(s): -// \clk_count[1]~1_combout = clk_count[1] $ (clk_count[0]) +// \main_memory|altsyncram_component|auto_generated|mux2|result_node[7]~36_combout = (\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [1] & ((\main_memory|altsyncram_component|auto_generated|mux2|result_node[7]~35_combout & +// (\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31~portadataout )) # (!\main_memory|altsyncram_component|auto_generated|mux2|result_node[7]~35_combout & +// ((\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23~portadataout ))))) # (!\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [1] & +// (((\main_memory|altsyncram_component|auto_generated|mux2|result_node[7]~35_combout )))) + + .dataa(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31~portadataout ), + .datab(\boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a [1]), + .datac(\boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23~portadataout ), + .datad(\main_memory|altsyncram_component|auto_generated|mux2|result_node[7]~35_combout ), + .cin(gnd), + .combout(\main_memory|altsyncram_component|auto_generated|mux2|result_node[7]~36_combout ), + .cout()); +// synopsys translate_off +defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[7]~36 .lut_mask = 16'hBBC0; +defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[7]~36 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X31_Y7_N16 +fiftyfivenm_lcell_comb \main_memory|altsyncram_component|auto_generated|mux2|result_node[7]~39 ( +// Equation(s): +// \main_memory|altsyncram_component|auto_generated|mux2|result_node[7]~39_combout = (\cpu_addr[15]~input_o & ((\main_memory|altsyncram_component|auto_generated|mux2|result_node[7]~36_combout ))) # (!\cpu_addr[15]~input_o & +// (\main_memory|altsyncram_component|auto_generated|mux2|result_node[7]~38_combout )) .dataa(gnd), - .datab(gnd), - .datac(clk_count[1]), - .datad(clk_count[0]), + .datab(\cpu_addr[15]~input_o ), + .datac(\main_memory|altsyncram_component|auto_generated|mux2|result_node[7]~38_combout ), + .datad(\main_memory|altsyncram_component|auto_generated|mux2|result_node[7]~36_combout ), .cin(gnd), - .combout(\clk_count[1]~1_combout ), + .combout(\main_memory|altsyncram_component|auto_generated|mux2|result_node[7]~39_combout ), .cout()); // synopsys translate_off -defparam \clk_count[1]~1 .lut_mask = 16'h0FF0; -defparam \clk_count[1]~1 .sum_lutc_input = "datac"; +defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[7]~39 .lut_mask = 16'hFC30; +defparam \main_memory|altsyncram_component|auto_generated|mux2|result_node[7]~39 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X24_Y1_N13 -dffeas \clk_count[1] ( - .clk(\clk~inputclkctrl_outclk ), - .d(\clk_count[1]~1_combout ), - .asdata(vcc), - .clrn(vcc), - .aload(gnd), - .sclr(gnd), - .sload(gnd), - .ena(vcc), - .devclrn(devclrn), - .devpor(devpor), - .q(clk_count[1]), - .prn(vcc)); -// synopsys translate_off -defparam \clk_count[1] .is_wysiwyg = "true"; -defparam \clk_count[1] .power_up = "low"; -// synopsys translate_on - -// Location: LCCOMB_X24_Y1_N6 +// Location: LCCOMB_X20_Y1_N6 fiftyfivenm_lcell_comb \clk_count~2 ( // Equation(s): // \clk_count~2_combout = (clk_count[1] & (clk_count[2] $ (clk_count[0]))) # (!clk_count[1] & (clk_count[2] & clk_count[0])) @@ -3000,7 +12196,7 @@ defparam \clk_count~2 .lut_mask = 16'h5AA0; defparam \clk_count~2 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X24_Y1_N7 +// Location: FF_X20_Y1_N7 dffeas \clk_count[2] ( .clk(\clk~inputclkctrl_outclk ), .d(\clk_count~2_combout ), @@ -3019,24 +12215,24 @@ defparam \clk_count[2] .is_wysiwyg = "true"; defparam \clk_count[2] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X24_Y1_N10 +// Location: LCCOMB_X20_Y1_N10 fiftyfivenm_lcell_comb \clk_count~0 ( // Equation(s): // \clk_count~0_combout = (!clk_count[0] & ((clk_count[1]) # (!clk_count[2]))) - .dataa(clk_count[1]), + .dataa(clk_count[2]), .datab(gnd), .datac(clk_count[0]), - .datad(clk_count[2]), + .datad(clk_count[1]), .cin(gnd), .combout(\clk_count~0_combout ), .cout()); // synopsys translate_off -defparam \clk_count~0 .lut_mask = 16'h0A0F; +defparam \clk_count~0 .lut_mask = 16'h0F05; defparam \clk_count~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X24_Y1_N11 +// Location: FF_X20_Y1_N11 dffeas \clk_count[0] ( .clk(\clk~inputclkctrl_outclk ), .d(\clk_count~0_combout ), @@ -3055,24 +12251,60 @@ defparam \clk_count[0] .is_wysiwyg = "true"; defparam \clk_count[0] .power_up = "low"; // synopsys translate_on -// Location: LCCOMB_X24_Y1_N0 +// Location: LCCOMB_X20_Y1_N12 +fiftyfivenm_lcell_comb \clk_count[1]~1 ( +// Equation(s): +// \clk_count[1]~1_combout = clk_count[1] $ (clk_count[0]) + + .dataa(gnd), + .datab(gnd), + .datac(clk_count[1]), + .datad(clk_count[0]), + .cin(gnd), + .combout(\clk_count[1]~1_combout ), + .cout()); +// synopsys translate_off +defparam \clk_count[1]~1 .lut_mask = 16'h0FF0; +defparam \clk_count[1]~1 .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: FF_X20_Y1_N13 +dffeas \clk_count[1] ( + .clk(\clk~inputclkctrl_outclk ), + .d(\clk_count[1]~1_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(clk_count[1]), + .prn(vcc)); +// synopsys translate_off +defparam \clk_count[1] .is_wysiwyg = "true"; +defparam \clk_count[1] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X20_Y1_N0 fiftyfivenm_lcell_comb \cpu_phi2~0 ( // Equation(s): -// \cpu_phi2~0_combout = \cpu_phi2~reg0_q $ (((!clk_count[0] & (!clk_count[1] & clk_count[2])))) +// \cpu_phi2~0_combout = \cpu_phi2~reg0_q $ (((!clk_count[1] & (clk_count[2] & !clk_count[0])))) - .dataa(clk_count[0]), - .datab(clk_count[1]), + .dataa(clk_count[1]), + .datab(clk_count[2]), .datac(\cpu_phi2~reg0_q ), - .datad(clk_count[2]), + .datad(clk_count[0]), .cin(gnd), .combout(\cpu_phi2~0_combout ), .cout()); // synopsys translate_off -defparam \cpu_phi2~0 .lut_mask = 16'hE1F0; +defparam \cpu_phi2~0 .lut_mask = 16'hF0B4; defparam \cpu_phi2~0 .sum_lutc_input = "datac"; // synopsys translate_on -// Location: FF_X24_Y1_N1 +// Location: FF_X20_Y1_N1 dffeas \cpu_phi2~reg0 ( .clk(\clk~inputclkctrl_outclk ), .d(\cpu_phi2~0_combout ), @@ -3091,6 +12323,86 @@ defparam \cpu_phi2~reg0 .is_wysiwyg = "true"; defparam \cpu_phi2~reg0 .power_up = "low"; // synopsys translate_on +// Location: FF_X47_Y21_N7 +dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][6] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][6]~feeder_combout ), + .asdata(vcc), + .clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][6]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][6] .is_wysiwyg = "true"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][6] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X47_Y21_N21 +dffeas \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][7] ( + .clk(\altera_internal_jtag~TCKUTAPclkctrl_outclk ), + .d(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][7]~feeder_combout ), + .asdata(vcc), + .clrn(!\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~0_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][7]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][7] .is_wysiwyg = "true"; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][7] .power_up = "low"; +// synopsys translate_on + +// Location: LCCOMB_X65_Y17_N0 +fiftyfivenm_lcell_comb \auto_hub|~GND ( + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .cin(gnd), + .combout(\auto_hub|~GND~combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|~GND .lut_mask = 16'h0000; +defparam \auto_hub|~GND .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X47_Y25_N6 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~_wirecell ( + .dataa(gnd), + .datab(gnd), + .datac(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~q ), + .datad(gnd), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~_wirecell_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~_wirecell .lut_mask = 16'h0F0F; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~_wirecell .sum_lutc_input = "datac"; +// synopsys translate_on + +// Location: LCCOMB_X46_Y27_N0 +fiftyfivenm_lcell_comb \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[0]~_wirecell ( + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state [0]), + .cin(gnd), + .combout(\auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[0]~_wirecell_combout ), + .cout()); +// synopsys translate_off +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[0]~_wirecell .lut_mask = 16'h00FF; +defparam \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[0]~_wirecell .sum_lutc_input = "datac"; +// synopsys translate_on + // Location: IOIBUF_X46_Y54_N29 fiftyfivenm_io_ibuf \rst~input ( .i(rst), @@ -3103,18 +12415,6 @@ defparam \rst~input .listen_to_nsleep_signal = "false"; defparam \rst~input .simulate_z_as = "z"; // synopsys translate_on -// Location: IOIBUF_X29_Y0_N22 -fiftyfivenm_io_ibuf \cpu_addr[15]~input ( - .i(cpu_addr[15]), - .ibar(gnd), - .nsleep(vcc), - .o(\cpu_addr[15]~input_o )); -// synopsys translate_off -defparam \cpu_addr[15]~input .bus_hold = "false"; -defparam \cpu_addr[15]~input .listen_to_nsleep_signal = "false"; -defparam \cpu_addr[15]~input .simulate_z_as = "z"; -// synopsys translate_on - // Location: IOIBUF_X24_Y0_N29 fiftyfivenm_io_ibuf \cpu_vpb~input ( .i(cpu_vpb), @@ -3232,82 +12532,4 @@ defparam \~QUARTUS_CREATED_ADC2~ .tsclkdiv = 1; defparam \~QUARTUS_CREATED_ADC2~ .tsclksel = 0; // synopsys translate_on -assign cpu_led = \cpu_led~output_o ; - -assign cpu_resb = \cpu_resb~output_o ; - -assign cpu_rdy = \cpu_rdy~output_o ; - -assign cpu_sob = \cpu_sob~output_o ; - -assign cpu_irqb = \cpu_irqb~output_o ; - -assign cpu_phi2 = \cpu_phi2~output_o ; - -assign cpu_be = \cpu_be~output_o ; - -assign cpu_nmib = \cpu_nmib~output_o ; - -assign cpu_data[0] = \cpu_data[0]~output_o ; - -assign cpu_data[1] = \cpu_data[1]~output_o ; - -assign cpu_data[2] = \cpu_data[2]~output_o ; - -assign cpu_data[3] = \cpu_data[3]~output_o ; - -assign cpu_data[4] = \cpu_data[4]~output_o ; - -assign cpu_data[5] = \cpu_data[5]~output_o ; - -assign cpu_data[6] = \cpu_data[6]~output_o ; - -assign cpu_data[7] = \cpu_data[7]~output_o ; - -endmodule - -module hard_block ( - - devpor, - devclrn, - devoe); - -// Design Ports Information -// ~ALTERA_TMS~ => Location: PIN_H2, I/O Standard: 2.5 V Schmitt Trigger, Current Strength: Default -// ~ALTERA_TCK~ => Location: PIN_G2, I/O Standard: 2.5 V Schmitt Trigger, Current Strength: Default -// ~ALTERA_TDI~ => Location: PIN_L4, I/O Standard: 2.5 V Schmitt Trigger, Current Strength: Default -// ~ALTERA_TDO~ => Location: PIN_M5, I/O Standard: 2.5 V, Current Strength: Default -// ~ALTERA_CONFIG_SEL~ => Location: PIN_H10, I/O Standard: 2.5 V, Current Strength: Default -// ~ALTERA_nCONFIG~ => Location: PIN_H9, I/O Standard: 2.5 V Schmitt Trigger, Current Strength: Default -// ~ALTERA_nSTATUS~ => Location: PIN_G9, I/O Standard: 2.5 V Schmitt Trigger, Current Strength: Default -// ~ALTERA_CONF_DONE~ => Location: PIN_F8, I/O Standard: 2.5 V Schmitt Trigger, Current Strength: Default - -input devpor; -input devclrn; -input devoe; - -wire gnd; -wire vcc; -wire unknown; - -assign gnd = 1'b0; -assign vcc = 1'b1; -assign unknown = 1'bx; - -wire \~ALTERA_TMS~~padout ; -wire \~ALTERA_TCK~~padout ; -wire \~ALTERA_TDI~~padout ; -wire \~ALTERA_CONFIG_SEL~~padout ; -wire \~ALTERA_nCONFIG~~padout ; -wire \~ALTERA_nSTATUS~~padout ; -wire \~ALTERA_CONF_DONE~~padout ; -wire \~ALTERA_TMS~~ibuf_o ; -wire \~ALTERA_TCK~~ibuf_o ; -wire \~ALTERA_TDI~~ibuf_o ; -wire \~ALTERA_CONFIG_SEL~~ibuf_o ; -wire \~ALTERA_nCONFIG~~ibuf_o ; -wire \~ALTERA_nSTATUS~~ibuf_o ; -wire \~ALTERA_CONF_DONE~~ibuf_o ; - - endmodule diff --git a/hw/fpga/simulation/modelsim/super6502_modelsim.xrf b/hw/fpga/simulation/modelsim/super6502_modelsim.xrf index 9bf2eb5..f356154 100644 --- a/hw/fpga/simulation/modelsim/super6502_modelsim.xrf +++ b/hw/fpga/simulation/modelsim/super6502_modelsim.xrf @@ -3,6 +3,8 @@ source_file = 1, /home/byron/Projects/super6502/hw/fpga/super6502.sv source_file = 1, /home/byron/Projects/super6502/hw/fpga/ram.qip source_file = 1, /home/byron/Projects/super6502/hw/fpga/ram.v source_file = 1, /home/byron/Projects/super6502/hw/fpga/super6502.sdc +source_file = 1, /home/byron/Projects/super6502/hw/fpga/rom.qip +source_file = 1, /home/byron/Projects/super6502/hw/fpga/rom.v source_file = 1, /software/quartus-lite-18.1/quartus/libraries/megafunctions/altsyncram.tdf source_file = 1, /software/quartus-lite-18.1/quartus/libraries/megafunctions/stratix_ram_block.inc source_file = 1, /software/quartus-lite-18.1/quartus/libraries/megafunctions/lpm_mux.inc @@ -17,16 +19,29 @@ source_file = 1, /home/byron/Projects/super6502/hw/fpga/db/altsyncram_okf1.tdf source_file = 1, /home/byron/Projects/super6502/hw/fpga/db/decode_c7a.tdf source_file = 1, /home/byron/Projects/super6502/hw/fpga/db/decode_5j9.tdf source_file = 1, /home/byron/Projects/super6502/hw/fpga/db/mux_s1b.tdf +source_file = 1, /home/byron/Projects/super6502/hw/fpga/db/altsyncram_b7b1.tdf +source_file = 1, /home/byron/Projects/super6502/hw/fpga/db/altsyncram_kqc2.tdf +source_file = 1, /home/byron/Projects/super6502/hw/fpga/boot.hex +source_file = 1, /software/quartus-lite-18.1/quartus/libraries/megafunctions/sld_mod_ram_rom.vhd +source_file = 1, /software/quartus-lite-18.1/quartus/libraries/vhdl/ieee/prmtvs_b.vhd +source_file = 1, /software/quartus-lite-18.1/quartus/libraries/vhdl/ieee/prmtvs_p.vhd +source_file = 1, /software/quartus-lite-18.1/quartus/libraries/vhdl/ieee/timing_b.vhd +source_file = 1, /software/quartus-lite-18.1/quartus/libraries/vhdl/ieee/timing_p.vhd +source_file = 1, /software/quartus-lite-18.1/quartus/libraries/megafunctions/sld_jtag_endpoint_adapter.vhd +source_file = 1, /software/quartus-lite-18.1/quartus/libraries/megafunctions/sld_jtag_endpoint_adapter_impl.sv +source_file = 1, /software/quartus-lite-18.1/quartus/libraries/megafunctions/sld_rom_sr.vhd +source_file = 1, /software/quartus-lite-18.1/quartus/libraries/megafunctions/sld_hub.vhd +source_file = 1, /home/byron/Projects/super6502/hw/fpga/db/ip/sld0cadc1a2/alt_sld_fab.v +source_file = 1, /home/byron/Projects/super6502/hw/fpga/db/ip/sld0cadc1a2/submodules/alt_sld_fab_alt_sld_fab.v +source_file = 1, /home/byron/Projects/super6502/hw/fpga/db/ip/sld0cadc1a2/submodules/alt_sld_fab_alt_sld_fab_ident.sv +source_file = 1, /home/byron/Projects/super6502/hw/fpga/db/ip/sld0cadc1a2/submodules/alt_sld_fab_alt_sld_fab_presplit.sv +source_file = 1, /home/byron/Projects/super6502/hw/fpga/db/ip/sld0cadc1a2/submodules/alt_sld_fab_alt_sld_fab_sldfabric.vhd +source_file = 1, /home/byron/Projects/super6502/hw/fpga/db/ip/sld0cadc1a2/submodules/alt_sld_fab_alt_sld_fab_splitter.sv +source_file = 1, /software/quartus-lite-18.1/quartus/libraries/megafunctions/sld_jtag_hub.vhd design_name = super6502 instance = comp, \~QUARTUS_CREATED_GND~I , ~QUARTUS_CREATED_GND~I, super6502, 1 -instance = comp, \cpu_data[0]~output , cpu_data[0]~output, super6502, 1 -instance = comp, \cpu_data[1]~output , cpu_data[1]~output, super6502, 1 -instance = comp, \cpu_data[2]~output , cpu_data[2]~output, super6502, 1 -instance = comp, \cpu_data[3]~output , cpu_data[3]~output, super6502, 1 -instance = comp, \cpu_data[4]~output , cpu_data[4]~output, super6502, 1 -instance = comp, \cpu_data[5]~output , cpu_data[5]~output, super6502, 1 -instance = comp, \cpu_data[6]~output , cpu_data[6]~output, super6502, 1 -instance = comp, \cpu_data[7]~output , cpu_data[7]~output, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][6]~feeder , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][6]~feeder, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][7]~feeder , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][7]~feeder, super6502, 1 instance = comp, \cpu_led~output , cpu_led~output, super6502, 1 instance = comp, \cpu_resb~output , cpu_resb~output, super6502, 1 instance = comp, \cpu_rdy~output , cpu_rdy~output, super6502, 1 @@ -35,14 +50,24 @@ instance = comp, \cpu_irqb~output , cpu_irqb~output, super6502, 1 instance = comp, \cpu_phi2~output , cpu_phi2~output, super6502, 1 instance = comp, \cpu_be~output , cpu_be~output, super6502, 1 instance = comp, \cpu_nmib~output , cpu_nmib~output, super6502, 1 +instance = comp, \cpu_data[0]~output , cpu_data[0]~output, super6502, 1 +instance = comp, \cpu_data[1]~output , cpu_data[1]~output, super6502, 1 +instance = comp, \cpu_data[2]~output , cpu_data[2]~output, super6502, 1 +instance = comp, \cpu_data[3]~output , cpu_data[3]~output, super6502, 1 +instance = comp, \cpu_data[4]~output , cpu_data[4]~output, super6502, 1 +instance = comp, \cpu_data[5]~output , cpu_data[5]~output, super6502, 1 +instance = comp, \cpu_data[6]~output , cpu_data[6]~output, super6502, 1 +instance = comp, \cpu_data[7]~output , cpu_data[7]~output, super6502, 1 +instance = comp, \altera_reserved_tdo~output , altera_reserved_tdo~output, super6502, 1 instance = comp, \clk~input , clk~input, super6502, 1 instance = comp, \clk~inputclkctrl , clk~inputclkctrl, super6502, 1 instance = comp, \cpu_addr[13]~input , cpu_addr[13]~input, super6502, 1 -instance = comp, \main_memory|altsyncram_component|auto_generated|address_reg_a[0] , main_memory|altsyncram_component|auto_generated|address_reg_a[0], super6502, 1 -instance = comp, \cpu_addr[14]~input , cpu_addr[14]~input, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a[0] , boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a[0], super6502, 1 +instance = comp, \cpu_addr[15]~input , cpu_addr[15]~input, super6502, 1 instance = comp, \cpu_rwb~input , cpu_rwb~input, super6502, 1 -instance = comp, \main_memory|altsyncram_component|auto_generated|decode3|w_anode236w[2]~0 , main_memory|altsyncram_component|auto_generated|decode3|w_anode236w[2]~0, super6502, 1 -instance = comp, \main_memory|altsyncram_component|auto_generated|rden_decode|w_anode275w[2]~0 , main_memory|altsyncram_component|auto_generated|rden_decode|w_anode275w[2]~0, super6502, 1 +instance = comp, \cpu_addr[14]~input , cpu_addr[14]~input, super6502, 1 +instance = comp, \main_memory|altsyncram_component|auto_generated|decode3|w_anode244w[2]~0 , main_memory|altsyncram_component|auto_generated|decode3|w_anode244w[2]~0, super6502, 1 +instance = comp, \main_memory|altsyncram_component|auto_generated|rden_decode|w_anode284w[2]~1 , main_memory|altsyncram_component|auto_generated|rden_decode|w_anode284w[2]~1, super6502, 1 instance = comp, \cpu_data[0]~input , cpu_data[0]~input, super6502, 1 instance = comp, \cpu_addr[0]~input , cpu_addr[0]~input, super6502, 1 instance = comp, \cpu_addr[1]~input , cpu_addr[1]~input, super6502, 1 @@ -57,89 +82,512 @@ instance = comp, \cpu_addr[9]~input , cpu_addr[9]~input, super6502, 1 instance = comp, \cpu_addr[10]~input , cpu_addr[10]~input, super6502, 1 instance = comp, \cpu_addr[11]~input , cpu_addr[11]~input, super6502, 1 instance = comp, \cpu_addr[12]~input , cpu_addr[12]~input, super6502, 1 -instance = comp, \main_memory|altsyncram_component|auto_generated|ram_block1a8 , main_memory|altsyncram_component|auto_generated|ram_block1a8, super6502, 1 +instance = comp, \main_memory|altsyncram_component|auto_generated|ram_block1a16 , main_memory|altsyncram_component|auto_generated|ram_block1a16, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a[1]~feeder , boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a[1]~feeder, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a[1] , boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_a[1], super6502, 1 instance = comp, \main_memory|altsyncram_component|auto_generated|decode3|w_anode223w[2] , main_memory|altsyncram_component|auto_generated|decode3|w_anode223w[2], super6502, 1 instance = comp, \main_memory|altsyncram_component|auto_generated|rden_decode|w_anode261w[2]~0 , main_memory|altsyncram_component|auto_generated|rden_decode|w_anode261w[2]~0, super6502, 1 instance = comp, \main_memory|altsyncram_component|auto_generated|ram_block1a0 , main_memory|altsyncram_component|auto_generated|ram_block1a0, super6502, 1 -instance = comp, \main_memory|altsyncram_component|auto_generated|decode3|w_anode244w[2]~0 , main_memory|altsyncram_component|auto_generated|decode3|w_anode244w[2]~0, super6502, 1 +instance = comp, \main_memory|altsyncram_component|auto_generated|mux2|result_node[0]~2 , main_memory|altsyncram_component|auto_generated|mux2|result_node[0]~2, super6502, 1 +instance = comp, \main_memory|altsyncram_component|auto_generated|decode3|w_anode236w[2]~0 , main_memory|altsyncram_component|auto_generated|decode3|w_anode236w[2]~0, super6502, 1 instance = comp, \main_memory|altsyncram_component|auto_generated|rden_decode|w_anode284w[2]~0 , main_memory|altsyncram_component|auto_generated|rden_decode|w_anode284w[2]~0, super6502, 1 -instance = comp, \main_memory|altsyncram_component|auto_generated|ram_block1a16 , main_memory|altsyncram_component|auto_generated|ram_block1a16, super6502, 1 -instance = comp, \main_memory|altsyncram_component|auto_generated|address_reg_a[1] , main_memory|altsyncram_component|auto_generated|address_reg_a[1], super6502, 1 -instance = comp, \main_memory|altsyncram_component|auto_generated|mux2|result_node[0]~0 , main_memory|altsyncram_component|auto_generated|mux2|result_node[0]~0, super6502, 1 +instance = comp, \main_memory|altsyncram_component|auto_generated|ram_block1a8 , main_memory|altsyncram_component|auto_generated|ram_block1a8, super6502, 1 instance = comp, \main_memory|altsyncram_component|auto_generated|decode3|w_anode252w[2]~0 , main_memory|altsyncram_component|auto_generated|decode3|w_anode252w[2]~0, super6502, 1 -instance = comp, \main_memory|altsyncram_component|auto_generated|rden_decode|w_anode293w[2]~0 , main_memory|altsyncram_component|auto_generated|rden_decode|w_anode293w[2]~0, super6502, 1 +instance = comp, \main_memory|altsyncram_component|auto_generated|rden_decode|w_anode284w[2]~2 , main_memory|altsyncram_component|auto_generated|rden_decode|w_anode284w[2]~2, super6502, 1 instance = comp, \main_memory|altsyncram_component|auto_generated|ram_block1a24 , main_memory|altsyncram_component|auto_generated|ram_block1a24, super6502, 1 +instance = comp, \main_memory|altsyncram_component|auto_generated|mux2|result_node[0]~3 , main_memory|altsyncram_component|auto_generated|mux2|result_node[0]~3, super6502, 1 +instance = comp, \altera_reserved_tms~input , altera_reserved_tms~input, super6502, 1 +instance = comp, \altera_reserved_tck~input , altera_reserved_tck~input, super6502, 1 +instance = comp, \altera_reserved_tdi~input , altera_reserved_tdi~input, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~6 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~6, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[6] , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[6], super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~7 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~7, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[7] , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[7], super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~8 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~8, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[8]~feeder , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[8]~feeder, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[8] , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[8], super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena_proc~1 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|node_ena_proc~1, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[9] , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[9], super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt~1 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt~1, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt[0] , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt[0], super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt~2 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt~2, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt[1] , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt[1], super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt~0 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt~0, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt[2] , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|tms_cnt[2], super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~0 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~0, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[0] , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[0], super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~9 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~9, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[10] , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[10], super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~10 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~10, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[11] , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[11], super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~11 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~11, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[12] , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[12], super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~12 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~12, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[13] , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[13], super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~13 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~13, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[14] , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[14], super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_dr_scan_proc~0 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_dr_scan_proc~0, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[15]~feeder , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[15]~feeder, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[15] , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[15], super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~1 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~1, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[1] , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[1], super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~2 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~2, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[2] , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[2], super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~3 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~3, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[3] , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[3], super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[0]~15 , boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[0]~15, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[1]~18 , boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[1]~18, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[2]~20 , boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[2]~20, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[3]~22 , boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[3]~22, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[4]~24 , boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[4]~24, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[5]~26 , boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[5]~26, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[6]~28 , boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[6]~28, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[7]~30 , boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[7]~30, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[8]~32 , boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[8]~32, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[9]~34 , boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[9]~34, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[10]~36 , boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[10]~36, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[11]~38 , boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[11]~38, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[12]~40 , boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[12]~40, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[13]~42 , boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[13]~42, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[14]~44 , boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[14]~44, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~0 , boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~0, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[1]~feeder , boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[1]~feeder, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[1] , boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[1], super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~0 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|irsr_reg~0, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[9] , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[9], super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[8] , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[8], super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[7] , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[7], super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[6]~feeder , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[6]~feeder, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[6] , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[6], super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[5] , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[5], super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[4]~feeder , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[4]~feeder, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[4] , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[4], super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[3]~feeder , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[3]~feeder, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[3] , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[3], super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[2]~0 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[2]~0, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[2] , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[2], super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[1]~feeder , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[1]~feeder, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[1] , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[1], super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[0]~1 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[0]~1, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[0] , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|jtag_ir_reg[0], super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Equal0~1 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|Equal0~1, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Equal0~0 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|Equal0~0, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Equal1~0 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|Equal1~0, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_scan_reg, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|reset_ena_reg_proc~0 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|reset_ena_reg_proc~0, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|reset_ena_reg~feeder , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|reset_ena_reg~feeder, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|reset_ena_reg , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|reset_ena_reg, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[1]~2 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[1]~2, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~4 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~4, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4] , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[4], super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~5 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|irsr_reg~5, super6502, 1 +instance = comp, \~QIC_CREATED_GND~I , ~QIC_CREATED_GND~I, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[8] , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|irsr_reg[8], super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[1]~1 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[1]~1, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[2]~0 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[2]~0, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[1]~3 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[1]~3, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[1] , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[1], super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[2]~4 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[2]~4, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[2]~5 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[2]~5, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[2] , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[2], super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg_proc~0 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|clr_reg_proc~0, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|clr_reg, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~1 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|irsr_reg~1, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[2]~2 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|irsr_reg[2]~2, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[2] , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|irsr_reg[2], super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg~6 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg~6, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[0] , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|hub_mode_reg[0], super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[3]~7 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|irsr_reg[3]~7, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[3]~8 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|irsr_reg[3]~8, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[2]~feeder , boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[2]~feeder, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[2] , boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[2], super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[3]~6 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|irsr_reg[3]~6, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[3]~9 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|irsr_reg[3]~9, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[3] , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|irsr_reg[3], super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~0 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0]~0, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][3] , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][3], super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena_proc~0 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|node_ena_proc~0, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|Equal0~2 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|Equal0~2, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_dr_scan_reg , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|virtual_dr_scan_reg, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena~2 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|node_ena~2, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena~0 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|node_ena~0, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena~1 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|node_ena~1, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|node_ena~3 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|node_ena~3, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|splitter_nodes_receive_0[3] , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|splitter_nodes_receive_0[3], super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~1 , boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~1, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[6] , boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[6], super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~13 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|irsr_reg~13, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[7] , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|irsr_reg[7], super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[5] , boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[5], super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~12 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|irsr_reg~12, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[6] , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|irsr_reg[6], super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[4]~feeder , boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[4]~feeder, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[4] , boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[4], super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~11 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|irsr_reg~11, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[5] , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|irsr_reg[5], super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[3] , boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[3], super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~10 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|irsr_reg~10, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[4] , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|irsr_reg[4], super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][4]~feeder , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][4]~feeder, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][4] , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][4], super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|is_in_use_reg~0 , boot_rom|altsyncram_component|auto_generated|mgl_prim2|is_in_use_reg~0, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|is_in_use_reg , boot_rom|altsyncram_component|auto_generated|mgl_prim2|is_in_use_reg, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~3 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|irsr_reg~3, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[0] , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|irsr_reg[0], super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0] , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][0], super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~4 , boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~4, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][2]~feeder , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][2]~feeder, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][2] , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][2], super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_incr_addr~2 , boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_incr_addr~2, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_incr_addr~0 , boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_incr_addr~0, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][1] , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][1], super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~3 , boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~3, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg[1]~0 , boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg[1]~0, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg[1] , boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg[1], super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg[0]~2 , boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg[0]~2, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg[0] , boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg[0], super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg[2]~1 , boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg[2]~1, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg[2] , boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg[2], super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_incr_addr~1 , boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_incr_addr~1, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[0]~17 , boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[0]~17, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[14] , boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[14], super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[13] , boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[13], super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[12] , boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[12], super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[11] , boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[11], super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[10] , boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[10], super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[9] , boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[9], super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[8] , boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[8], super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[7] , boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[7], super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[6] , boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[6], super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[5] , boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[5], super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[4] , boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[4], super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[3] , boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[3], super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[2] , boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[2], super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[1] , boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[1], super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[0] , boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_addr_reg[0], super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[0] , boot_rom|altsyncram_component|auto_generated|mgl_prim2|ir_loaded_address_reg[0], super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg~4 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|irsr_reg~4, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irsr_reg[1] , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|irsr_reg[1], super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_bypass_reg~0 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|tdo_bypass_reg~0, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_bypass_reg , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|tdo_bypass_reg, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~9 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~9, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~10 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~10, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|clear_signal , boot_rom|altsyncram_component|auto_generated|mgl_prim2|\ram_rom_logic_gen:name_gen:info_rom_sr|clear_signal, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[0]~5 , boot_rom|altsyncram_component|auto_generated|mgl_prim2|\ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[0]~5, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[1]~7 , boot_rom|altsyncram_component|auto_generated|mgl_prim2|\ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[1]~7, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[4]~12 , boot_rom|altsyncram_component|auto_generated|mgl_prim2|\ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[4]~12, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[1] , boot_rom|altsyncram_component|auto_generated|mgl_prim2|\ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[1], super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[2]~9 , boot_rom|altsyncram_component|auto_generated|mgl_prim2|\ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[2]~9, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[2] , boot_rom|altsyncram_component|auto_generated|mgl_prim2|\ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[2], super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~7 , boot_rom|altsyncram_component|auto_generated|mgl_prim2|\ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~7, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[3]~13 , boot_rom|altsyncram_component|auto_generated|mgl_prim2|\ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[3]~13, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[3] , boot_rom|altsyncram_component|auto_generated|mgl_prim2|\ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[3], super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[4]~15 , boot_rom|altsyncram_component|auto_generated|mgl_prim2|\ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[4]~15, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[4] , boot_rom|altsyncram_component|auto_generated|mgl_prim2|\ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[4], super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~3 , boot_rom|altsyncram_component|auto_generated|mgl_prim2|\ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~3, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[4]~11 , boot_rom|altsyncram_component|auto_generated|mgl_prim2|\ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[4]~11, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[0] , boot_rom|altsyncram_component|auto_generated|mgl_prim2|\ram_rom_logic_gen:name_gen:info_rom_sr|word_counter[0], super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~11 , boot_rom|altsyncram_component|auto_generated|mgl_prim2|\ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~11, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~12 , boot_rom|altsyncram_component|auto_generated|mgl_prim2|\ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~12, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~14 , boot_rom|altsyncram_component|auto_generated|mgl_prim2|\ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~14, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~15 , boot_rom|altsyncram_component|auto_generated|mgl_prim2|\ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~15, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~0 , boot_rom|altsyncram_component|auto_generated|mgl_prim2|\ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~0, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~16 , boot_rom|altsyncram_component|auto_generated|mgl_prim2|\ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~16, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~17 , boot_rom|altsyncram_component|auto_generated|mgl_prim2|\ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~17, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~18 , boot_rom|altsyncram_component|auto_generated|mgl_prim2|\ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~18, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR[3]~6 , boot_rom|altsyncram_component|auto_generated|mgl_prim2|\ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR[3]~6, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR[3] , boot_rom|altsyncram_component|auto_generated|mgl_prim2|\ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR[3], super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~13 , boot_rom|altsyncram_component|auto_generated|mgl_prim2|\ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~13, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR[2] , boot_rom|altsyncram_component|auto_generated|mgl_prim2|\ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR[2], super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~8 , boot_rom|altsyncram_component|auto_generated|mgl_prim2|\ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~8, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~9 , boot_rom|altsyncram_component|auto_generated|mgl_prim2|\ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~9, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~10 , boot_rom|altsyncram_component|auto_generated|mgl_prim2|\ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~10, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR[1] , boot_rom|altsyncram_component|auto_generated|mgl_prim2|\ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR[1], super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~2 , boot_rom|altsyncram_component|auto_generated|mgl_prim2|\ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~2, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~1 , boot_rom|altsyncram_component|auto_generated|mgl_prim2|\ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~1, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~4 , boot_rom|altsyncram_component|auto_generated|mgl_prim2|\ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~4, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~5 , boot_rom|altsyncram_component|auto_generated|mgl_prim2|\ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR~5, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR[0] , boot_rom|altsyncram_component|auto_generated|mgl_prim2|\ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR[0], super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][5] , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][5], super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|bypass_reg_out~0 , boot_rom|altsyncram_component|auto_generated|mgl_prim2|bypass_reg_out~0, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|bypass_reg_out , boot_rom|altsyncram_component|auto_generated|mgl_prim2|bypass_reg_out, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|adapted_tdo~0 , boot_rom|altsyncram_component|auto_generated|mgl_prim2|adapted_tdo~0, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~2 , boot_rom|altsyncram_component|auto_generated|mgl_prim2|process_0~2, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode236w[2]~0 , boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode236w[2]~0, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12 , boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a12, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b[0]~feeder , boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b[0]~feeder, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b[0] , boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b[0], super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode252w[2] , boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode252w[2], super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode252w[2]~0 , boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode252w[2]~0, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28 , boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a28, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode223w[2] , boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode223w[2], super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode223w[2]~0 , boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode223w[2]~0, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4 , boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a4, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode244w[2] , boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode244w[2], super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode244w[2]~0 , boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode244w[2]~0, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20 , boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a20, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b[1] , boot_rom|altsyncram_component|auto_generated|altsyncram1|address_reg_b[1], super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[4]~8 , boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[4]~8, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[4]~9 , boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[4]~9, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14 , boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a14, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30 , boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a30, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6 , boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a6, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22 , boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a22, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[6]~12 , boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[6]~12, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[6]~13 , boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[6]~13, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23 , boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a23, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31 , boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a31, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15 , boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a15, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7 , boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a7, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[7]~14 , boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[7]~14, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[7]~15 , boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[7]~15, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~26 , boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~26, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[6]~19 , boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[6]~19, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[7] , boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[7], super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~25 , boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~25, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[6] , boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[6], super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21 , boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a21, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13 , boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a13, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5 , boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a5, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[5]~10 , boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[5]~10, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29 , boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a29, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[5]~11 , boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[5]~11, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~24 , boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~24, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[5] , boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[5], super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~23 , boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~23, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[4] , boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[4], super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19 , boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a19, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27 , boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a27, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11 , boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a11, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3 , boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a3, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[3]~6 , boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[3]~6, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[3]~7 , boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[3]~7, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~22 , boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~22, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[3] , boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[3], super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26 , boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a26, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10 , boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a10, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2 , boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a2, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18 , boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a18, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[2]~4 , boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[2]~4, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[2]~5 , boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[2]~5, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~21 , boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~21, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[2] , boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[2], super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25 , boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a25, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9 , boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a9, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1 , boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a1, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[1]~2 , boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[1]~2, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17 , boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a17, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[1]~3 , boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[1]~3, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~20 , boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~20, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[1] , boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[1], super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16 , boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a16, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0 , boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a0, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[0]~0 , boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[0]~0, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8 , boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a8, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24 , boot_rom|altsyncram_component|auto_generated|altsyncram1|ram_block3a24, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[0]~1 , boot_rom|altsyncram_component|auto_generated|altsyncram1|mux7|result_node[0]~1, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~18 , boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg~18, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[0] , boot_rom|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_reg[0], super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|adapted_tdo~1 , boot_rom|altsyncram_component|auto_generated|mgl_prim2|adapted_tdo~1, super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|mgl_prim2|adapted_tdo~2 , boot_rom|altsyncram_component|auto_generated|mgl_prim2|adapted_tdo~2, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|virtual_ir_tdo_sel_reg[0] , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|virtual_ir_tdo_sel_reg[0], super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~7 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~7, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~12 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~12, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~2 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~2, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg_ena~0 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|hub_info_reg_ena~0, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|clear_signal , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|clear_signal, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~11 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~11, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[1]~14 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[1]~14, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~23 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~23, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[1] , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[1], super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[2]~16 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[2]~16, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[2] , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[2], super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[3]~18 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[3]~18, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[3] , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[3], super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[4]~20 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[4]~20, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[4] , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[4], super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~13 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~13, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~22 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0]~22, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0] , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|word_counter[0], super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~6 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~6, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~9 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~9, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~10 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~10, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~11 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~11, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR[1]~12 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR[1]~12, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR[3] , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR[3], super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~8 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~8, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR[2] , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR[2], super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~7 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~7, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR[1] , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR[1], super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~4 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~4, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~5 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR~5, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR[0] , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|hub_info_reg|WORD_SR[0], super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg~3 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg~3, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg[3] , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg[3], super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg~2 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg~2, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg[2] , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg[2], super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg~1 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg~1, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg[1] , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg[1], super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg~0 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg~0, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg[0] , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|hub_minor_ver_reg[0], super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~3 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~3, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~4 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~4, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~5 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~5, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[0]~7 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[0]~7, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[2]~13 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[2]~13, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[3]~15 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[3]~15, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[1]~10 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[1]~10, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[3] , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[3], super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[4]~17 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[4]~17, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[4] , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[4], super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[1]~9 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[1]~9, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[1]~19 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[1]~19, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[0] , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[0], super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[1]~11 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[1]~11, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[1] , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[1], super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[2] , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|mixer_addr_reg_internal[2], super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~13 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~13, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~14 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~14, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[1]~4 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[1]~4, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[1]~5 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[1]~5, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[3]~feeder , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[3]~feeder, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[0]~0 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[0]~0, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[0]~1 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[0]~1, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[3] , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[3], super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[2]~feeder , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[2]~feeder, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[2] , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[2], super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[1]~feeder , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[1]~feeder, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[1] , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[1], super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[0]~feeder , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[0]~feeder, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[0] , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|identity_contrib_shift_reg[0], super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[0]~feeder , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[0]~feeder, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[0]~0 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[0]~0, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[0] , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[0], super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[0]~0 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[0]~0, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[1]~feeder , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[1]~feeder, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[1] , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[1], super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~6 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~6, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~7 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~7, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[1]~1 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[1]~1, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~11 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~11, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~12 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~12, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[2]~feeder , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[2]~feeder, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[2] , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[2], super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[2]~2 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[2]~2, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[3]~feeder , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[3]~feeder, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[3] , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric_ident_writedata[3], super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~8 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~8, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~9 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~9, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~10 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|design_hash_reg~10, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[3]~3 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[3]~3, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_proc~0 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|design_hash_proc~0, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|hub_info_reg_ena , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|hub_info_reg_ena, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[3] , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[3], super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[2] , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[2], super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[1] , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[1], super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[0] , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|design_hash_reg[0], super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~6 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~6, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~8 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~8, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~11 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|tdo_mux_out~11, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|tdo , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|tdo, super6502, 1 +instance = comp, \altera_internal_jtag~TCKUTAPclkctrl , altera_internal_jtag~TCKUTAPclkctrl, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~5 , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state~5, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[5] , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[5], super6502, 1 +instance = comp, \boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode236w[2] , boot_rom|altsyncram_component|auto_generated|altsyncram1|decode5|w_anode236w[2], super6502, 1 +instance = comp, \main_memory|altsyncram_component|auto_generated|mux2|result_node[0]~0 , main_memory|altsyncram_component|auto_generated|mux2|result_node[0]~0, super6502, 1 instance = comp, \main_memory|altsyncram_component|auto_generated|mux2|result_node[0]~1 , main_memory|altsyncram_component|auto_generated|mux2|result_node[0]~1, super6502, 1 +instance = comp, \main_memory|altsyncram_component|auto_generated|mux2|result_node[0]~4 , main_memory|altsyncram_component|auto_generated|mux2|result_node[0]~4, super6502, 1 instance = comp, \cpu_data[1]~input , cpu_data[1]~input, super6502, 1 -instance = comp, \main_memory|altsyncram_component|auto_generated|ram_block1a25 , main_memory|altsyncram_component|auto_generated|ram_block1a25, super6502, 1 instance = comp, \main_memory|altsyncram_component|auto_generated|ram_block1a1 , main_memory|altsyncram_component|auto_generated|ram_block1a1, super6502, 1 -instance = comp, \main_memory|altsyncram_component|auto_generated|ram_block1a9 , main_memory|altsyncram_component|auto_generated|ram_block1a9, super6502, 1 -instance = comp, \main_memory|altsyncram_component|auto_generated|mux2|result_node[1]~2 , main_memory|altsyncram_component|auto_generated|mux2|result_node[1]~2, super6502, 1 instance = comp, \main_memory|altsyncram_component|auto_generated|ram_block1a17 , main_memory|altsyncram_component|auto_generated|ram_block1a17, super6502, 1 -instance = comp, \main_memory|altsyncram_component|auto_generated|mux2|result_node[1]~3 , main_memory|altsyncram_component|auto_generated|mux2|result_node[1]~3, super6502, 1 +instance = comp, \main_memory|altsyncram_component|auto_generated|mux2|result_node[1]~7 , main_memory|altsyncram_component|auto_generated|mux2|result_node[1]~7, super6502, 1 +instance = comp, \main_memory|altsyncram_component|auto_generated|ram_block1a25 , main_memory|altsyncram_component|auto_generated|ram_block1a25, super6502, 1 +instance = comp, \main_memory|altsyncram_component|auto_generated|ram_block1a9 , main_memory|altsyncram_component|auto_generated|ram_block1a9, super6502, 1 +instance = comp, \main_memory|altsyncram_component|auto_generated|mux2|result_node[1]~8 , main_memory|altsyncram_component|auto_generated|mux2|result_node[1]~8, super6502, 1 +instance = comp, \main_memory|altsyncram_component|auto_generated|mux2|result_node[1]~5 , main_memory|altsyncram_component|auto_generated|mux2|result_node[1]~5, super6502, 1 +instance = comp, \main_memory|altsyncram_component|auto_generated|mux2|result_node[1]~6 , main_memory|altsyncram_component|auto_generated|mux2|result_node[1]~6, super6502, 1 +instance = comp, \main_memory|altsyncram_component|auto_generated|mux2|result_node[1]~9 , main_memory|altsyncram_component|auto_generated|mux2|result_node[1]~9, super6502, 1 instance = comp, \cpu_data[2]~input , cpu_data[2]~input, super6502, 1 -instance = comp, \main_memory|altsyncram_component|auto_generated|ram_block1a18 , main_memory|altsyncram_component|auto_generated|ram_block1a18, super6502, 1 -instance = comp, \main_memory|altsyncram_component|auto_generated|ram_block1a2 , main_memory|altsyncram_component|auto_generated|ram_block1a2, super6502, 1 -instance = comp, \main_memory|altsyncram_component|auto_generated|mux2|result_node[2]~4 , main_memory|altsyncram_component|auto_generated|mux2|result_node[2]~4, super6502, 1 instance = comp, \main_memory|altsyncram_component|auto_generated|ram_block1a26 , main_memory|altsyncram_component|auto_generated|ram_block1a26, super6502, 1 instance = comp, \main_memory|altsyncram_component|auto_generated|ram_block1a10 , main_memory|altsyncram_component|auto_generated|ram_block1a10, super6502, 1 -instance = comp, \main_memory|altsyncram_component|auto_generated|mux2|result_node[2]~5 , main_memory|altsyncram_component|auto_generated|mux2|result_node[2]~5, super6502, 1 +instance = comp, \main_memory|altsyncram_component|auto_generated|ram_block1a18 , main_memory|altsyncram_component|auto_generated|ram_block1a18, super6502, 1 +instance = comp, \main_memory|altsyncram_component|auto_generated|ram_block1a2 , main_memory|altsyncram_component|auto_generated|ram_block1a2, super6502, 1 +instance = comp, \main_memory|altsyncram_component|auto_generated|mux2|result_node[2]~12 , main_memory|altsyncram_component|auto_generated|mux2|result_node[2]~12, super6502, 1 +instance = comp, \main_memory|altsyncram_component|auto_generated|mux2|result_node[2]~13 , main_memory|altsyncram_component|auto_generated|mux2|result_node[2]~13, super6502, 1 +instance = comp, \main_memory|altsyncram_component|auto_generated|mux2|result_node[2]~10 , main_memory|altsyncram_component|auto_generated|mux2|result_node[2]~10, super6502, 1 +instance = comp, \main_memory|altsyncram_component|auto_generated|mux2|result_node[2]~11 , main_memory|altsyncram_component|auto_generated|mux2|result_node[2]~11, super6502, 1 +instance = comp, \main_memory|altsyncram_component|auto_generated|mux2|result_node[2]~14 , main_memory|altsyncram_component|auto_generated|mux2|result_node[2]~14, super6502, 1 instance = comp, \cpu_data[3]~input , cpu_data[3]~input, super6502, 1 instance = comp, \main_memory|altsyncram_component|auto_generated|ram_block1a3 , main_memory|altsyncram_component|auto_generated|ram_block1a3, super6502, 1 -instance = comp, \main_memory|altsyncram_component|auto_generated|ram_block1a11 , main_memory|altsyncram_component|auto_generated|ram_block1a11, super6502, 1 -instance = comp, \main_memory|altsyncram_component|auto_generated|mux2|result_node[3]~6 , main_memory|altsyncram_component|auto_generated|mux2|result_node[3]~6, super6502, 1 instance = comp, \main_memory|altsyncram_component|auto_generated|ram_block1a19 , main_memory|altsyncram_component|auto_generated|ram_block1a19, super6502, 1 +instance = comp, \main_memory|altsyncram_component|auto_generated|mux2|result_node[3]~17 , main_memory|altsyncram_component|auto_generated|mux2|result_node[3]~17, super6502, 1 +instance = comp, \main_memory|altsyncram_component|auto_generated|ram_block1a11 , main_memory|altsyncram_component|auto_generated|ram_block1a11, super6502, 1 instance = comp, \main_memory|altsyncram_component|auto_generated|ram_block1a27 , main_memory|altsyncram_component|auto_generated|ram_block1a27, super6502, 1 -instance = comp, \main_memory|altsyncram_component|auto_generated|mux2|result_node[3]~7 , main_memory|altsyncram_component|auto_generated|mux2|result_node[3]~7, super6502, 1 +instance = comp, \main_memory|altsyncram_component|auto_generated|mux2|result_node[3]~18 , main_memory|altsyncram_component|auto_generated|mux2|result_node[3]~18, super6502, 1 +instance = comp, \main_memory|altsyncram_component|auto_generated|mux2|result_node[3]~15 , main_memory|altsyncram_component|auto_generated|mux2|result_node[3]~15, super6502, 1 +instance = comp, \main_memory|altsyncram_component|auto_generated|mux2|result_node[3]~16 , main_memory|altsyncram_component|auto_generated|mux2|result_node[3]~16, super6502, 1 +instance = comp, \main_memory|altsyncram_component|auto_generated|mux2|result_node[3]~19 , main_memory|altsyncram_component|auto_generated|mux2|result_node[3]~19, super6502, 1 instance = comp, \cpu_data[4]~input , cpu_data[4]~input, super6502, 1 -instance = comp, \main_memory|altsyncram_component|auto_generated|ram_block1a12 , main_memory|altsyncram_component|auto_generated|ram_block1a12, super6502, 1 instance = comp, \main_memory|altsyncram_component|auto_generated|ram_block1a28 , main_memory|altsyncram_component|auto_generated|ram_block1a28, super6502, 1 +instance = comp, \main_memory|altsyncram_component|auto_generated|ram_block1a12 , main_memory|altsyncram_component|auto_generated|ram_block1a12, super6502, 1 instance = comp, \main_memory|altsyncram_component|auto_generated|ram_block1a4 , main_memory|altsyncram_component|auto_generated|ram_block1a4, super6502, 1 instance = comp, \main_memory|altsyncram_component|auto_generated|ram_block1a20 , main_memory|altsyncram_component|auto_generated|ram_block1a20, super6502, 1 -instance = comp, \main_memory|altsyncram_component|auto_generated|mux2|result_node[4]~8 , main_memory|altsyncram_component|auto_generated|mux2|result_node[4]~8, super6502, 1 -instance = comp, \main_memory|altsyncram_component|auto_generated|mux2|result_node[4]~9 , main_memory|altsyncram_component|auto_generated|mux2|result_node[4]~9, super6502, 1 +instance = comp, \main_memory|altsyncram_component|auto_generated|mux2|result_node[4]~22 , main_memory|altsyncram_component|auto_generated|mux2|result_node[4]~22, super6502, 1 +instance = comp, \main_memory|altsyncram_component|auto_generated|mux2|result_node[4]~23 , main_memory|altsyncram_component|auto_generated|mux2|result_node[4]~23, super6502, 1 +instance = comp, \main_memory|altsyncram_component|auto_generated|mux2|result_node[4]~20 , main_memory|altsyncram_component|auto_generated|mux2|result_node[4]~20, super6502, 1 +instance = comp, \main_memory|altsyncram_component|auto_generated|mux2|result_node[4]~21 , main_memory|altsyncram_component|auto_generated|mux2|result_node[4]~21, super6502, 1 +instance = comp, \main_memory|altsyncram_component|auto_generated|mux2|result_node[4]~24 , main_memory|altsyncram_component|auto_generated|mux2|result_node[4]~24, super6502, 1 instance = comp, \cpu_data[5]~input , cpu_data[5]~input, super6502, 1 instance = comp, \main_memory|altsyncram_component|auto_generated|ram_block1a5 , main_memory|altsyncram_component|auto_generated|ram_block1a5, super6502, 1 -instance = comp, \main_memory|altsyncram_component|auto_generated|ram_block1a13 , main_memory|altsyncram_component|auto_generated|ram_block1a13, super6502, 1 -instance = comp, \main_memory|altsyncram_component|auto_generated|mux2|result_node[5]~10 , main_memory|altsyncram_component|auto_generated|mux2|result_node[5]~10, super6502, 1 -instance = comp, \main_memory|altsyncram_component|auto_generated|ram_block1a29 , main_memory|altsyncram_component|auto_generated|ram_block1a29, super6502, 1 instance = comp, \main_memory|altsyncram_component|auto_generated|ram_block1a21 , main_memory|altsyncram_component|auto_generated|ram_block1a21, super6502, 1 -instance = comp, \main_memory|altsyncram_component|auto_generated|mux2|result_node[5]~11 , main_memory|altsyncram_component|auto_generated|mux2|result_node[5]~11, super6502, 1 +instance = comp, \main_memory|altsyncram_component|auto_generated|mux2|result_node[5]~27 , main_memory|altsyncram_component|auto_generated|mux2|result_node[5]~27, super6502, 1 +instance = comp, \main_memory|altsyncram_component|auto_generated|ram_block1a13 , main_memory|altsyncram_component|auto_generated|ram_block1a13, super6502, 1 +instance = comp, \main_memory|altsyncram_component|auto_generated|ram_block1a29 , main_memory|altsyncram_component|auto_generated|ram_block1a29, super6502, 1 +instance = comp, \main_memory|altsyncram_component|auto_generated|mux2|result_node[5]~28 , main_memory|altsyncram_component|auto_generated|mux2|result_node[5]~28, super6502, 1 +instance = comp, \main_memory|altsyncram_component|auto_generated|mux2|result_node[5]~25 , main_memory|altsyncram_component|auto_generated|mux2|result_node[5]~25, super6502, 1 +instance = comp, \main_memory|altsyncram_component|auto_generated|mux2|result_node[5]~26 , main_memory|altsyncram_component|auto_generated|mux2|result_node[5]~26, super6502, 1 +instance = comp, \main_memory|altsyncram_component|auto_generated|mux2|result_node[5]~29 , main_memory|altsyncram_component|auto_generated|mux2|result_node[5]~29, super6502, 1 instance = comp, \cpu_data[6]~input , cpu_data[6]~input, super6502, 1 -instance = comp, \main_memory|altsyncram_component|auto_generated|ram_block1a22 , main_memory|altsyncram_component|auto_generated|ram_block1a22, super6502, 1 instance = comp, \main_memory|altsyncram_component|auto_generated|ram_block1a6 , main_memory|altsyncram_component|auto_generated|ram_block1a6, super6502, 1 -instance = comp, \main_memory|altsyncram_component|auto_generated|mux2|result_node[6]~12 , main_memory|altsyncram_component|auto_generated|mux2|result_node[6]~12, super6502, 1 +instance = comp, \main_memory|altsyncram_component|auto_generated|ram_block1a22 , main_memory|altsyncram_component|auto_generated|ram_block1a22, super6502, 1 +instance = comp, \main_memory|altsyncram_component|auto_generated|mux2|result_node[6]~32 , main_memory|altsyncram_component|auto_generated|mux2|result_node[6]~32, super6502, 1 instance = comp, \main_memory|altsyncram_component|auto_generated|ram_block1a14 , main_memory|altsyncram_component|auto_generated|ram_block1a14, super6502, 1 instance = comp, \main_memory|altsyncram_component|auto_generated|ram_block1a30 , main_memory|altsyncram_component|auto_generated|ram_block1a30, super6502, 1 -instance = comp, \main_memory|altsyncram_component|auto_generated|mux2|result_node[6]~13 , main_memory|altsyncram_component|auto_generated|mux2|result_node[6]~13, super6502, 1 +instance = comp, \main_memory|altsyncram_component|auto_generated|mux2|result_node[6]~33 , main_memory|altsyncram_component|auto_generated|mux2|result_node[6]~33, super6502, 1 +instance = comp, \main_memory|altsyncram_component|auto_generated|mux2|result_node[6]~30 , main_memory|altsyncram_component|auto_generated|mux2|result_node[6]~30, super6502, 1 +instance = comp, \main_memory|altsyncram_component|auto_generated|mux2|result_node[6]~31 , main_memory|altsyncram_component|auto_generated|mux2|result_node[6]~31, super6502, 1 +instance = comp, \main_memory|altsyncram_component|auto_generated|mux2|result_node[6]~34 , main_memory|altsyncram_component|auto_generated|mux2|result_node[6]~34, super6502, 1 instance = comp, \cpu_data[7]~input , cpu_data[7]~input, super6502, 1 -instance = comp, \main_memory|altsyncram_component|auto_generated|ram_block1a7 , main_memory|altsyncram_component|auto_generated|ram_block1a7, super6502, 1 -instance = comp, \main_memory|altsyncram_component|auto_generated|ram_block1a15 , main_memory|altsyncram_component|auto_generated|ram_block1a15, super6502, 1 -instance = comp, \main_memory|altsyncram_component|auto_generated|mux2|result_node[7]~14 , main_memory|altsyncram_component|auto_generated|mux2|result_node[7]~14, super6502, 1 -instance = comp, \main_memory|altsyncram_component|auto_generated|ram_block1a23 , main_memory|altsyncram_component|auto_generated|ram_block1a23, super6502, 1 instance = comp, \main_memory|altsyncram_component|auto_generated|ram_block1a31 , main_memory|altsyncram_component|auto_generated|ram_block1a31, super6502, 1 -instance = comp, \main_memory|altsyncram_component|auto_generated|mux2|result_node[7]~15 , main_memory|altsyncram_component|auto_generated|mux2|result_node[7]~15, super6502, 1 -instance = comp, \clk_count[1]~1 , clk_count[1]~1, super6502, 1 -instance = comp, \clk_count[1] , clk_count[1], super6502, 1 +instance = comp, \main_memory|altsyncram_component|auto_generated|ram_block1a23 , main_memory|altsyncram_component|auto_generated|ram_block1a23, super6502, 1 +instance = comp, \main_memory|altsyncram_component|auto_generated|ram_block1a7 , main_memory|altsyncram_component|auto_generated|ram_block1a7, super6502, 1 +instance = comp, \main_memory|altsyncram_component|auto_generated|mux2|result_node[7]~37 , main_memory|altsyncram_component|auto_generated|mux2|result_node[7]~37, super6502, 1 +instance = comp, \main_memory|altsyncram_component|auto_generated|ram_block1a15 , main_memory|altsyncram_component|auto_generated|ram_block1a15, super6502, 1 +instance = comp, \main_memory|altsyncram_component|auto_generated|mux2|result_node[7]~38 , main_memory|altsyncram_component|auto_generated|mux2|result_node[7]~38, super6502, 1 +instance = comp, \main_memory|altsyncram_component|auto_generated|mux2|result_node[7]~35 , main_memory|altsyncram_component|auto_generated|mux2|result_node[7]~35, super6502, 1 +instance = comp, \main_memory|altsyncram_component|auto_generated|mux2|result_node[7]~36 , main_memory|altsyncram_component|auto_generated|mux2|result_node[7]~36, super6502, 1 +instance = comp, \main_memory|altsyncram_component|auto_generated|mux2|result_node[7]~39 , main_memory|altsyncram_component|auto_generated|mux2|result_node[7]~39, super6502, 1 instance = comp, \clk_count~2 , clk_count~2, super6502, 1 instance = comp, \clk_count[2] , clk_count[2], super6502, 1 instance = comp, \clk_count~0 , clk_count~0, super6502, 1 instance = comp, \clk_count[0] , clk_count[0], super6502, 1 +instance = comp, \clk_count[1]~1 , clk_count[1]~1, super6502, 1 +instance = comp, \clk_count[1] , clk_count[1], super6502, 1 instance = comp, \cpu_phi2~0 , cpu_phi2~0, super6502, 1 instance = comp, \cpu_phi2~reg0 , cpu_phi2~reg0, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][6] , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][6], super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][7] , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|irf_reg[1][7], super6502, 1 +instance = comp, \auto_hub|~GND , auto_hub|~GND, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|clr_reg~_wirecell , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|clr_reg~_wirecell, super6502, 1 +instance = comp, \auto_hub|instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[0]~_wirecell , auto_hub|\instrumentation_fabric_with_node_gen:fabric_gen_new_way:with_jtag_input_gen:instrumentation_fabric|instrumentation_fabric|alt_sld_fab|sldfabric|\jtag_hub_gen:real_sld_jtag_hub|shadow_jsm|state[0]~_wirecell, super6502, 1 instance = comp, \rst~input , rst~input, super6502, 1 -instance = comp, \cpu_addr[15]~input , cpu_addr[15]~input, super6502, 1 instance = comp, \cpu_vpb~input , cpu_vpb~input, super6502, 1 instance = comp, \cpu_mlb~input , cpu_mlb~input, super6502, 1 instance = comp, \cpu_sync~input , cpu_sync~input, super6502, 1 instance = comp, \~QUARTUS_CREATED_UNVM~ , ~QUARTUS_CREATED_UNVM~, super6502, 1 +instance = comp, \~ALTERA_CONFIG_SEL~~ibuf , ~ALTERA_CONFIG_SEL~~ibuf, super6502, 1 +instance = comp, \~ALTERA_nCONFIG~~ibuf , ~ALTERA_nCONFIG~~ibuf, super6502, 1 +instance = comp, \~ALTERA_nSTATUS~~ibuf , ~ALTERA_nSTATUS~~ibuf, super6502, 1 +instance = comp, \~ALTERA_CONF_DONE~~ibuf , ~ALTERA_CONF_DONE~~ibuf, super6502, 1 instance = comp, \~QUARTUS_CREATED_ADC1~ , ~QUARTUS_CREATED_ADC1~, super6502, 1 instance = comp, \~QUARTUS_CREATED_ADC2~ , ~QUARTUS_CREATED_ADC2~, super6502, 1 -design_name = hard_block -instance = comp, \~ALTERA_TMS~~ibuf , ~ALTERA_TMS~~ibuf, hard_block, 1 -instance = comp, \~ALTERA_TCK~~ibuf , ~ALTERA_TCK~~ibuf, hard_block, 1 -instance = comp, \~ALTERA_TDI~~ibuf , ~ALTERA_TDI~~ibuf, hard_block, 1 -instance = comp, \~ALTERA_CONFIG_SEL~~ibuf , ~ALTERA_CONFIG_SEL~~ibuf, hard_block, 1 -instance = comp, \~ALTERA_nCONFIG~~ibuf , ~ALTERA_nCONFIG~~ibuf, hard_block, 1 -instance = comp, \~ALTERA_nSTATUS~~ibuf , ~ALTERA_nSTATUS~~ibuf, hard_block, 1 -instance = comp, \~ALTERA_CONF_DONE~~ibuf , ~ALTERA_CONF_DONE~~ibuf, hard_block, 1 diff --git a/hw/fpga/super6502.qsf b/hw/fpga/super6502.qsf index 7e72706..0b6c5b5 100644 --- a/hw/fpga/super6502.qsf +++ b/hw/fpga/super6502.qsf @@ -93,4 +93,5 @@ set_location_assignment PIN_P11 -to clk set_location_assignment PIN_B8 -to rst set_global_assignment -name QIP_FILE ram.qip set_global_assignment -name SDC_FILE super6502.sdc +set_global_assignment -name QIP_FILE rom.qip set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top \ No newline at end of file diff --git a/hw/fpga/super6502.sv b/hw/fpga/super6502.sv index 63a05ba..decb7a9 100644 --- a/hw/fpga/super6502.sv +++ b/hw/fpga/super6502.sv @@ -38,13 +38,31 @@ always_ff @(posedge clk) begin end end +always_comb begin + if (ram_cs) + cpu_data_out = ram_data_out; + else + cpu_data_out = rom_data_out; +end + +logic [7:0] ram_data_out; +logic ram_cs; +assign ram_cs = ~cpu_addr[15]; ram main_memory( .address(cpu_addr[14:0]), .clock(clk), .data(cpu_data_in), - .wren(~cpu_rwb), - .q(cpu_data_out) + .wren(~cpu_rwb & ram_cs), + .q(ram_data_out) +); + + +logic [7:0] rom_data_out; +rom boot_rom( + .address(cpu_addr[14:0]), + .clock(clk), + .q(rom_data_out) );