Add fpga ci

.gitlab-ci.yml

@@ -1,3 +1,7 @@
 sw:
   trigger:
     include: sw/.gitlab-ci.yml
+
+fpga:
+  trigger:
+    include: sw/fpga/.gitlab-ci.yml

hw/fpga/.gitlab-ci.yml

@@ -0,0 +1,9 @@
+default:
+  image: bslathi19/modelsim_18.1:lite
+  tags:
+    - docker
+
+build1:
+  stage: build
+  script: quartus_map super6502 -c super6502
+