From e73c4e1d084675ef117b65915d604c6c4f354005 Mon Sep 17 00:00:00 2001 From: Byron Lathi Date: Tue, 8 Aug 2023 19:28:10 -0700 Subject: [PATCH] Rewrite readblock in assembly --- hw/efinix_fpga/debug_profile.wizard.json | 296 +++++++++----- hw/efinix_fpga/init_hex.mem | 490 +++++++++++------------ hw/efinix_fpga/super6502.xml | 4 +- sw/bios/devices/sd_card.c | 82 ++-- sw/bios/devices/sd_card_asm.s | 117 +++++- sw/bios/devices/sd_print.c | 162 -------- sw/bios/main.c | 15 +- 7 files changed, 606 insertions(+), 560 deletions(-) diff --git a/hw/efinix_fpga/debug_profile.wizard.json b/hw/efinix_fpga/debug_profile.wizard.json index f161bb2..488d3a3 100644 --- a/hw/efinix_fpga/debug_profile.wizard.json +++ b/hw/efinix_fpga/debug_profile.wizard.json @@ -3,7 +3,7 @@ { "name": "la0", "type": "la", - "uuid": "fc5ad0b7db9846e2b64719110e7975d8", + "uuid": "3116afbb3c1645178391686859e56041", "trigin_en": false, "trigout_en": false, "auto_inserted": true, @@ -21,48 +21,43 @@ "width": 1, "probe_type": 1 }, - { - "name": "cpu_sync", - "width": 1, - "probe_type": 1 - }, - { - "name": "cpu_resb", - "width": 1, - "probe_type": 1 - }, { "name": "cpu_addr", "width": 16, "probe_type": 1 }, { - "name": "cpu_phi2", + "name": "cpu_sync", "width": 1, "probe_type": 1 }, { - "name": "spi_clk", + "name": "cpu_rdy", "width": 1, "probe_type": 1 }, { - "name": "spi_mosi", + "name": "spi_controller/r_input_data", + "width": 8, + "probe_type": 1 + }, + { + "name": "spi_controller/r_output_data", + "width": 8, + "probe_type": 1 + }, + { + "name": "spi_controller/o_spi_clk", "width": 1, "probe_type": 1 }, { - "name": "sd_cs", + "name": "spi_controller/o_spi_mosi", "width": 1, "probe_type": 1 }, { - "name": "spi_miso", - "width": 1, - "probe_type": 1 - }, - { - "name": "spi_controller/active", + "name": "spi_controller/i_spi_miso", "width": 1, "probe_type": 1 } @@ -192,7 +187,7 @@ }, { "name": "la0_clk", - "net": "clk_50", + "net": "clk_2", "path": [] }, { @@ -241,123 +236,224 @@ "path": [] }, { - "name": "la0_probe2", - "net": "cpu_sync", - "path": [] - }, - { - "name": "la0_probe3", - "net": "cpu_resb", - "path": [] - }, - { - "name": "la0_probe4[0]", + "name": "la0_probe2[0]", "net": "cpu_addr[0]", "path": [] }, { - "name": "la0_probe4[1]", + "name": "la0_probe2[1]", "net": "cpu_addr[1]", "path": [] }, { - "name": "la0_probe4[2]", + "name": "la0_probe2[2]", "net": "cpu_addr[2]", "path": [] }, { - "name": "la0_probe4[3]", + "name": "la0_probe2[3]", "net": "cpu_addr[3]", "path": [] }, { - "name": "la0_probe4[4]", + "name": "la0_probe2[4]", "net": "cpu_addr[4]", "path": [] }, { - "name": "la0_probe4[5]", + "name": "la0_probe2[5]", "net": "cpu_addr[5]", "path": [] }, { - "name": "la0_probe4[6]", + "name": "la0_probe2[6]", "net": "cpu_addr[6]", "path": [] }, { - "name": "la0_probe4[7]", + "name": "la0_probe2[7]", "net": "cpu_addr[7]", "path": [] }, { - "name": "la0_probe4[8]", + "name": "la0_probe2[8]", "net": "cpu_addr[8]", "path": [] }, { - "name": "la0_probe4[9]", + "name": "la0_probe2[9]", "net": "cpu_addr[9]", "path": [] }, { - "name": "la0_probe4[10]", + "name": "la0_probe2[10]", "net": "cpu_addr[10]", "path": [] }, { - "name": "la0_probe4[11]", + "name": "la0_probe2[11]", "net": "cpu_addr[11]", "path": [] }, { - "name": "la0_probe4[12]", + "name": "la0_probe2[12]", "net": "cpu_addr[12]", "path": [] }, { - "name": "la0_probe4[13]", + "name": "la0_probe2[13]", "net": "cpu_addr[13]", "path": [] }, { - "name": "la0_probe4[14]", + "name": "la0_probe2[14]", "net": "cpu_addr[14]", "path": [] }, { - "name": "la0_probe4[15]", + "name": "la0_probe2[15]", "net": "cpu_addr[15]", "path": [] }, { - "name": "la0_probe5", - "net": "cpu_phi2", + "name": "la0_probe3", + "net": "cpu_sync", "path": [] }, { - "name": "la0_probe6", - "net": "spi_clk", + "name": "la0_probe4", + "net": "cpu_rdy", "path": [] }, + { + "name": "la0_probe5[0]", + "net": "r_input_data[0]", + "path": [ + "spi_controller" + ] + }, + { + "name": "la0_probe5[1]", + "net": "r_input_data[1]", + "path": [ + "spi_controller" + ] + }, + { + "name": "la0_probe5[2]", + "net": "r_input_data[2]", + "path": [ + "spi_controller" + ] + }, + { + "name": "la0_probe5[3]", + "net": "r_input_data[3]", + "path": [ + "spi_controller" + ] + }, + { + "name": "la0_probe5[4]", + "net": "r_input_data[4]", + "path": [ + "spi_controller" + ] + }, + { + "name": "la0_probe5[5]", + "net": "r_input_data[5]", + "path": [ + "spi_controller" + ] + }, + { + "name": "la0_probe5[6]", + "net": "r_input_data[6]", + "path": [ + "spi_controller" + ] + }, + { + "name": "la0_probe5[7]", + "net": "r_input_data[7]", + "path": [ + "spi_controller" + ] + }, + { + "name": "la0_probe6[0]", + "net": "r_output_data[0]", + "path": [ + "spi_controller" + ] + }, + { + "name": "la0_probe6[1]", + "net": "r_output_data[1]", + "path": [ + "spi_controller" + ] + }, + { + "name": "la0_probe6[2]", + "net": "r_output_data[2]", + "path": [ + "spi_controller" + ] + }, + { + "name": "la0_probe6[3]", + "net": "r_output_data[3]", + "path": [ + "spi_controller" + ] + }, + { + "name": "la0_probe6[4]", + "net": "r_output_data[4]", + "path": [ + "spi_controller" + ] + }, + { + "name": "la0_probe6[5]", + "net": "r_output_data[5]", + "path": [ + "spi_controller" + ] + }, + { + "name": "la0_probe6[6]", + "net": "r_output_data[6]", + "path": [ + "spi_controller" + ] + }, + { + "name": "la0_probe6[7]", + "net": "r_output_data[7]", + "path": [ + "spi_controller" + ] + }, { "name": "la0_probe7", - "net": "spi_mosi", - "path": [] + "net": "o_spi_clk", + "path": [ + "spi_controller" + ] }, { "name": "la0_probe8", - "net": "sd_cs", - "path": [] + "net": "o_spi_mosi", + "path": [ + "spi_controller" + ] }, { "name": "la0_probe9", - "net": "spi_miso", - "path": [] - }, - { - "name": "la0_probe10", - "net": "active", + "net": "i_spi_miso", "path": [ "spi_controller" ] @@ -380,7 +476,7 @@ { "name": "cpu_data_in", "width": 8, - "clk_domain": "clk_50", + "clk_domain": "clk_2", "selected_probe_type": "DATA AND TRIGGER", "child": [], "path": [], @@ -390,23 +486,7 @@ { "name": "cpu_rwb", "width": 1, - "clk_domain": "clk_50", - "selected_probe_type": "DATA AND TRIGGER", - "child": [], - "path": [] - }, - { - "name": "cpu_sync", - "width": 1, - "clk_domain": "clk_50", - "selected_probe_type": "DATA AND TRIGGER", - "child": [], - "path": [] - }, - { - "name": "cpu_resb", - "width": 1, - "clk_domain": "clk_50", + "clk_domain": "clk_2", "selected_probe_type": "DATA AND TRIGGER", "child": [], "path": [] @@ -414,7 +494,7 @@ { "name": "cpu_addr", "width": 16, - "clk_domain": "clk_50", + "clk_domain": "clk_2", "selected_probe_type": "DATA AND TRIGGER", "child": [], "path": [], @@ -422,49 +502,69 @@ "net_idx_right": 0 }, { - "name": "cpu_phi2", + "name": "cpu_sync", "width": 1, - "clk_domain": "clk_50", + "clk_domain": "clk_2", "selected_probe_type": "DATA AND TRIGGER", "child": [], "path": [] }, { - "name": "spi_clk", + "name": "cpu_rdy", "width": 1, - "clk_domain": "clk_50", + "clk_domain": "clk_2", "selected_probe_type": "DATA AND TRIGGER", "child": [], "path": [] }, { - "name": "spi_mosi", - "width": 1, - "clk_domain": "clk_50", + "name": "r_input_data", + "width": 8, + "clk_domain": "clk_2", "selected_probe_type": "DATA AND TRIGGER", "child": [], - "path": [] + "path": [ + "spi_controller" + ], + "net_idx_left": 7, + "net_idx_right": 0 }, { - "name": "sd_cs", - "width": 1, - "clk_domain": "clk_50", + "name": "r_output_data", + "width": 8, + "clk_domain": "clk_2", "selected_probe_type": "DATA AND TRIGGER", "child": [], - "path": [] + "path": [ + "spi_controller" + ], + "net_idx_left": 7, + "net_idx_right": 0 }, { - "name": "spi_miso", + "name": "o_spi_clk", "width": 1, - "clk_domain": "clk_50", + "clk_domain": "clk_2", "selected_probe_type": "DATA AND TRIGGER", "child": [], - "path": [] + "path": [ + "spi_controller" + ] }, { - "name": "active", + "name": "o_spi_mosi", "width": 1, - "clk_domain": "clk_50", + "clk_domain": "clk_2", + "selected_probe_type": "DATA AND TRIGGER", + "child": [], + "path": [ + "spi_controller" + ] + }, + { + "name": "i_spi_miso", + "width": 1, + "clk_domain": "clk_2", "selected_probe_type": "DATA AND TRIGGER", "child": [], "path": [ diff --git a/hw/efinix_fpga/init_hex.mem b/hw/efinix_fpga/init_hex.mem index 61a5629..f306417 100644 --- a/hw/efinix_fpga/init_hex.mem +++ b/hw/efinix_fpga/init_hex.mem @@ -1,253 +1,253 @@ @00000000 00 80 4C 00 00 8D 13 02 8E 14 02 8D 1A 02 8E 1B 02 88 B9 FF FF 8D 24 02 88 B9 FF FF 8D 23 02 8C -26 02 20 FF FF A0 FF D0 E8 60 00 00 0B FE 00 00 -00 00 A2 FF 9A D8 A9 00 85 00 A9 80 85 01 20 83 -FE 20 3F FB 20 52 F0 58 20 CC F1 6C FC FF 20 33 -FB 00 A0 00 F0 07 A9 52 A2 F0 4C 05 02 60 AD FF -EF A2 00 60 8D FF EF 60 20 B2 F1 C9 0A D0 05 A9 -0D 20 B2 F1 60 DA 5A A8 B2 00 AA A9 1B 20 B2 F1 -A9 5B 20 B2 F1 98 20 B2 F1 A9 3B 20 B2 F1 8A 20 -B2 F1 A9 48 20 B2 F1 7A FA 60 DA A9 1B 20 B2 F1 -A9 63 20 B2 F1 68 60 40 DA BA 48 E8 E8 BD 00 01 -29 10 D0 06 68 FA 20 CB F1 40 68 FA 7C BF F0 C5 +26 02 20 FF FF A0 FF D0 E8 60 00 00 70 FD 00 00 +00 00 A2 FF 9A D8 A9 00 85 00 A9 80 85 01 20 E8 +FD 20 BA FA 20 52 F0 58 20 69 F2 6C FC FF 20 AE +FA 00 A0 00 F0 07 A9 52 A2 F0 4C 05 02 60 AD FF +EF A2 00 60 8D FF EF 60 20 4F F2 C9 0A D0 05 A9 +0D 20 4F F2 60 DA 5A A8 B2 00 AA A9 1B 20 4F F2 +A9 5B 20 4F F2 98 20 4F F2 A9 3B 20 4F F2 8A 20 +4F F2 A9 48 20 4F F2 7A FA 60 DA A9 1B 20 4F F2 +A9 63 20 4F F2 68 60 40 DA BA 48 E8 E8 BD 00 01 +29 10 D0 06 68 FA 20 68 F2 40 68 FA 7C BF F0 C5 F0 C9 F0 CA F0 20 9A F0 40 40 20 68 F0 40 48 A0 -04 B1 00 09 40 20 A2 F1 88 B1 00 20 A2 F1 88 10 -F8 68 09 01 20 A2 F1 20 2F FC 60 A2 08 A9 FF 20 -A2 F1 C9 FF D0 03 CA D0 F4 60 85 08 86 09 20 EB -F0 92 08 A9 FF 20 A2 F1 A0 01 91 08 20 1C FC 60 -AA 20 6A FD A9 FF 20 A2 F1 92 08 E6 08 D0 02 E6 +04 B1 00 09 40 20 3F F2 88 B1 00 20 3F F2 88 10 +F8 68 09 01 20 3F F2 20 AA FB 60 A2 08 A9 FF 20 +3F F2 C9 FF D0 03 CA D0 F4 60 85 08 86 09 20 EB +F0 92 08 A9 FF 20 3F F2 A0 01 91 08 20 97 FB 60 +AA 20 E5 FC A9 FF 20 3F F2 92 08 E6 08 D0 02 E6 09 CA D0 F0 60 85 08 86 09 20 EB F0 C9 02 B0 12 -E6 08 D0 02 E6 08 A5 08 A6 09 20 97 FD A9 04 20 -10 F1 60 48 A9 FF 20 A2 F1 A9 00 20 96 F1 A9 FF -20 A2 F1 68 20 CE F0 20 EB F0 A8 A9 FF 20 A2 F1 -A9 00 20 9C F1 A9 FF 20 A2 F1 98 A2 00 60 A9 00 -20 9C F1 20 8B F1 A9 FF 20 A2 F1 A9 00 20 9C F1 -A2 50 A9 FF 20 A2 F1 CA D0 F8 60 A2 01 A9 C8 3A -D0 FD CA D0 F8 60 A9 01 8D DB EF 60 9C DB EF 60 -A9 00 8D DA EF AD DB EF 30 FB AD D9 EF 60 8D E6 -EF 60 48 8D E6 EF AD E7 EF 89 02 D0 F9 68 60 AD -E6 EF A2 00 60 AD E7 EF A2 00 60 60 20 FA FB A2 -00 86 02 86 03 A9 00 20 91 FC 20 E0 FB A9 EA A2 -FE 20 A0 FB 20 93 F2 C9 00 20 3E FD D0 03 4C FB -F1 A9 E2 A2 FE 20 A0 FB 4C 87 F2 A9 D8 A2 FE 20 -A0 FB A9 A6 A2 FE 20 A0 FB A0 05 20 4D FC 20 91 -FC AD 00 02 AE 01 02 20 97 FD A9 0C 20 5E FC 20 -80 F5 A0 07 91 00 A9 CA A2 FE 20 A0 FB A0 07 A2 -00 B1 00 C9 00 20 44 FD D0 03 4C 4D F2 A0 06 A2 -00 B1 00 C9 FE 20 44 FD F0 03 4C 56 F2 A2 00 A9 -00 D0 03 4C 5A F2 A2 00 A9 01 D0 03 4C 6B F2 AD -00 02 AE 01 02 20 C1 F6 4C 84 F2 A0 06 A2 00 B1 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71 00 91 00 A0 01 A2 00 B1 00 -C9 00 20 3E FD D0 81 A2 00 A9 00 A0 06 20 C5 FD -A0 07 20 44 FC E0 03 D0 02 C9 E8 20 5D FD F0 03 -4C E6 F3 4C F2 F3 A0 06 A2 00 A9 01 20 FB FA 4C -D0 F3 A9 01 20 5E FC 20 CA F4 A2 00 A9 00 4C 01 -F4 20 34 FC 60 A2 00 A9 00 20 81 FD A2 00 86 02 -86 03 A9 00 20 91 FC A2 00 A9 94 20 43 F1 4C 21 -F4 60 20 97 FD A2 00 A9 FF 20 A2 F1 A2 00 A9 00 -20 96 F1 A2 00 A9 FF 20 A2 F1 A2 00 A9 08 20 81 -FD A2 01 A9 00 85 02 A9 00 85 03 A9 AA 20 91 FC -A2 00 A9 86 20 CE F0 A0 01 20 44 FC 20 25 F1 A2 -00 A9 FF 20 A2 F1 A2 00 A9 00 20 9C F1 A2 00 A9 -FF 20 A2 F1 20 1C FC 60 20 97 FD A2 00 A9 FF 20 -A2 F1 A2 00 A9 00 20 96 F1 A2 00 A9 FF 20 A2 F1 -A2 00 A9 0D 20 81 FD A2 00 86 02 86 03 A9 00 20 -91 FC A2 00 A9 00 20 CE F0 A0 01 20 44 FC 20 FA -F0 A2 00 A9 FF 20 A2 F1 A2 00 A9 00 20 9C F1 A2 -00 A9 FF 20 A2 F1 20 1C FC 60 20 97 FD 20 D7 FB -A2 00 A9 FF 20 A2 F1 A2 00 A9 00 20 96 F1 A2 00 -A9 FF 20 A2 F1 A0 00 91 00 A0 00 A2 00 B1 00 C9 -FF 20 3E FD D0 03 4C 0A F5 4C FC F4 A2 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FD A2 00 A9 FF 48 A0 0A A2 00 A9 01 20 -FB FA 68 20 A2 F1 A0 00 20 AD FD A0 00 A2 00 A9 -01 20 FB FA 4C 2A F6 A2 00 A9 FF 20 A2 F1 A2 00 -A9 FF 20 A2 F1 A0 07 20 44 FC 20 97 FD A0 06 A2 -00 B1 00 A0 00 20 AD FD A2 00 A9 FF 20 A2 F1 A2 -00 A9 00 20 9C F1 A2 00 A9 FF 20 A2 F1 A0 05 A2 -00 B1 00 4C A6 F6 A0 0E 20 0B FB 60 20 97 FD 20 -FA FB A0 03 A2 00 B1 00 4C BB F6 A0 0E 20 0B FB -60 20 97 FD A9 00 20 81 FD 20 E0 FB A2 00 A9 00 -A0 00 20 C5 FD A0 01 20 44 FC E0 02 20 5D FD F0 -03 4C E7 F6 4C 49 F7 A9 16 A2 FF 20 97 FD A0 06 -20 44 FC A0 00 20 39 FC 20 97 FD A0 07 A2 00 A9 -01 20 FB FA A0 04 20 6C FB A0 02 A2 00 B1 00 C9 -1F 20 44 FD D0 03 4C 2B F7 A9 1A A2 FF 20 A0 FB -A2 00 A9 00 A0 02 91 00 4C 3D F7 A2 00 A9 20 20 -68 F0 A0 02 A2 00 18 A9 01 71 00 91 00 A0 00 A2 -00 A9 01 20 FB FA 4C D5 F6 A9 1A A2 FF 20 A0 FB -20 2F FC 60 A0 00 B1 16 E6 16 D0 02 E6 17 60 AD -3D 02 8D 38 02 20 00 F8 A9 38 A2 02 20 97 FD 20 -78 FD 4C 02 02 A5 14 38 E9 02 85 14 B0 02 C6 15 -60 AD 42 02 D0 11 20 9E F7 4C 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00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 diff --git a/hw/efinix_fpga/super6502.xml b/hw/efinix_fpga/super6502.xml index 1c9b7d7..6bb6682 100644 --- a/hw/efinix_fpga/super6502.xml +++ b/hw/efinix_fpga/super6502.xml @@ -1,5 +1,5 @@ - + @@ -100,7 +100,7 @@ - + diff --git a/sw/bios/devices/sd_card.c b/sw/bios/devices/sd_card.c index 22d4f54..8eaf708 100644 --- a/sw/bios/devices/sd_card.c +++ b/sw/bios/devices/sd_card.c @@ -276,56 +276,58 @@ void SD_sendStatus(uint8_t *res) token = 0x0X - Data error token = 0xFF - timeout *******************************************************************************/ -uint8_t SD_readSingleBlock(uint32_t addr, uint8_t *buf, uint8_t *token) -{ - uint8_t res1, read; - uint16_t readAttempts; - uint16_t i; +// uint8_t SD_readSingleBlock(uint32_t addr, uint8_t *buf, uint8_t *token) +// { +// uint8_t res1, read; +// uint16_t readAttempts; +// uint16_t i; - // set token to none - *token = 0xFF; +// // set token to none +// *token = 0xFF; - // assert chip select - spi_exchange(0xFF); - spi_select(0); - spi_exchange(0xFF); +// // assert chip select +// spi_exchange(0xFF); +// spi_select(0); +// spi_exchange(0xFF); - // send CMD17 - SD_command(CMD17, addr, CMD17_CRC); +// // send CMD17 +// SD_command(CMD17, addr, CMD17_CRC); - // read R1 - res1 = SD_readRes1(); +// // read R1 +// res1 = SD_readRes1(); - // if response received from card - if(res1 != 0xFF) - { - // wait for a response token (timeout = 100ms) - readAttempts = 0; - while(++readAttempts != SD_MAX_READ_ATTEMPTS) - if((read = spi_exchange(0xFF)) != 0xFF) break; +// // if response received from card +// if(res1 != 0xFF) +// { +// // wait for a response token (timeout = 100ms) +// readAttempts = 0; +// while(++readAttempts != SD_MAX_READ_ATTEMPTS) +// if((read = spi_exchange(0xFF)) != 0xFF) break; - // if response token is 0xFE - if(read == SD_START_TOKEN) - { - // read 512 byte block - for(i = 0; i < SD_BLOCK_LEN; i++) *buf++ = spi_exchange(0xFF); +// cprintf("read attempts: %d\r\n", readAttempts); - // read 16-bit CRC - spi_exchange(0xFF); - spi_exchange(0xFF); - } +// // if response token is 0xFE +// if(read == SD_START_TOKEN) +// { +// // read 512 byte block +// for(i = 0; i < SD_BLOCK_LEN; i++) *buf++ = spi_exchange(0xFF); - // set token to card response - *token = read; - } +// // read 16-bit CRC +// spi_exchange(0xFF); +// spi_exchange(0xFF); +// } - // deassert chip select - spi_exchange(0xFF); - spi_deselect(0); - spi_exchange(0xFF); +// // set token to card response +// *token = read; +// } - return res1; -} +// // deassert chip select +// spi_exchange(0xFF); +// spi_deselect(0); +// spi_exchange(0xFF); + +// return res1; +// } #define SD_MAX_WRITE_ATTEMPTS 3907 diff --git a/sw/bios/devices/sd_card_asm.s b/sw/bios/devices/sd_card_asm.s index 019286e..06e2142 100644 --- a/sw/bios/devices/sd_card_asm.s +++ b/sw/bios/devices/sd_card_asm.s @@ -6,8 +6,9 @@ .export _SD_readBytes .export _SD_powerUpSeq .export _res1_cmd +.export _SD_readSingleBlock -.importzp sp, ptr1 +.importzp sp, ptr1, ptr2, ptr3, ptr4, tmp1, tmp2, tmp3 .autoimport on @@ -27,7 +28,7 @@ dey arg_loop: ; send ARG - lda (sp),y + lda (sp),y ; is this sending only 3? jsr _spi_exchange dey bpl arg_loop @@ -187,4 +188,116 @@ read: dex ; 2 bne @L1 ; 3 rts +.endproc + +; ;uint8_t SD_readSingleBlock(uint32_t addr, uint8_t *buf, uint8_t *token) +.proc _SD_readSingleBlock: near + ; token address in a/x + ; buf address next on stack + ; sd address above that + + ; ptr2 = *token + sta ptr2 + stx ptr2 + 1 + + lda #$ff + sta (ptr2) + + ; ptr1 = *buf + jsr popptr1 + + ; 4 bytes on stack are addr + + ; Move addr down on the stack + lda sp + sta ptr3 + lda sp + 1 + sta ptr3 + 1 + + ; find a way to do this in a loop? + jsr decsp1 + ldy #$0 + lda (ptr3),y + sta (sp),y + iny + lda (ptr3),y + sta (sp),y + iny + lda (ptr3),y + sta (sp),y + iny + lda (ptr3),y + sta (sp),y + + lda #$ff + jsr _spi_exchange + lda #$00 ; this gets ignored anyway + jsr _spi_select + lda #$ff + jsr _spi_exchange + + ; push cmd17 + lda #$11 + ldy #$4 + sta (sp),y + + ; crc, 0 + lda #$00 + jsr _SD_command ; rely on command to teardown stack + + jsr _SD_readRes1 + + cmp #$ff ; if 0xFF then you failed + beq end + sta tmp3 ; tmp3 = read + + ; y = read_attempts + ldy #$0 +resp_loop: + lda #$ff + jsr _spi_exchange + sta tmp2 ; tmp2 = read + lda tmp2 + cmp #$ff + bne got_resp + iny + bne resp_loop + bra after_read + +got_resp: + ldx #$2 + ldy #$00 +load_loop: + lda #$ff + jsr _spi_exchange + sta (ptr1) + inc ptr1 + bne @2 + inc ptr1 + 1 +@2: dey + bne load_loop + ldy #$00 + dex + bne load_loop + lda #$ff + jsr _spi_exchange + lda #$ff + jsr _spi_exchange + +after_read: + lda tmp2 + sta (ptr2) + lda tmp3 + +end: + pha + lda #$ff + jsr _spi_exchange + lda #$00 ; this gets ignored anyway + jsr _spi_deselect + lda #$ff + jsr _spi_exchange + pla + rts + .endproc \ No newline at end of file diff --git a/sw/bios/devices/sd_print.c b/sw/bios/devices/sd_print.c index 099b8fc..7e3d305 100644 --- a/sw/bios/devices/sd_print.c +++ b/sw/bios/devices/sd_print.c @@ -3,152 +3,6 @@ #include "sd_print.h" #include "sd_card.h" -/* -void SD_printR1(uint8_t res) -{ - if(res == 0xFF) - { cputs("\tNo response\r\n"); return; } - if(res & 0x80) - { cputs("\tError: MSB = 1\r\n"); return; } - if(res == 0) - { cputs("\tCard Ready\r\n"); return; } - if(PARAM_ERROR(res)) - cputs("\tParameter Error\r\n"); - if(ADDR_ERROR(res)) - cputs("\tAddress Error\r\n"); - if(ERASE_SEQ_ERROR(res)) - cputs("\tErase Sequence Error\r\n"); - if(CRC_ERROR(res)) - cputs("\tCRC Error\r\n"); - if(ILLEGAL_CMD(res)) - cputs("\tIllegal Command\r\n"); - if(ERASE_RESET(res)) - cputs("\tErase Reset Error\r\n"); - if(IN_IDLE(res)) - cputs("\tIn Idle State\r\n"); -} -*/ - -/* -void SD_printR2(uint8_t *res) -{ - SD_printR1(res[0]); - - if(res[0] == 0xFF) return; - - if(res[1] == 0x00) - cputs("\tNo R2 Error\r\n"); - if(OUT_OF_RANGE(res[1])) - cputs("\tOut of Range\r\n"); - if(ERASE_PARAM(res[1])) - cputs("\tErase Parameter\r\n"); - if(WP_VIOLATION(res[1])) - cputs("\tWP Violation\r\n"); - if(CARD_ECC_FAILED(res[1])) - cputs("\tECC Failed\r\n"); - if(CC_ERROR(res[1])) - cputs("\tCC Error\r\n"); - if(ERROR(res[1])) - cputs("\tError\r\n"); - if(WP_ERASE_SKIP(res[1])) - cputs("\tWP Erase Skip\r\n"); - if(CARD_LOCKED(res[1])) - cputs("\tCard Locked\r\n"); -} -*/ - -/* -void SD_printR3(uint8_t *res) -{ - SD_printR1(res[0]); - - if(res[0] > 1) return; - - cputs("\tCard Power Up Status: "); - if(POWER_UP_STATUS(res[1])) - { - cputs("READY\r\n"); - cputs("\tCCS Status: "); - if(CCS_VAL(res[1])){ cputs("1\r\n"); } - else cputs("0\r\n"); - } - else - { - cputs("BUSY\r\n"); - } - - cputs("\tVDD Window: "); - if(VDD_2728(res[3])) cputs("2.7-2.8, "); - if(VDD_2829(res[2])) cputs("2.8-2.9, "); - if(VDD_2930(res[2])) cputs("2.9-3.0, "); - if(VDD_3031(res[2])) cputs("3.0-3.1, "); - if(VDD_3132(res[2])) cputs("3.1-3.2, "); - if(VDD_3233(res[2])) cputs("3.2-3.3, "); - if(VDD_3334(res[2])) cputs("3.3-3.4, "); - if(VDD_3435(res[2])) cputs("3.4-3.5, "); - if(VDD_3536(res[2])) cputs("3.5-3.6"); - cputs("\r\n"); -} -*/ - -/* -void SD_printR7(uint8_t *res) -{ - SD_printR1(res[0]); - - if(res[0] > 1) return; - - cputs("\tCommand Version: "); - cprintf("%x", CMD_VER(res[1])); - cputs("\r\n"); - - cputs("\tVoltage Accepted: "); - if(VOL_ACC(res[3]) == VOLTAGE_ACC_27_33) { - cputs("2.7-3.6V\r\n"); - } else if(VOL_ACC(res[3]) == VOLTAGE_ACC_LOW) { - cputs("LOW VOLTAGE\r\n"); - } else if(VOL_ACC(res[3]) == VOLTAGE_ACC_RES1) { - cputs("RESERVED\r\n"); - } else if(VOL_ACC(res[3]) == VOLTAGE_ACC_RES2) { - cputs("RESERVED\r\n"); - } else { - cputs("NOT DEFINED\r\n"); - } - - cputs("\tEcho: "); - cprintf("%x", res[4]); - cputs("\r\n"); -} -*/ - -/* -void SD_printCSD(uint8_t *buf) -{ - cputs("CSD:\r\n"); - - cputs("\tCSD Structure: "); - cprintf("%x", (buf[0] & 0b11000000) >> 6); - cputs("\r\n"); - - cputs("\tTAAC: "); - cprintf("%x", buf[1]); - cputs("\r\n"); - - cputs("\tNSAC: "); - cprintf("%x", buf[2]); - cputs("\r\n"); - - cputs("\tTRAN_SPEED: "); - cprintf("%x", buf[3]); - cputs("\r\n"); - - cputs("\tDevice Size: "); - cprintf("%x", buf[7] & 0b00111111); - cprintf("%x", buf[8]); - cprintf("%x", buf[9]); - cputs("\r\n"); -} -*/ void SD_printBuf(uint8_t *buf) { @@ -170,19 +24,3 @@ void SD_printBuf(uint8_t *buf) } cputs("\r\n"); } - -/* -void SD_printDataErrToken(uint8_t token) -{ - if(token & 0xF0) - cputs("\tNot Error token\r\n"); - if(SD_TOKEN_OOR(token)) - cputs("\tData out of range\r\n"); - if(SD_TOKEN_CECC(token)) - cputs("\tCard ECC failed\r\n"); - if(SD_TOKEN_CC(token)) - cputs("\tCC Error\r\n"); - if(SD_TOKEN_ERROR(token)) - cputs("\tError\r\n"); -} -*/ \ No newline at end of file diff --git a/sw/bios/main.c b/sw/bios/main.c index e1c3455..75dff9f 100644 --- a/sw/bios/main.c +++ b/sw/bios/main.c @@ -31,24 +31,17 @@ int main() { { cputs("Success\r\n"); - // read sector 0 - cputs("\r\nReading sector: 0x"); - // ((uint8_t)(addr >> 24)); - // cprintf("%x", (uint8_t)(addr >> 16)); - // cprintf("%x", (uint8_t)(addr >> 8)); - // cprintf("%x", (uint8_t)addr); - res[0] = SD_readSingleBlock(addr, buf, &token); - cputs("\r\nResponse:\r\n"); - //SD_printR1(res[0]); + res[0] = SD_readSingleBlock(addr, buf, &token); // if no error, print buffer if((res[0] == 0x00) && (token == SD_START_TOKEN)) SD_printBuf(buf); //else if error token received, print else if(!(token & 0xF0)) { - cputs("Error token:\r\n"); - //SD_printDataErrToken(token); + cputs("Error\r\n"); + } else { + cprintf("bad token: %x\r\n", token); } __asm__ ("jmp (%v)", buf);