From e7defb717a5476319bb86bb926d820d550554442 Mon Sep 17 00:00:00 2001 From: Byron Lathi Date: Mon, 21 Mar 2022 14:20:07 -0500 Subject: [PATCH] Add board_io.sv to project --- hw/fpga/super6502.qsf | 1 + 1 file changed, 1 insertion(+) diff --git a/hw/fpga/super6502.qsf b/hw/fpga/super6502.qsf index e16caa9..09cd0fc 100644 --- a/hw/fpga/super6502.qsf +++ b/hw/fpga/super6502.qsf @@ -350,6 +350,7 @@ set_location_assignment PIN_V22 -to DRAM_LDQM set_location_assignment PIN_U22 -to DRAM_RAS_N set_location_assignment PIN_J21 -to DRAM_UDQM set_location_assignment PIN_V20 -to DRAM_WE_N +set_global_assignment -name SYSTEMVERILOG_FILE board_io.sv set_global_assignment -name SYSTEMVERILOG_FILE sdram.sv set_global_assignment -name QIP_FILE sdram_platform/synthesis/sdram_platform.qip set_global_assignment -name SYSTEMVERILOG_FILE uart.sv