diff --git a/.gitmodules b/.gitmodules
index c68e2a0..ef62624 100644
--- a/.gitmodules
+++ b/.gitmodules
@@ -7,9 +7,6 @@
 [submodule "hw/super6502_fpga/src/sim/sub/verilog-6502"]
 	path = hw/super6502_fpga/src/sim/sub/verilog-6502
 	url = ../verilog-6502.git
-[submodule "hw/super6502_fpga/src/sim/sub/verilog-sd-emulator"]
-	path = hw/super6502_fpga/src/sim/sub/verilog-sd-emulator
-	url = ../verilog-sd-emulator.git
 [submodule "hw/super6502_fpga/src/sub/wb2axip"]
 	path = hw/super6502_fpga/src/sub/wb2axip
 	url = ../wb2axip.git
diff --git a/hw/super6502_fpga/src/sim/hvl/sim_top.sv b/hw/super6502_fpga/src/sim/hvl/sim_top.sv
index e03514e..4a4ac1c 100644
--- a/hw/super6502_fpga/src/sim/hvl/sim_top.sv
+++ b/hw/super6502_fpga/src/sim/hvl/sim_top.sv
@@ -162,13 +162,29 @@ super6502_fpga u_dut (
     .o_sd_clk               (o_sd_clk)
 );
 
-sd_card_emu u_sd_card_emu(
-    .clk(o_sd_clk),
-    .rst(~button_resetn),
-    .i_cmd(o_sd_cmd),
-    .o_cmd(i_sd_cmd),
-    .i_dat(o_sd_dat),
-    .o_dat(i_sd_dat)
+wire w_sd_cmd;
+wire w_sd_dat;
+
+IOBUF cmd_buf (
+    .T(o_sd_cmd_oe),
+    .I(o_sd_cmd),
+    .O(i_sd_cmd),
+    .IO(w_sd_cmd)
+);
+
+IOBUF dat_buf (
+    .T(o_sd_dat_oe),
+    .I(o_sd_dat),
+    .O(i_sd_dat),
+    .IO(w_sd_dat)
+);
+
+mdl_sdio #(
+    .LGMEMSZ(16)
+) u_sd_card_emu (
+    .sd_clk(o_sd_clk),
+    .sd_cmd(w_sd_cmd),
+    .sd_dat(w_sd_dat)
 );
 
 initial begin
diff --git a/hw/super6502_fpga/src/sim/sources.list b/hw/super6502_fpga/src/sim/sources.list
index 76909da..6ea3783 100644
--- a/hw/super6502_fpga/src/sim/sources.list
+++ b/hw/super6502_fpga/src/sim/sources.list
@@ -2,7 +2,8 @@ hvl/sim_top.sv
 sub/verilog-6502/ALU.v
 sub/verilog-6502/cpu_65c02.v
 sub/sim_sdram/generic_sdr.v
-sub/verilog-sd-emulator/src/sd_card_command.sv
-sub/verilog-sd-emulator/src/sd_card_emu.sv
-sub/verilog-sd-emulator/src/sd_card_state_controller.sv
-sub/verilog-sd-emulator/src/sd_card_data.sv
\ No newline at end of file
+../sub/sd_controller_wrapper/sdspi/bench/verilog/mdl_sdio.v
+../sub/sd_controller_wrapper/sdspi/bench/verilog/mdl_sdcmd.v
+../sub/sd_controller_wrapper/sdspi/bench/verilog/mdl_sdrx.v
+../sub/sd_controller_wrapper/sdspi/bench/verilog/mdl_sdtx.v
+../sub/sd_controller_wrapper/sdspi/bench/verilog/IOBUF.v
\ No newline at end of file
diff --git a/hw/super6502_fpga/src/sim/sub/verilog-sd-emulator b/hw/super6502_fpga/src/sim/sub/verilog-sd-emulator
deleted file mode 160000
index 265c636..0000000
--- a/hw/super6502_fpga/src/sim/sub/verilog-sd-emulator
+++ /dev/null
@@ -1 +0,0 @@
-Subproject commit 265c636c86076662e1b6405dd47a71a6077d51d0