bslathi19/super6502
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

Add program target to makefiles

Browse Source
This commit is contained in:
Byron Lathi
2024-03-10 22:25:29 -07:00
parent 61f6e53327
commit f7580f719f
2 changed files with 7 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files

3
Makefile
View File

@@ -14,6 +14,9 @@ fpga_image: $(INIT_HEX)
sim: $(INIT_HEX) sim: $(INIT_HEX)
$(MAKE) -C hw/super6502_fpga/src/sim $(MAKE) -C hw/super6502_fpga/src/sim
pgm:
$(MAKE) -C hw/super6502_fpga pgm
waves: sim waves: sim
gtkwave hw/super6502_fpga/src/sim/sim_top.vcd gtkwave hw/super6502_fpga/src/sim/sim_top.vcd

5
hw/super6502_fpga/Makefile
View File

@@ -9,8 +9,11 @@ all: $(SUPER6502_FPGA_BITSTREAM)
$(SUPER6502_FPGA_BITSTREAM): $(SUPER6502_FPGA_SOURCES) $(SUPER6502_FPGA_PROJECT) $(SUPER6502_FPGA_BITSTREAM): $(SUPER6502_FPGA_SOURCES) $(SUPER6502_FPGA_PROJECT)
efx_run.py $(SUPER6502_FPGA_PROJECT) efx_run.py $(SUPER6502_FPGA_PROJECT)
pgm:
efx_run.py $(SUPER6502_FPGA_PROJECT) --flow program --pgm_opts mode=jtag
.PHONY: clean .PHONY: clean
clean: clean:
rm -rf work_* rm -rf work_*
rm -rf outflow rm -rf outflow
rm -rf init_hex.mem rm -rf init_hex.mem