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////////////////////////////////////////////////////////////////////////////////
------------- Begin Cut here for COMPONENT Declaration ------
COMPONENT divider is
PORT (
numer : in std_logic_vector(15 downto 0);
denom : in std_logic_vector(15 downto 0);
clken : in std_logic;
clk : in std_logic;
reset : in std_logic;
quotient : out std_logic_vector(15 downto 0);
remain : out std_logic_vector(15 downto 0);
rfd : out std_logic);
END COMPONENT;
---------------------- End COMPONENT Declaration ------------

------------- Begin Cut here for INSTANTIATION Template -----
u_divider : divider
PORT MAP (
numer => numer,
denom => denom,
clken => clken,
clk => clk,
reset => reset,
quotient => quotient,
remain => remain,
rfd => rfd);
------------------------ End INSTANTIATION Template ---------