vendor_name = ModelSim
source_file = 1, /home/byron/Projects/super6502/hw/fpga/super6502.sv
source_file = 1, /home/byron/Projects/super6502/hw/fpga/ram.qip
source_file = 1, /home/byron/Projects/super6502/hw/fpga/ram.v
source_file = 1, /home/byron/Projects/super6502/hw/fpga/super6502.sdc
source_file = 1, /software/quartus-lite-18.1/quartus/libraries/megafunctions/altsyncram.tdf
source_file = 1, /software/quartus-lite-18.1/quartus/libraries/megafunctions/stratix_ram_block.inc
source_file = 1, /software/quartus-lite-18.1/quartus/libraries/megafunctions/lpm_mux.inc
source_file = 1, /software/quartus-lite-18.1/quartus/libraries/megafunctions/lpm_decode.inc
source_file = 1, /software/quartus-lite-18.1/quartus/libraries/megafunctions/aglobal181.inc
source_file = 1, /software/quartus-lite-18.1/quartus/libraries/megafunctions/a_rdenreg.inc
source_file = 1, /software/quartus-lite-18.1/quartus/libraries/megafunctions/altrom.inc
source_file = 1, /software/quartus-lite-18.1/quartus/libraries/megafunctions/altram.inc
source_file = 1, /software/quartus-lite-18.1/quartus/libraries/megafunctions/altdpram.inc
source_file = 1, /software/quartus-lite-18.1/quartus/libraries/megafunctions/cbx.lst
source_file = 1, /home/byron/Projects/super6502/hw/fpga/db/altsyncram_okf1.tdf
source_file = 1, /home/byron/Projects/super6502/hw/fpga/db/decode_c7a.tdf
source_file = 1, /home/byron/Projects/super6502/hw/fpga/db/decode_5j9.tdf
source_file = 1, /home/byron/Projects/super6502/hw/fpga/db/mux_s1b.tdf
design_name = super6502
instance = comp, \~QUARTUS_CREATED_GND~I , ~QUARTUS_CREATED_GND~I, super6502, 1
instance = comp, \cpu_data[0]~output , cpu_data[0]~output, super6502, 1
instance = comp, \cpu_data[1]~output , cpu_data[1]~output, super6502, 1
instance = comp, \cpu_data[2]~output , cpu_data[2]~output, super6502, 1
instance = comp, \cpu_data[3]~output , cpu_data[3]~output, super6502, 1
instance = comp, \cpu_data[4]~output , cpu_data[4]~output, super6502, 1
instance = comp, \cpu_data[5]~output , cpu_data[5]~output, super6502, 1
instance = comp, \cpu_data[6]~output , cpu_data[6]~output, super6502, 1
instance = comp, \cpu_data[7]~output , cpu_data[7]~output, super6502, 1
instance = comp, \cpu_led~output , cpu_led~output, super6502, 1
instance = comp, \cpu_resb~output , cpu_resb~output, super6502, 1
instance = comp, \cpu_rdy~output , cpu_rdy~output, super6502, 1
instance = comp, \cpu_sob~output , cpu_sob~output, super6502, 1
instance = comp, \cpu_irqb~output , cpu_irqb~output, super6502, 1
instance = comp, \cpu_phi2~output , cpu_phi2~output, super6502, 1
instance = comp, \cpu_be~output , cpu_be~output, super6502, 1
instance = comp, \cpu_nmib~output , cpu_nmib~output, super6502, 1
instance = comp, \clk~input , clk~input, super6502, 1
instance = comp, \clk~inputclkctrl , clk~inputclkctrl, super6502, 1
instance = comp, \cpu_addr[13]~input , cpu_addr[13]~input, super6502, 1
instance = comp, \main_memory|altsyncram_component|auto_generated|address_reg_a[0] , main_memory|altsyncram_component|auto_generated|address_reg_a[0], super6502, 1
instance = comp, \cpu_addr[14]~input , cpu_addr[14]~input, super6502, 1
instance = comp, \cpu_rwb~input , cpu_rwb~input, super6502, 1
instance = comp, \main_memory|altsyncram_component|auto_generated|decode3|w_anode236w[2]~0 , main_memory|altsyncram_component|auto_generated|decode3|w_anode236w[2]~0, super6502, 1
instance = comp, \main_memory|altsyncram_component|auto_generated|rden_decode|w_anode275w[2]~0 , main_memory|altsyncram_component|auto_generated|rden_decode|w_anode275w[2]~0, super6502, 1
instance = comp, \cpu_data[0]~input , cpu_data[0]~input, super6502, 1
instance = comp, \cpu_addr[0]~input , cpu_addr[0]~input, super6502, 1
instance = comp, \cpu_addr[1]~input , cpu_addr[1]~input, super6502, 1
instance = comp, \cpu_addr[2]~input , cpu_addr[2]~input, super6502, 1
instance = comp, \cpu_addr[3]~input , cpu_addr[3]~input, super6502, 1
instance = comp, \cpu_addr[4]~input , cpu_addr[4]~input, super6502, 1
instance = comp, \cpu_addr[5]~input , cpu_addr[5]~input, super6502, 1
instance = comp, \cpu_addr[6]~input , cpu_addr[6]~input, super6502, 1
instance = comp, \cpu_addr[7]~input , cpu_addr[7]~input, super6502, 1
instance = comp, \cpu_addr[8]~input , cpu_addr[8]~input, super6502, 1
instance = comp, \cpu_addr[9]~input , cpu_addr[9]~input, super6502, 1
instance = comp, \cpu_addr[10]~input , cpu_addr[10]~input, super6502, 1
instance = comp, \cpu_addr[11]~input , cpu_addr[11]~input, super6502, 1
instance = comp, \cpu_addr[12]~input , cpu_addr[12]~input, super6502, 1
instance = comp, \main_memory|altsyncram_component|auto_generated|ram_block1a8 , main_memory|altsyncram_component|auto_generated|ram_block1a8, super6502, 1
instance = comp, \main_memory|altsyncram_component|auto_generated|decode3|w_anode223w[2] , main_memory|altsyncram_component|auto_generated|decode3|w_anode223w[2], super6502, 1
instance = comp, \main_memory|altsyncram_component|auto_generated|rden_decode|w_anode261w[2]~0 , main_memory|altsyncram_component|auto_generated|rden_decode|w_anode261w[2]~0, super6502, 1
instance = comp, \main_memory|altsyncram_component|auto_generated|ram_block1a0 , main_memory|altsyncram_component|auto_generated|ram_block1a0, super6502, 1
instance = comp, \main_memory|altsyncram_component|auto_generated|decode3|w_anode244w[2]~0 , main_memory|altsyncram_component|auto_generated|decode3|w_anode244w[2]~0, super6502, 1
instance = comp, \main_memory|altsyncram_component|auto_generated|rden_decode|w_anode284w[2]~0 , main_memory|altsyncram_component|auto_generated|rden_decode|w_anode284w[2]~0, super6502, 1
instance = comp, \main_memory|altsyncram_component|auto_generated|ram_block1a16 , main_memory|altsyncram_component|auto_generated|ram_block1a16, super6502, 1
instance = comp, \main_memory|altsyncram_component|auto_generated|address_reg_a[1] , main_memory|altsyncram_component|auto_generated|address_reg_a[1], super6502, 1
instance = comp, \main_memory|altsyncram_component|auto_generated|mux2|result_node[0]~0 , main_memory|altsyncram_component|auto_generated|mux2|result_node[0]~0, super6502, 1
instance = comp, \main_memory|altsyncram_component|auto_generated|decode3|w_anode252w[2]~0 , main_memory|altsyncram_component|auto_generated|decode3|w_anode252w[2]~0, super6502, 1
instance = comp, \main_memory|altsyncram_component|auto_generated|rden_decode|w_anode293w[2]~0 , main_memory|altsyncram_component|auto_generated|rden_decode|w_anode293w[2]~0, super6502, 1
instance = comp, \main_memory|altsyncram_component|auto_generated|ram_block1a24 , main_memory|altsyncram_component|auto_generated|ram_block1a24, super6502, 1
instance = comp, \main_memory|altsyncram_component|auto_generated|mux2|result_node[0]~1 , main_memory|altsyncram_component|auto_generated|mux2|result_node[0]~1, super6502, 1
instance = comp, \cpu_data[1]~input , cpu_data[1]~input, super6502, 1
instance = comp, \main_memory|altsyncram_component|auto_generated|ram_block1a25 , main_memory|altsyncram_component|auto_generated|ram_block1a25, super6502, 1
instance = comp, \main_memory|altsyncram_component|auto_generated|ram_block1a1 , main_memory|altsyncram_component|auto_generated|ram_block1a1, super6502, 1
instance = comp, \main_memory|altsyncram_component|auto_generated|ram_block1a9 , main_memory|altsyncram_component|auto_generated|ram_block1a9, super6502, 1
instance = comp, \main_memory|altsyncram_component|auto_generated|mux2|result_node[1]~2 , main_memory|altsyncram_component|auto_generated|mux2|result_node[1]~2, super6502, 1
instance = comp, \main_memory|altsyncram_component|auto_generated|ram_block1a17 , main_memory|altsyncram_component|auto_generated|ram_block1a17, super6502, 1
instance = comp, \main_memory|altsyncram_component|auto_generated|mux2|result_node[1]~3 , main_memory|altsyncram_component|auto_generated|mux2|result_node[1]~3, super6502, 1
instance = comp, \cpu_data[2]~input , cpu_data[2]~input, super6502, 1
instance = comp, \main_memory|altsyncram_component|auto_generated|ram_block1a18 , main_memory|altsyncram_component|auto_generated|ram_block1a18, super6502, 1
instance = comp, \main_memory|altsyncram_component|auto_generated|ram_block1a2 , main_memory|altsyncram_component|auto_generated|ram_block1a2, super6502, 1
instance = comp, \main_memory|altsyncram_component|auto_generated|mux2|result_node[2]~4 , main_memory|altsyncram_component|auto_generated|mux2|result_node[2]~4, super6502, 1
instance = comp, \main_memory|altsyncram_component|auto_generated|ram_block1a26 , main_memory|altsyncram_component|auto_generated|ram_block1a26, super6502, 1
instance = comp, \main_memory|altsyncram_component|auto_generated|ram_block1a10 , main_memory|altsyncram_component|auto_generated|ram_block1a10, super6502, 1
instance = comp, \main_memory|altsyncram_component|auto_generated|mux2|result_node[2]~5 , main_memory|altsyncram_component|auto_generated|mux2|result_node[2]~5, super6502, 1
instance = comp, \cpu_data[3]~input , cpu_data[3]~input, super6502, 1
instance = comp, \main_memory|altsyncram_component|auto_generated|ram_block1a3 , main_memory|altsyncram_component|auto_generated|ram_block1a3, super6502, 1
instance = comp, \main_memory|altsyncram_component|auto_generated|ram_block1a11 , main_memory|altsyncram_component|auto_generated|ram_block1a11, super6502, 1
instance = comp, \main_memory|altsyncram_component|auto_generated|mux2|result_node[3]~6 , main_memory|altsyncram_component|auto_generated|mux2|result_node[3]~6, super6502, 1
instance = comp, \main_memory|altsyncram_component|auto_generated|ram_block1a19 , main_memory|altsyncram_component|auto_generated|ram_block1a19, super6502, 1
instance = comp, \main_memory|altsyncram_component|auto_generated|ram_block1a27 , main_memory|altsyncram_component|auto_generated|ram_block1a27, super6502, 1
instance = comp, \main_memory|altsyncram_component|auto_generated|mux2|result_node[3]~7 , main_memory|altsyncram_component|auto_generated|mux2|result_node[3]~7, super6502, 1
instance = comp, \cpu_data[4]~input , cpu_data[4]~input, super6502, 1
instance = comp, \main_memory|altsyncram_component|auto_generated|ram_block1a12 , main_memory|altsyncram_component|auto_generated|ram_block1a12, super6502, 1
instance = comp, \main_memory|altsyncram_component|auto_generated|ram_block1a28 , main_memory|altsyncram_component|auto_generated|ram_block1a28, super6502, 1
instance = comp, \main_memory|altsyncram_component|auto_generated|ram_block1a4 , main_memory|altsyncram_component|auto_generated|ram_block1a4, super6502, 1
instance = comp, \main_memory|altsyncram_component|auto_generated|ram_block1a20 , main_memory|altsyncram_component|auto_generated|ram_block1a20, super6502, 1
instance = comp, \main_memory|altsyncram_component|auto_generated|mux2|result_node[4]~8 , main_memory|altsyncram_component|auto_generated|mux2|result_node[4]~8, super6502, 1
instance = comp, \main_memory|altsyncram_component|auto_generated|mux2|result_node[4]~9 , main_memory|altsyncram_component|auto_generated|mux2|result_node[4]~9, super6502, 1
instance = comp, \cpu_data[5]~input , cpu_data[5]~input, super6502, 1
instance = comp, \main_memory|altsyncram_component|auto_generated|ram_block1a5 , main_memory|altsyncram_component|auto_generated|ram_block1a5, super6502, 1
instance = comp, \main_memory|altsyncram_component|auto_generated|ram_block1a13 , main_memory|altsyncram_component|auto_generated|ram_block1a13, super6502, 1
instance = comp, \main_memory|altsyncram_component|auto_generated|mux2|result_node[5]~10 , main_memory|altsyncram_component|auto_generated|mux2|result_node[5]~10, super6502, 1
instance = comp, \main_memory|altsyncram_component|auto_generated|ram_block1a29 , main_memory|altsyncram_component|auto_generated|ram_block1a29, super6502, 1
instance = comp, \main_memory|altsyncram_component|auto_generated|ram_block1a21 , main_memory|altsyncram_component|auto_generated|ram_block1a21, super6502, 1
instance = comp, \main_memory|altsyncram_component|auto_generated|mux2|result_node[5]~11 , main_memory|altsyncram_component|auto_generated|mux2|result_node[5]~11, super6502, 1
instance = comp, \cpu_data[6]~input , cpu_data[6]~input, super6502, 1
instance = comp, \main_memory|altsyncram_component|auto_generated|ram_block1a22 , main_memory|altsyncram_component|auto_generated|ram_block1a22, super6502, 1
instance = comp, \main_memory|altsyncram_component|auto_generated|ram_block1a6 , main_memory|altsyncram_component|auto_generated|ram_block1a6, super6502, 1
instance = comp, \main_memory|altsyncram_component|auto_generated|mux2|result_node[6]~12 , main_memory|altsyncram_component|auto_generated|mux2|result_node[6]~12, super6502, 1
instance = comp, \main_memory|altsyncram_component|auto_generated|ram_block1a14 , main_memory|altsyncram_component|auto_generated|ram_block1a14, super6502, 1
instance = comp, \main_memory|altsyncram_component|auto_generated|ram_block1a30 , main_memory|altsyncram_component|auto_generated|ram_block1a30, super6502, 1
instance = comp, \main_memory|altsyncram_component|auto_generated|mux2|result_node[6]~13 , main_memory|altsyncram_component|auto_generated|mux2|result_node[6]~13, super6502, 1
instance = comp, \cpu_data[7]~input , cpu_data[7]~input, super6502, 1
instance = comp, \main_memory|altsyncram_component|auto_generated|ram_block1a7 , main_memory|altsyncram_component|auto_generated|ram_block1a7, super6502, 1
instance = comp, \main_memory|altsyncram_component|auto_generated|ram_block1a15 , main_memory|altsyncram_component|auto_generated|ram_block1a15, super6502, 1
instance = comp, \main_memory|altsyncram_component|auto_generated|mux2|result_node[7]~14 , main_memory|altsyncram_component|auto_generated|mux2|result_node[7]~14, super6502, 1
instance = comp, \main_memory|altsyncram_component|auto_generated|ram_block1a23 , main_memory|altsyncram_component|auto_generated|ram_block1a23, super6502, 1
instance = comp, \main_memory|altsyncram_component|auto_generated|ram_block1a31 , main_memory|altsyncram_component|auto_generated|ram_block1a31, super6502, 1
instance = comp, \main_memory|altsyncram_component|auto_generated|mux2|result_node[7]~15 , main_memory|altsyncram_component|auto_generated|mux2|result_node[7]~15, super6502, 1
instance = comp, \clk_count[1]~1 , clk_count[1]~1, super6502, 1
instance = comp, \clk_count[1] , clk_count[1], super6502, 1
instance = comp, \clk_count~2 , clk_count~2, super6502, 1
instance = comp, \clk_count[2] , clk_count[2], super6502, 1
instance = comp, \clk_count~0 , clk_count~0, super6502, 1
instance = comp, \clk_count[0] , clk_count[0], super6502, 1
instance = comp, \cpu_phi2~0 , cpu_phi2~0, super6502, 1
instance = comp, \cpu_phi2~reg0 , cpu_phi2~reg0, super6502, 1
instance = comp, \rst~input , rst~input, super6502, 1
instance = comp, \cpu_addr[15]~input , cpu_addr[15]~input, super6502, 1
instance = comp, \cpu_vpb~input , cpu_vpb~input, super6502, 1
instance = comp, \cpu_mlb~input , cpu_mlb~input, super6502, 1
instance = comp, \cpu_sync~input , cpu_sync~input, super6502, 1
instance = comp, \~QUARTUS_CREATED_UNVM~ , ~QUARTUS_CREATED_UNVM~, super6502, 1
instance = comp, \~QUARTUS_CREATED_ADC1~ , ~QUARTUS_CREATED_ADC1~, super6502, 1
instance = comp, \~QUARTUS_CREATED_ADC2~ , ~QUARTUS_CREATED_ADC2~, super6502, 1
design_name = hard_block
instance = comp, \~ALTERA_TMS~~ibuf , ~ALTERA_TMS~~ibuf, hard_block, 1
instance = comp, \~ALTERA_TCK~~ibuf , ~ALTERA_TCK~~ibuf, hard_block, 1
instance = comp, \~ALTERA_TDI~~ibuf , ~ALTERA_TDI~~ibuf, hard_block, 1
instance = comp, \~ALTERA_CONFIG_SEL~~ibuf , ~ALTERA_CONFIG_SEL~~ibuf, hard_block, 1
instance = comp, \~ALTERA_nCONFIG~~ibuf , ~ALTERA_nCONFIG~~ibuf, hard_block, 1
instance = comp, \~ALTERA_nSTATUS~~ibuf , ~ALTERA_nSTATUS~~ibuf, hard_block, 1
instance = comp, \~ALTERA_CONF_DONE~~ibuf , ~ALTERA_CONF_DONE~~ibuf, hard_block, 1