Files
super6502/.gitlab-ci.yml
2024-10-14 21:50:06 -07:00

45 lines
803 B
YAML

variables:
GIT_SUBMODULE_STRATEGY: recursive
stages:
- build
- sim
build:
stage: build
when: manual
tags:
- efinity
- linux
script:
# - source init_env.sh
- module load efinity/2024.1
- make
after_script:
- cat hw/super6502_fpga/outflow/super6502_fpga.err.log
sim:
stage: sim
needs: []
tags:
- linux
- efinity
script:
- source init_env.sh
- make sim
ntw_sim:
stage: sim
needs: []
tags:
- linux
script:
- source init_env.sh
- cd hw/super6502_fpga/src/sub/network_processor/sim/cocotb
- make -j `nproc`
artifacts:
when: always
paths:
- hw/super6502_fpga/src/sub/network_processor/sim/cocotb/results.xml
reports:
junit: hw/super6502_fpga/src/sub/network_processor/sim/cocotb/results.xml