62 lines
1.5 KiB
Makefile
62 lines
1.5 KiB
Makefile
SRCS=$(shell find src/ -type f -name "*.*v")
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TBS=$(shell find tbs/ -type f -name "*.*v")
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SRCS+=$(shell find ../ip/ -type f -name "*.*v" -not \( -name "*tmpl*" \))
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SRCS+=$(shell find ../src/ -type f -name "*.*v")
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INC=$(shell find include/ -type f)
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TEST_PROGRAM_NAME?=loop_test
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TEST_FOLDER?=$(REPO_TOP)/sw/test_code/$(TEST_PROGRAM_NAME)
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TEST_PROGRAM?=$(REPO_TOP)/sw/test_code/$(TEST_PROGRAM_NAME)/$(TEST_PROGRAM_NAME).hex
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STANDALONE_TB= interrupt_controller_tb mapper_code_tb mapper_tb
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#TODO implement something like sources.list
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TOP_MODULE=sim_top
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TARGET=sim_top
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INIT_MEM=init_hex.mem
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SD_IMAGE=fs.fat
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FLAGS=-DSIM -DRTL_SIM
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SD_IMAGE_PATH?=$(REPO_TOP)/sw/script/$(SD_IMAGE)
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all: sim
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.PHONY: sim
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sim: $(TARGET)
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vvp -i $(TARGET) -fst
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.PHONY: full_sim
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full_sim: $(TARGET) $(SD_IMAGE)
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vvp -i $(TARGET) -fst
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$(STANDALONE_TB): $(SRCS) $(TBS)
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iverilog -g2005-sv $(FLAGS) -s $@ -o $@ $(INC) $(SRCS) $(TBS)
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# mapper_code_tb: $(SRCS) $(TBS) $(INIT_MEM)
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# iverilog -g2005-sv $(FLAGS) -s $@ -o $@ $(INC) $(SRCS) $(TBS)
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$(TARGET): $(INIT_MEM) $(SRCS)
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iverilog -g2005-sv $(FLAGS) -s $(TOP_MODULE) -o $(TARGET) $(INC) $(SRCS)
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$(INIT_MEM):
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# Make kernel
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$(MAKE) -C $(REPO_TOP)/sw/kernel
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$(MAKE) -C $(TEST_FOLDER)
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cp $(TEST_PROGRAM) ./init_hex.mem
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# The script that makes this file uses relative paths
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$(SD_IMAGE):
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sh $(REPO_TOP)/sw/script/create_verilog_image.sh
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cp $(SD_IMAGE_PATH) $(SD_IMAGE)
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.PHONY: clean
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clean:
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rm -rf $(TARGET)
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rm -rf $(INIT_MEM)
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rm -rf $(SD_IMAGE)
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rm -rf $(STANDALONE_TB)
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rm -rf *.vcd
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