Byron Lathi 3d9d340520 Get the FPGA part working ...

This changes some of the clocks, fixes a bug in the seven segment stuff.

2022-03-11 22:55:26 -06:00

..

.gitignore

Add addr_decode and testbench

2022-03-05 20:11:47 -06:00

bb_spi_testbench.do

Add bb_spi_controller

2022-03-08 15:26:01 -06:00

cs_testbench.do

Add addr_decode and testbench

2022-03-05 20:11:47 -06:00

modelsim.ini

Add addr_decode and testbench

2022-03-05 20:11:47 -06:00

super6502_modelsim.xrf

Get the FPGA part working

2022-03-11 22:55:26 -06:00

super6502.sft

Create quartus project

2022-03-05 17:52:42 -06:00

super6502.svo

Get the FPGA part working

2022-03-11 22:55:26 -06:00