Byron Lathi 15e3ae9688 Add SDRAM controller (controller) ...

Turns out there are some issues with holding the chip select for the
SDRAM controller high for too long, so there is a simple 2-state fsm
which ensures that the chip select is only held for 1 clock cycle for
writes and for as long as it takes to read the data from sdram for
reads.

2022-03-17 13:31:56 -05:00

..

board

Ignore gerber output files and folders

2022-03-08 15:25:05 -06:00

fpga

Add SDRAM controller (controller)

2022-03-17 13:31:56 -05:00