Byron Lathi 335f877d66 Run simulation with verilog sd emulator ...

This also slowed the cpu clock down, we should speed it up again

2024-03-14 08:17:05 -07:00

..

constraints

Add basic project with cpu, ram and rom

2024-03-02 22:46:48 -08:00

ip/sdram_controller

Fix sdram sim

2024-03-03 21:33:28 -08:00

src

Run simulation with verilog sd emulator

2024-03-14 08:17:05 -07:00

.gitignore

Add basic project with cpu, ram and rom

2024-03-02 22:46:48 -08:00

addr_map.mem

integrate sd controller and super simple tb

2024-03-10 11:31:07 -07:00

Makefile

Add program target to makefiles

2024-03-10 22:25:29 -07:00

sources.list

Update sd controller for sim

2024-03-12 21:51:55 -07:00

super6502_fpga.peri.xml

Add sd io pins

2024-03-10 16:09:12 -07:00

super6502_fpga.xml

Update sd controller with data host

2024-03-12 20:23:41 -07:00