5f6657a227
Adds a 16x16 divider to go with the multiplier. The divider is a single stage with no pipelining, which works at the slow 2MHz frequency. Doing this lowers the maximum clock frequency to 5. This is acceptable for now but means that the cpu can't be run at 14, which is the maximum frequency.
33 lines
350 B
ArmAsm
33 lines
350 B
ArmAsm
.code
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LEDS = $efff
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DIVNL = $efe8
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DIVNH = $efe9
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DIVDL = $efea
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DIVDH = $efeb
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DIVQL = $efec
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DIVQH = $efed
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DIVRL = $efee
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DIVRH = $efef
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main:
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lda #$c8
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sta DIVNL
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lda #$01
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sta DIVNH
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lda #$0d
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sta DIVDL
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lda #$00
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sta DIVDH
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lda DIVQL
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sta LEDS
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wai
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bra main
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.segment "VECTORS"
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.addr main
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.addr main
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.addr main
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