Files
super6502/hw/fpga/addr_decode.sv
Byron Lathi a15dde0e89 Add memory mapper software interface
Adds functions to read and write mappings, as well as enable and disable
the memory mapper.

This also moves increases the io space by 16 bytes.
2022-04-07 10:33:50 -05:00

23 lines
602 B
Systemverilog

module addr_decode(
input logic [15:0] addr,
output logic sdram_cs,
output logic rom_cs,
output logic hex_cs,
output logic uart_cs,
output logic irq_cs,
output logic board_io_cs,
output logic mm_cs1,
output logic mm_cs2
);
assign rom_cs = addr >= 16'h8000;
assign sdram_cs = addr < 16'h7fe0;
assign mm_cs1 = addr >= 16'h7fe0 && addr < 16'h7ff0;
assign hex_cs = addr >= 16'h7ff0 && addr < 16'h7ff4;
assign uart_cs = addr >= 16'h7ff4 && addr < 16'h7ff6;
assign board_io_cs = addr == 16'h7ff6;
assign mm_cs2 = addr == 16'h7ff7;
assign irq_cs = addr == 16'h7fff;
endmodule