217 lines
11 KiB
Plaintext
217 lines
11 KiB
Plaintext
# -------------------------------------------------------------------------- #
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#
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# Copyright (C) 2018 Intel Corporation. All rights reserved.
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# Your use of Intel Corporation's design tools, logic functions
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# and other software and tools, and its AMPP partner logic
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# functions, and any output files from any of the foregoing
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# (including device programming or simulation files), and any
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# associated documentation or information are expressly subject
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# to the terms and conditions of the Intel Program License
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# Subscription Agreement, the Intel Quartus Prime License Agreement,
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# the Intel FPGA IP License Agreement, or other applicable license
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# agreement, including, without limitation, that your use is for
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# the sole purpose of programming logic devices manufactured by
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# Intel and sold by Intel or its authorized distributors. Please
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# refer to the applicable agreement for further details.
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#
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# -------------------------------------------------------------------------- #
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#
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# Quartus Prime
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# Version 18.1.0 Build 625 09/12/2018 SJ Lite Edition
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# Date created = 16:36:56 March 05, 2022
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#
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# -------------------------------------------------------------------------- #
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#
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# Notes:
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#
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# 1) The default values for assignments are stored in the file:
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# super6502_assignment_defaults.qdf
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# If this file doesn't exist, see file:
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# assignment_defaults.qdf
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#
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# 2) Altera recommends that you do not modify this file. This
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# file is updated automatically by the Quartus Prime software
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# and any changes you make may be lost or overwritten.
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#
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# -------------------------------------------------------------------------- #
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set_global_assignment -name FAMILY "MAX 10"
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set_global_assignment -name DEVICE 10M50DAF484C7G
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set_global_assignment -name TOP_LEVEL_ENTITY super6502
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set_global_assignment -name ORIGINAL_QUARTUS_VERSION 18.1.0
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set_global_assignment -name PROJECT_CREATION_TIME_DATE "16:36:56 MARCH 05, 2022"
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set_global_assignment -name LAST_QUARTUS_VERSION "18.1.0 Lite Edition"
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set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
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set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
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set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
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set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 256
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set_global_assignment -name EDA_SIMULATION_TOOL "ModelSim-Altera (SystemVerilog)"
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set_global_assignment -name EDA_TIME_SCALE "1 ps" -section_id eda_simulation
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set_global_assignment -name EDA_OUTPUT_DATA_FORMAT "SYSTEMVERILOG HDL" -section_id eda_simulation
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set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
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set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
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set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
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set_location_assignment PIN_V10 -to cpu_led
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set_location_assignment PIN_W10 -to cpu_vpb
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set_location_assignment PIN_V9 -to cpu_resb
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set_location_assignment PIN_W9 -to cpu_rdy
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set_location_assignment PIN_V8 -to cpu_sob
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set_location_assignment PIN_V7 -to cpu_phi2
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set_location_assignment PIN_W6 -to cpu_be
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set_location_assignment PIN_W5 -to cpu_rwb
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set_location_assignment PIN_AA14 -to cpu_data[0]
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set_location_assignment PIN_W12 -to cpu_data[1]
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set_location_assignment PIN_AB12 -to cpu_data[2]
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set_location_assignment PIN_AB11 -to cpu_data[3]
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set_location_assignment PIN_AB10 -to cpu_data[4]
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set_location_assignment PIN_AA9 -to cpu_data[5]
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set_location_assignment PIN_AA8 -to cpu_data[6]
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set_location_assignment PIN_AA7 -to cpu_data[7]
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set_location_assignment PIN_AA6 -to cpu_addr[15]
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set_location_assignment PIN_AA5 -to cpu_addr[14]
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set_location_assignment PIN_AB3 -to cpu_addr[13]
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set_location_assignment PIN_AB2 -to cpu_addr[12]
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set_location_assignment PIN_AA2 -to cpu_addr[11]
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set_location_assignment PIN_Y3 -to cpu_addr[10]
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set_location_assignment PIN_Y4 -to cpu_addr[9]
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set_location_assignment PIN_Y5 -to cpu_addr[8]
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set_location_assignment PIN_Y6 -to cpu_addr[7]
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set_location_assignment PIN_Y7 -to cpu_addr[6]
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set_location_assignment PIN_Y8 -to cpu_addr[5]
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set_location_assignment PIN_AA10 -to cpu_addr[4]
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set_location_assignment PIN_W11 -to cpu_addr[3]
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set_location_assignment PIN_Y11 -to cpu_addr[2]
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set_location_assignment PIN_AB13 -to cpu_addr[1]
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set_location_assignment PIN_W13 -to cpu_addr[0]
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set_location_assignment PIN_AA15 -to cpu_sync
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set_location_assignment PIN_V5 -to cpu_nmib
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set_location_assignment PIN_W7 -to cpu_mlb
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set_location_assignment PIN_W8 -to cpu_irqb
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set_location_assignment PIN_C17 -to HEX0[6]
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set_location_assignment PIN_D17 -to HEX0[5]
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set_location_assignment PIN_E16 -to HEX0[4]
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set_location_assignment PIN_C10 -to SW[0]
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set_location_assignment PIN_C11 -to SW[1]
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set_location_assignment PIN_D12 -to SW[2]
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set_location_assignment PIN_C12 -to SW[3]
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set_location_assignment PIN_A12 -to SW[4]
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set_location_assignment PIN_B12 -to SW[5]
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set_location_assignment PIN_A13 -to SW[6]
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set_location_assignment PIN_A14 -to SW[7]
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set_location_assignment PIN_B14 -to SW[8]
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set_location_assignment PIN_F15 -to SW[9]
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set_location_assignment PIN_A7 -to Run
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set_location_assignment PIN_A8 -to LED[0]
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set_location_assignment PIN_A9 -to LED[1]
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set_location_assignment PIN_A10 -to LED[2]
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set_location_assignment PIN_B10 -to LED[3]
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set_location_assignment PIN_D13 -to LED[4]
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set_location_assignment PIN_C13 -to LED[5]
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set_location_assignment PIN_E14 -to LED[6]
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set_location_assignment PIN_D14 -to LED[7]
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set_location_assignment PIN_A11 -to LED[8]
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set_location_assignment PIN_B11 -to LED[9]
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set_location_assignment PIN_F21 -to HEX3[0]
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set_location_assignment PIN_E22 -to HEX3[1]
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set_location_assignment PIN_E21 -to HEX3[2]
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set_location_assignment PIN_C19 -to HEX3[3]
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set_location_assignment PIN_C20 -to HEX3[4]
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set_location_assignment PIN_D19 -to HEX3[5]
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set_location_assignment PIN_E17 -to HEX3[6]
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set_location_assignment PIN_B20 -to HEX2[0]
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set_location_assignment PIN_A20 -to HEX2[1]
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set_location_assignment PIN_B19 -to HEX2[2]
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set_location_assignment PIN_A21 -to HEX2[3]
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set_location_assignment PIN_B21 -to HEX2[4]
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set_location_assignment PIN_C22 -to HEX2[5]
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set_location_assignment PIN_B22 -to HEX2[6]
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set_location_assignment PIN_C18 -to HEX1[0]
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set_location_assignment PIN_D18 -to HEX1[1]
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set_location_assignment PIN_E18 -to HEX1[2]
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set_location_assignment PIN_B16 -to HEX1[3]
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set_location_assignment PIN_A17 -to HEX1[4]
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set_location_assignment PIN_A18 -to HEX1[5]
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set_location_assignment PIN_B17 -to HEX1[6]
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set_location_assignment PIN_C14 -to HEX0[0]
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set_location_assignment PIN_E15 -to HEX0[1]
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set_location_assignment PIN_C15 -to HEX0[2]
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set_location_assignment PIN_C16 -to HEX0[3]
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set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "23 MM HEAT SINK WITH 200 LFPM AIRFLOW"
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set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)"
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set_global_assignment -name SYSTEMVERILOG_FILE addr_decode.sv
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set_global_assignment -name SYSTEMVERILOG_FILE bb_spi_controller.sv
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set_global_assignment -name SYSTEMVERILOG_FILE super6502.sv
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set_global_assignment -name QIP_FILE ram.qip
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set_global_assignment -name SDC_FILE super6502.sdc
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set_global_assignment -name QIP_FILE rom.qip
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set_global_assignment -name SYSTEMVERILOG_FILE HexDriver.sv
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set_global_assignment -name SYSTEMVERILOG_FILE SevenSeg.sv
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set_global_assignment -name QIP_FILE cpu_clk.qip
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set_location_assignment PIN_B8 -to rst_n
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set_location_assignment PIN_P11 -to clk_50
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set_global_assignment -name ENABLE_OCT_DONE OFF
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set_global_assignment -name EXTERNAL_FLASH_FALLBACK_ADDRESS 00000000
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set_global_assignment -name USE_CONFIGURATION_DEVICE OFF
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set_global_assignment -name INTERNAL_FLASH_UPDATE_MODE "SINGLE IMAGE WITH ERAM"
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set_global_assignment -name CRC_ERROR_OPEN_DRAIN OFF
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set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -rise
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set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -fall
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set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -rise
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set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -fall
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set_instance_assignment -name IO_STANDARD "2.5 V" -to cpu_vpb
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set_instance_assignment -name IO_STANDARD "2.5 V" -to cpu_addr[15]
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set_instance_assignment -name IO_STANDARD "2.5 V" -to cpu_addr[14]
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set_instance_assignment -name IO_STANDARD "2.5 V" -to cpu_addr[13]
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set_instance_assignment -name IO_STANDARD "2.5 V" -to cpu_addr[12]
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set_instance_assignment -name IO_STANDARD "2.5 V" -to cpu_addr[11]
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set_instance_assignment -name IO_STANDARD "2.5 V" -to cpu_addr[10]
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set_instance_assignment -name IO_STANDARD "2.5 V" -to cpu_addr[9]
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set_instance_assignment -name IO_STANDARD "2.5 V" -to cpu_addr[8]
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set_instance_assignment -name IO_STANDARD "2.5 V" -to cpu_addr[7]
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set_instance_assignment -name IO_STANDARD "2.5 V" -to cpu_addr[6]
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set_instance_assignment -name IO_STANDARD "2.5 V" -to cpu_addr[5]
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set_instance_assignment -name IO_STANDARD "2.5 V" -to cpu_addr[4]
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set_instance_assignment -name IO_STANDARD "2.5 V" -to cpu_addr[3]
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set_instance_assignment -name IO_STANDARD "2.5 V" -to cpu_addr[2]
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set_instance_assignment -name IO_STANDARD "2.5 V" -to cpu_addr[1]
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set_instance_assignment -name IO_STANDARD "2.5 V" -to cpu_addr[0]
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set_instance_assignment -name IO_STANDARD "2.5 V" -to cpu_be
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set_instance_assignment -name IO_STANDARD "2.5 V" -to cpu_data[7]
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set_instance_assignment -name IO_STANDARD "2.5 V" -to cpu_data[6]
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set_instance_assignment -name IO_STANDARD "2.5 V" -to cpu_data[5]
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set_instance_assignment -name IO_STANDARD "2.5 V" -to cpu_data[4]
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set_instance_assignment -name IO_STANDARD "2.5 V" -to cpu_data[3]
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set_instance_assignment -name IO_STANDARD "2.5 V" -to cpu_data[2]
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set_instance_assignment -name IO_STANDARD "2.5 V" -to cpu_data[1]
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set_instance_assignment -name IO_STANDARD "2.5 V" -to cpu_data[0]
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set_instance_assignment -name IO_STANDARD "2.5 V" -to cpu_irqb
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set_instance_assignment -name IO_STANDARD "2.5 V" -to cpu_led
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set_instance_assignment -name IO_STANDARD "2.5 V" -to cpu_mlb
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set_instance_assignment -name IO_STANDARD "2.5 V" -to cpu_nmib
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set_instance_assignment -name IO_STANDARD "2.5 V" -to cpu_phi2
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set_instance_assignment -name IO_STANDARD "2.5 V" -to cpu_rdy
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set_instance_assignment -name IO_STANDARD "2.5 V" -to cpu_resb
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set_instance_assignment -name IO_STANDARD "2.5 V" -to cpu_rwb
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set_instance_assignment -name IO_STANDARD "2.5 V" -to cpu_sob
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set_instance_assignment -name IO_STANDARD "2.5 V" -to cpu_sync
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set_instance_assignment -name IO_STANDARD "2.5 V" -to clk_50
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set_global_assignment -name ENABLE_SIGNALTAP OFF
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set_global_assignment -name USE_SIGNALTAP_FILE output_files/stp1.stp
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set_global_assignment -name SIGNALTAP_FILE output_files/stp1.stp
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set_location_assignment PIN_F20 -to HEX4[6]
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set_location_assignment PIN_F19 -to HEX4[5]
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set_location_assignment PIN_H19 -to HEX4[4]
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set_location_assignment PIN_J18 -to HEX4[3]
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set_location_assignment PIN_E19 -to HEX4[2]
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set_location_assignment PIN_J20 -to HEX5[0]
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set_location_assignment PIN_K20 -to HEX5[1]
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set_location_assignment PIN_L18 -to HEX5[2]
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set_location_assignment PIN_N18 -to HEX5[3]
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set_location_assignment PIN_M20 -to HEX5[4]
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set_location_assignment PIN_N19 -to HEX5[5]
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set_location_assignment PIN_N20 -to HEX5[6]
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set_location_assignment PIN_F18 -to HEX4[0]
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set_location_assignment PIN_E20 -to HEX4[1]
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set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top |