I think that previously, I had not actually commited any of this to git. This adds all of the new effinix stuff that I had been working on for months. The gist of all of this is that the intel fpga is expensive and does not exist, whereas the effinix ones are not as expensive and more existant. This redoes the project to use the dev board, as well as a custom board that I may or may not make.
28 lines
361 B
Systemverilog
28 lines
361 B
Systemverilog
module board_io(
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input clk,
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input rst,
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input rw,
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input [7:0] data_in,
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input cs,
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input [1:0] addr,
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output logic [7:0] data_out,
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output logic [7:0] led,
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input [7:0] sw
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);
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assign data_out = sw;
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always_ff @(posedge clk) begin
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if (rst)
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led = '0;
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if (~rw & cs)
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led <= data_in;
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end
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endmodule
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