eth: Rename gearbox start signals to sync

Signed-off-by: Alex Forencich <alex@alexforencich.com>
This commit is contained in:
Alex Forencich
2025-06-12 15:45:07 -07:00
parent ca3ee2d197
commit 4e66dd0f98
33 changed files with 137 additions and 137 deletions

View File

@@ -287,9 +287,9 @@ wire [DATA_W-1:0] serdes_tx_data;
wire serdes_tx_data_valid;
wire [HDR_W-1:0] serdes_tx_hdr;
wire serdes_tx_hdr_valid;
wire serdes_tx_gbx_req_start;
wire serdes_tx_gbx_req_sync;
wire serdes_tx_gbx_req_stall;
wire serdes_tx_gbx_start;
wire serdes_tx_gbx_sync;
wire [DATA_W-1:0] serdes_rx_data;
wire serdes_rx_data_valid;
wire [HDR_W-1:0] serdes_rx_hdr;
@@ -395,9 +395,9 @@ if (CFG_LOW_LATENCY) begin : gt
.serdes_tx_data_valid(serdes_tx_data_valid),
.serdes_tx_hdr(serdes_tx_hdr),
.serdes_tx_hdr_valid(serdes_tx_hdr_valid),
.serdes_tx_gbx_req_start(serdes_tx_gbx_req_start),
.serdes_tx_gbx_req_sync(serdes_tx_gbx_req_sync),
.serdes_tx_gbx_req_stall(serdes_tx_gbx_req_stall),
.serdes_tx_gbx_start(serdes_tx_gbx_start),
.serdes_tx_gbx_sync(serdes_tx_gbx_sync),
.serdes_rx_data(serdes_rx_data),
.serdes_rx_data_valid(serdes_rx_data_valid),
.serdes_rx_hdr(serdes_rx_hdr),
@@ -504,9 +504,9 @@ end else begin : gt
.serdes_tx_data_valid(serdes_tx_data_valid),
.serdes_tx_hdr(serdes_tx_hdr),
.serdes_tx_hdr_valid(serdes_tx_hdr_valid),
.serdes_tx_gbx_req_start(serdes_tx_gbx_req_start),
.serdes_tx_gbx_req_sync(serdes_tx_gbx_req_sync),
.serdes_tx_gbx_req_stall(serdes_tx_gbx_req_stall),
.serdes_tx_gbx_start(serdes_tx_gbx_start),
.serdes_tx_gbx_sync(serdes_tx_gbx_sync),
.serdes_rx_data(serdes_rx_data),
.serdes_rx_data_valid(serdes_rx_data_valid),
.serdes_rx_hdr(serdes_rx_hdr),
@@ -569,9 +569,9 @@ eth_mac_phy_10g_inst (
.serdes_tx_data_valid(serdes_tx_data_valid),
.serdes_tx_hdr(serdes_tx_hdr),
.serdes_tx_hdr_valid(serdes_tx_hdr_valid),
.serdes_tx_gbx_req_start(serdes_tx_gbx_req_start),
.serdes_tx_gbx_req_sync(serdes_tx_gbx_req_sync),
.serdes_tx_gbx_req_stall(serdes_tx_gbx_req_stall),
.serdes_tx_gbx_start(serdes_tx_gbx_start),
.serdes_tx_gbx_sync(serdes_tx_gbx_sync),
.serdes_rx_data(serdes_rx_data),
.serdes_rx_data_valid(serdes_rx_data_valid),
.serdes_rx_hdr(serdes_rx_hdr),

View File

@@ -113,9 +113,9 @@ module taxi_eth_phy_25g_us_gt #
input wire logic serdes_tx_data_valid,
input wire logic [HDR_W-1:0] serdes_tx_hdr,
input wire logic serdes_tx_hdr_valid,
output wire logic serdes_tx_gbx_req_start,
output wire logic serdes_tx_gbx_req_sync,
output wire logic serdes_tx_gbx_req_stall,
input wire logic serdes_tx_gbx_start,
input wire logic serdes_tx_gbx_sync,
output wire logic [DATA_W-1:0] serdes_rx_data,
output wire logic serdes_rx_data_valid,
output wire logic [HDR_W-1:0] serdes_rx_hdr,
@@ -370,7 +370,7 @@ if (!SIM) begin
assign serdes_rx_hdr_valid = gt_rxheadervalid[0];
end
assign serdes_tx_gbx_req_start = 1'b0;
assign serdes_tx_gbx_req_sync = 1'b0;
assign serdes_tx_gbx_req_stall = 1'b0;
if (SIM) begin : xcvr

View File

@@ -113,9 +113,9 @@ module taxi_eth_phy_25g_us_gt_ll #
input wire logic serdes_tx_data_valid,
input wire logic [HDR_W-1:0] serdes_tx_hdr,
input wire logic serdes_tx_hdr_valid,
output wire logic serdes_tx_gbx_req_start,
output wire logic serdes_tx_gbx_req_sync,
output wire logic serdes_tx_gbx_req_stall,
input wire logic serdes_tx_gbx_start,
input wire logic serdes_tx_gbx_sync,
output wire logic [DATA_W-1:0] serdes_rx_data,
output wire logic serdes_rx_data_valid,
output wire logic [HDR_W-1:0] serdes_rx_hdr,
@@ -376,20 +376,20 @@ if (GT_TYPE == "GTY") begin : tx_seq
// Generate gearbox request signals
logic [6:0] tx_seq_gen_reg = '0;
logic tx_req_start_reg = 1'b0;
logic tx_req_sync_reg = 1'b0;
logic tx_req_stall_reg = 1'b0;
assign serdes_tx_gbx_req_start = tx_req_start_reg;
assign serdes_tx_gbx_req_sync = tx_req_sync_reg;
assign serdes_tx_gbx_req_stall = tx_req_stall_reg;
always @(posedge tx_clk) begin
tx_req_start_reg <= 1'b0;
tx_req_sync_reg <= 1'b0;
tx_req_stall_reg <= 1'b0;
tx_seq_gen_reg <= tx_seq_gen_reg - 1;
if (tx_seq_gen_reg == 0) begin
tx_seq_gen_reg <= 65;
tx_req_start_reg <= 1'b1;
tx_req_sync_reg <= 1'b1;
end
if (tx_seq_gen_reg == 2 || tx_seq_gen_reg == 1) begin
tx_req_stall_reg <= 1'b1;
@@ -406,7 +406,7 @@ if (GT_TYPE == "GTY") begin : tx_seq
if (tx_seq_reg == 65) begin
tx_seq_reg <= '0;
end
if (serdes_tx_gbx_start) begin
if (serdes_tx_gbx_sync) begin
tx_seq_reg <= 1;
end
end
@@ -417,20 +417,20 @@ end else begin : tx_seq
// Generate gearbox request signals
logic [5:0] tx_seq_gen_reg = '0;
logic tx_req_start_reg = 1'b0;
logic tx_req_sync_reg = 1'b0;
logic tx_req_stall_reg = 1'b0;
assign serdes_tx_gbx_req_start = tx_req_start_reg;
assign serdes_tx_gbx_req_sync = tx_req_sync_reg;
assign serdes_tx_gbx_req_stall = tx_req_stall_reg;
always @(posedge tx_clk) begin
tx_req_start_reg <= 1'b0;
tx_req_sync_reg <= 1'b0;
tx_req_stall_reg <= 1'b0;
tx_seq_gen_reg <= tx_seq_gen_reg - 1;
if (tx_seq_gen_reg == 0) begin
tx_seq_gen_reg <= 32;
tx_req_start_reg <= 1'b1;
tx_req_sync_reg <= 1'b1;
end
if (tx_seq_gen_reg == 1) begin
tx_req_stall_reg <= 1'b1;
@@ -447,7 +447,7 @@ end else begin : tx_seq
if (tx_seq_reg == 32) begin
tx_seq_reg <= '0;
end
if (serdes_tx_gbx_start) begin
if (serdes_tx_gbx_sync) begin
tx_seq_reg <= 1;
end
end