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eth: Clean up masking, lane 0 never needs to be masked

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Signed-off-by: Alex Forencich <alex@alexforencich.com>
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Alex Forencich
2025-10-04 20:06:58 -07:00
parent 93ef0f970b
commit caeacadb78
6 changed files with 22 additions and 17 deletions
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15
src/eth/rtl/taxi_axis_xgmii_rx_32.sv
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@@ -222,6 +222,15 @@ eth_crc (
.state_out(crc_state_next)
);
// Mask input data
wire [DATA_W-1:0] xgmii_rxd_masked;
wire [CTRL_W-1:0] xgmii_term;
for (genvar n = 0; n < CTRL_W; n = n + 1) begin
assign xgmii_rxd_masked[n*8 +: 8] = (n > 0 && xgmii_rxc[n]) ? 8'd0 : xgmii_rxd[n*8 +: 8];
assign xgmii_term[n] = xgmii_rxc[n] && (xgmii_rxd[n*8 +: 8] == XGMII_TERM);
end
always_comb begin
state_next = STATE_IDLE;
@@ -529,7 +538,7 @@ always_ff @(posedge clk) begin
framing_error_reg <= xgmii_rxc != 0;
for (integer i = CTRL_W-1; i >= 0; i = i - 1) begin
if (xgmii_rxc[i] && (xgmii_rxd[i*8 +: 8] == XGMII_TERM)) begin
if (xgmii_term[i]) begin
term_present_reg <= 1'b1;
term_first_cycle_reg <= i == 0;
term_lane_reg <= 2'(i);
@@ -547,10 +556,8 @@ always_ff @(posedge clk) begin
crc_valid_save <= crc_valid;
for (integer i = 0; i < CTRL_W; i = i + 1) begin
xgmii_rxd_d0[i*8 +: 8] <= xgmii_rxc[i] ? 8'd0 : xgmii_rxd[i*8 +: 8];
end
xgmii_rxc_d0 <= xgmii_rxc;
xgmii_rxd_d0 <= xgmii_rxd_masked;
xgmii_rxd_d1 <= xgmii_rxd_d0;
xgmii_rxd_d2 <= xgmii_rxd_d1;