eth: Add I2C to KCU105 example design

Signed-off-by: Alex Forencich <alex@alexforencich.com>

src/eth/example/KCU105/fpga/fpga.xdc

@@ -121,14 +121,14 @@ set_false_path -from [get_ports {uart_rxd uart_rts}]
 set_input_delay 0 [get_ports {uart_rxd uart_rts}]
 
 # I2C interface
-#set_property -dict {LOC J24  IOSTANDARD LVCMOS18 SLEW SLOW DRIVE 8} [get_ports i2c_scl]
+set_property -dict {LOC J24  IOSTANDARD LVCMOS18 SLEW SLOW DRIVE 8} [get_ports i2c_scl]
-#set_property -dict {LOC J25  IOSTANDARD LVCMOS18 SLEW SLOW DRIVE 8} [get_ports i2c_sda]
+set_property -dict {LOC J25  IOSTANDARD LVCMOS18 SLEW SLOW DRIVE 8} [get_ports i2c_sda]
-#set_property -dict {LOC AP10 IOSTANDARD LVCMOS18 SLEW SLOW DRIVE 8} [get_ports i2c_mux_reset]
+set_property -dict {LOC AP10 IOSTANDARD LVCMOS18 SLEW SLOW DRIVE 8} [get_ports i2c_mux_reset]
 
-#set_false_path -to [get_ports {i2c_sda i2c_scl}]
+set_false_path -to [get_ports {i2c_sda i2c_scl}]
-#set_output_delay 0 [get_ports {i2c_sda i2c_scl}]
+set_output_delay 0 [get_ports {i2c_sda i2c_scl}]
-#set_false_path -from [get_ports {i2c_sda i2c_scl}]
+set_false_path -from [get_ports {i2c_sda i2c_scl}]
-#set_input_delay 0 [get_ports {i2c_sda i2c_scl}]
+set_input_delay 0 [get_ports {i2c_sda i2c_scl}]
 
 # Gigabit Ethernet SGMII PHY
 set_property -dict {LOC P24  IOSTANDARD DIFF_HSTL_I_18} [get_ports phy_sgmii_rx_p]

src/eth/example/KCU105/fpga/fpga_10g/Makefile

@@ -22,6 +22,7 @@ SYN_FILES += $(TAXI_SRC_DIR)/eth/rtl/taxi_eth_mac_1g_fifo.f
 SYN_FILES += $(TAXI_SRC_DIR)/eth/rtl/us/taxi_eth_mac_25g_us.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_if_uart.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_switch.sv
+SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_i2c_master.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
 SYN_FILES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_reset.sv
 SYN_FILES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_signal.sv

src/eth/example/KCU105/fpga/fpga_1g/Makefile

@@ -21,6 +21,7 @@ SYN_FILES += $(RTL_DIR)/fpga_core.sv
 SYN_FILES += $(TAXI_SRC_DIR)/eth/rtl/taxi_eth_mac_1g_fifo.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_if_uart.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_switch.sv
+SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_i2c_master.f
 SYN_FILES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
 SYN_FILES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_reset.sv
 SYN_FILES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_signal.sv

src/eth/example/KCU105/fpga/rtl/fpga.sv

@@ -54,6 +54,13 @@ module fpga #
     input  wire logic        uart_rts,
     output wire logic        uart_cts,
 
+    /*
+     * I2C
+     */
+    inout  wire logic        i2c_scl,
+    inout  wire logic        i2c_sda,
+    output wire logic        i2c_mux_reset,
+
     /*
      * Ethernet: 1000BASE-T SGMII
      */
@@ -98,12 +105,12 @@ wire mmcm_clkfb;
 
 IBUFGDS #(
    .DIFF_TERM("FALSE"),
-   .IBUF_LOW_PWR("FALSE")   
+   .IBUF_LOW_PWR("FALSE")
 )
 clk_125mhz_ibufg_inst (
    .O   (clk_125mhz_ibufg),
    .I   (clk_125mhz_p),
-   .IB  (clk_125mhz_n) 
+   .IB  (clk_125mhz_n)
 );
 
 // MMCM instance
@@ -250,6 +257,17 @@ sync_signal_inst (
 
 wire [7:0] led_int;
 
+// I2C
+wire i2c_scl_i;
+wire i2c_scl_o;
+wire i2c_sda_i;
+wire i2c_sda_o;
+
+assign i2c_scl_i = i2c_scl;
+assign i2c_scl = i2c_scl_o ? 1'bz : 1'b0;
+assign i2c_sda_i = i2c_sda;
+assign i2c_sda = i2c_sda_o ? 1'bz : 1'b0;
+
 // SGMII interface to PHY
 wire phy_gmii_clk_int;
 wire phy_gmii_rst_int;
@@ -573,6 +591,14 @@ core_inst (
     .uart_rts(uart_rts_int),
     .uart_cts(uart_cts),
 
+    /*
+     * I2C
+     */
+    .i2c_scl_i(i2c_scl_i),
+    .i2c_scl_o(i2c_scl_o),
+    .i2c_sda_i(i2c_sda_i),
+    .i2c_sda_o(i2c_sda_o),
+
     /*
      * Ethernet: 1000BASE-T SGMII
      */

src/eth/example/KCU105/fpga/rtl/fpga_core.sv

@@ -53,6 +53,14 @@ module fpga_core #
     input  wire logic        uart_rts,
     output wire logic        uart_cts,
 
+    /*
+     * I2C
+     */
+    input  wire logic        i2c_scl_i,
+    output wire logic        i2c_scl_o,
+    input  wire logic        i2c_sda_i,
+    output wire logic        i2c_sda_o,
+
     /*
      * Ethernet: 1000BASE-T
      */
@@ -134,7 +142,7 @@ xfcp_if_uart_inst (
     .prescale(16'(125000000/921600))
 );
 
-taxi_axis_if #(.DATA_W(8), .USER_EN(1), .USER_W(1)) xfcp_sw_ds[1](), xfcp_sw_us[1]();
+taxi_axis_if #(.DATA_W(8), .USER_EN(1), .USER_W(1)) xfcp_sw_ds[2](), xfcp_sw_us[2]();
 
 taxi_xfcp_switch #(
     .XFCP_ID_STR("KCU105"),
@@ -207,6 +215,30 @@ stat_mux_inst (
     .m_axis(axis_stat)
 );
 
+// I2C
+taxi_xfcp_mod_i2c_master #(
+    .XFCP_EXT_ID_STR("I2C"),
+    .DEFAULT_PRESCALE(16'(125000000/200000/4))
+)
+xfcp_mod_i2c_inst (
+    .clk(clk),
+    .rst(rst),
+
+    /*
+     * XFCP upstream port
+     */
+    .xfcp_usp_ds(xfcp_sw_ds[1]),
+    .xfcp_usp_us(xfcp_sw_us[1]),
+
+    /*
+     * I2C interface
+     */
+    .i2c_scl_i(i2c_scl_i),
+    .i2c_scl_o(i2c_scl_o),
+    .i2c_sda_i(i2c_sda_i),
+    .i2c_sda_o(i2c_sda_o)
+);
+
 // BASE-T PHY
 assign phy_reset_n = !rst;
 

src/eth/example/KCU105/fpga/tb/fpga_core/Makefile

@@ -27,6 +27,7 @@ VERILOG_SOURCES += $(TAXI_SRC_DIR)/eth/rtl/taxi_eth_mac_1g_fifo.f
 VERILOG_SOURCES += $(TAXI_SRC_DIR)/eth/rtl/us/taxi_eth_mac_25g_us.f
 VERILOG_SOURCES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_if_uart.f
 VERILOG_SOURCES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_switch.sv
+VERILOG_SOURCES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_i2c_master.f
 VERILOG_SOURCES += $(TAXI_SRC_DIR)/xfcp/rtl/taxi_xfcp_mod_stats.f
 VERILOG_SOURCES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_reset.sv
 VERILOG_SOURCES += $(TAXI_SRC_DIR)/sync/rtl/taxi_sync_signal.sv

src/eth/example/KCU105/fpga/tb/fpga_core/test_fpga_core.py

@@ -290,6 +290,7 @@ def test_fpga_core(request, sfp_rate):
         os.path.join(taxi_src_dir, "eth", "rtl", "us", "taxi_eth_mac_25g_us.f"),
         os.path.join(taxi_src_dir, "xfcp", "rtl", "taxi_xfcp_if_uart.f"),
         os.path.join(taxi_src_dir, "xfcp", "rtl", "taxi_xfcp_switch.sv"),
+        os.path.join(taxi_src_dir, "xfcp", "rtl", "taxi_xfcp_mod_i2c_master.f"),
         os.path.join(taxi_src_dir, "xfcp", "rtl", "taxi_xfcp_mod_stats.f"),
         os.path.join(taxi_src_dir, "sync", "rtl", "taxi_sync_reset.sv"),
         os.path.join(taxi_src_dir, "sync", "rtl", "taxi_sync_signal.sv"),