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example/HTG940: Add XFCP to HTG940 example design for monitoring and control

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Signed-off-by: Alex Forencich <alex@alexforencich.com>
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Alex Forencich
2025-04-09 18:45:55 -07:00
parent 7895a01c4f
commit f2b5ea5c0b
6 changed files with 86 additions and 59 deletions
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example/HTG940/fpga/README.md
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@@ -4,10 +4,10 @@
This example design targets the HiTech Global HTG-940 FPGA board.
The design places a looped-back MAC on the BASE-T port, as well as a looped-back UART on on the USB UART connection.
The design places a looped-back MAC on the BASE-T port, as well as XFCP on the USB UART for monitoring and control.
* USB UART
* Looped-back UART
* XFCP (921600 baud)
* RJ-45 Ethernet ports with TI DP83867IRPAP PHY
* Looped-back MAC via RGMII
@@ -32,6 +32,4 @@ Run `make` in the appropriate `fpga*` subdirectory to build the bitstream. Ensu
Run `make program` to program the board with Vivado.
To test the looped-back UART, use any serial terminal software like minicom, screen, etc. The looped-back UART will echo typed text back without modification.
To test the looped-back MAC, it is recommended to use a network tester like the Viavi T-BERD 5800 that supports basic layer 2 tests with a loopback. Do not connect the looped-back MAC to a network as the reflected packets may cause problems.