Commit Graph

10 Commits

Author SHA1 Message Date
Alex Forencich
af9696eb06 apb: Add APB width converter module and testbench
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2025-11-12 23:05:12 -08:00
Alex Forencich
8e3de66295 apb: Fix parameter name
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2025-11-12 22:07:04 -08:00
Alex Forencich
bfafd5777e apb: Clean up address width handling in interconnect module
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2025-11-12 22:02:42 -08:00
Alex Forencich
f472fda1e4 apb: Fix interface indexing
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2025-11-12 21:42:39 -08:00
Alex Forencich
18794f33c9 apb: Add APB interconnect module and testbench
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2025-11-12 17:04:07 -08:00
Alex Forencich
952232ad66 apb: Add APB dual-port RAM module and testbench
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2025-09-30 15:25:21 -07:00
Alex Forencich
f25e41de18 apb: Add APB RAM module and testbench
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2025-09-30 15:24:56 -07:00
Alex Forencich
f4f473afeb apb: Add user sideband signals to APB interface
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2025-09-30 15:19:07 -07:00
Alex Forencich
884fe1a006 apb: Add lib symlink
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2025-09-06 16:50:44 -07:00
Alex Forencich
81a918d223 apb: Add SV interface for APB
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2025-09-06 16:50:38 -07:00