Commit Graph

14 Commits

Author SHA1 Message Date
Alex Forencich
5f814e7da8 Clean up always blocks
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2025-11-07 01:51:18 -08:00
Alex Forencich
40908b1b92 Testbench cleanup for cocotb 2.0
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2025-09-07 10:59:38 -07:00
Alex Forencich
a8dbe26f12 zircon: tdest not used on TX path after length/checksum computation, which also extracts the tdest value
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2025-08-15 13:36:14 -07:00
Alex Forencich
3a07e3e28c zircon: Improve sideband signal handling in length/checksum computation module
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2025-08-15 13:34:15 -07:00
Alex Forencich
d0efd5f24c zircon: Connect tdest
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2025-08-14 14:11:55 -07:00
Alex Forencich
9955b79fcd zircon: Add FIFO configuration parameters
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2025-08-13 17:17:34 -07:00
Alex Forencich
af8daa89ce zircon: Fix flow control bug in parser
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2025-08-13 13:44:49 -07:00
Alex Forencich
0aad8ef2cc zircon: Fix testbench
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2025-08-06 15:33:05 -07:00
Alex Forencich
e5ce27cc30 zircon: Add lib symlink
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2025-08-06 15:13:47 -07:00
Alex Forencich
67bfb947f4 zircon: Add TX buffer module
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2025-08-06 15:09:04 -07:00
Alex Forencich
18fdf53d5d zircon: Add ingress and egress modules
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2025-08-06 15:08:40 -07:00
Alex Forencich
48465423fb zircon: Add length and checksum computation module and testbench
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2025-08-06 15:06:12 -07:00
Alex Forencich
7c1f2652b6 zircon: Add TX deparser module and testbench
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2025-08-06 14:57:14 -07:00
Alex Forencich
babce69bd0 zircon: Add RX parser module and testbench
Signed-off-by: Alex Forencich <alex@alexforencich.com>
2025-08-06 14:49:22 -07:00