Alex Forencich 77313e1ed0 eth: Add example design for Alibaba AS02MC04 ...

Signed-off-by: Alex Forencich <alex@alexforencich.com>

2025-11-05 14:35:33 -08:00

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apb

apb: Add APB dual-port RAM module and testbench

2025-09-30 15:25:21 -07:00

axi

axi: Tie off ruser/buser in AXI lite RAM modules

2025-09-30 16:30:32 -07:00

axis

axis: Remove extraneous generate block in async FIFO

2025-10-02 23:36:25 -07:00

dma

dma: Remove unnecessary handshake condition

2025-11-04 17:45:54 -08:00

eth

eth: Add example design for Alibaba AS02MC04

2025-11-05 14:35:33 -08:00

hip/rtl/us

eth: Add reset logic, QPLL control signals, and additional configuration parameters for US/US+ GTH/GTY transceivers

2025-05-21 21:06:45 -07:00

io/rtl

Reorganize repository

2025-05-18 12:25:59 -07:00

lfsr

lfsr: Remove extraneous data mask init

2025-10-03 22:08:57 -07:00

lss

lss: Use cocotb.start_soon instead of cocotb.fork

2025-09-07 14:36:27 -07:00

math

math: Add MT19937 Mersenne Twister PRNG module and testbench

2025-10-15 22:14:21 -07:00

pcie

pcie: Clean up casts

2025-09-07 15:17:46 -07:00

prim

Reorganize repository

2025-05-18 12:25:59 -07:00

ptp

Cast to int instead of using .integer

2025-09-07 11:25:34 -07:00

stats

stats: Clean up casts

2025-09-07 14:58:16 -07:00

sync

Reorganize repository

2025-05-18 12:25:59 -07:00

xfcp

xfcp: Add XFCP module for APB

2025-09-30 21:01:17 -07:00

zircon

Testbench cleanup for cocotb 2.0

2025-09-07 10:59:38 -07:00