Alex Forencich c6eac348f6 eth: Update HTG-9200 example design to use 32-bit MACs at 10G ...

Signed-off-by: Alex Forencich <alex@alexforencich.com>

2025-11-06 00:49:50 -08:00

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example

eth: Update HTG-9200 example design to use 32-bit MACs at 10G

2025-11-06 00:49:50 -08:00

lib

Reorganize repository

2025-05-18 12:25:59 -07:00

rtl

eth: Push CRC computation logic towards input in 64-bit BASE-R RX module

2025-10-05 19:34:27 -07:00

syn/vivado

Reorganize repository

2025-05-18 12:25:59 -07:00

tb

eth: Convert UltraScale wrapper to use unpacked arrays for channels

2025-10-02 16:10:37 -07:00