Alex Forencich d5385da0aa eth: Modularize VCU118 constraint files ...

Signed-off-by: Alex Forencich <alex@alexforencich.com>

2026-04-16 13:34:05 -07:00

..

apb

apb: Update APB interconnect to support arbitration between multiple upstream devices

2026-03-19 22:05:27 -07:00

axi

axi: Clean up user signal width handling in AXI RAM IF modules

2026-03-20 00:06:23 -07:00

axis

axis: Add TID_ROUTE parameter to taxi_axis_demux to faciliate routing replies by TID

2026-03-03 16:14:32 -08:00

cndm

cndm: Modularize VCU118 constraint files

2026-04-16 13:33:45 -07:00

cndm_proto

cndm_proto: Modularize AS02MC04 constraint files

2026-04-08 21:47:23 -07:00

dma

dma: Clean up array init

2026-03-08 14:41:24 -07:00

eth

eth: Modularize VCU118 constraint files

2026-04-16 13:34:05 -07:00

hip/rtl/us

hip: Use SV enums in transceiver support logic

2026-02-27 15:45:22 -08:00

io/rtl

Clean up always blocks

2025-11-07 01:51:18 -08:00

lfsr

Use logic instead of reg

2025-11-07 02:14:19 -08:00

lss

lss: Add tBUF setting to I2C master to insert bus idle time before starts and repeated starts

2026-03-18 12:30:11 -07:00

math

math: Add MT19937 Mersenne Twister PRNG module and testbench

2025-10-15 22:14:21 -07:00

pcie

pcie: Remove extra APB idle cycles

2026-03-12 16:57:22 -07:00

prim

prim: Fix single-clock TDP RAM inference

2026-03-01 20:43:13 -08:00

ptp

ptp: Remove extra APB idle cycles

2026-03-12 16:57:34 -07:00

pyrite

pyrite: Use APB 1S interconnect

2026-03-19 19:15:14 -07:00

stats

stats: Clean up array init

2026-03-08 14:43:31 -07:00

sync

Reorganize repository

2025-05-18 12:25:59 -07:00

xfcp

xfcp: Fix APB implementation

2026-03-13 01:23:31 -07:00

zircon

zircon: Reorganize metadata for better rules engine interface

2026-04-07 15:47:43 -07:00