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Use logic instead of reg

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Signed-off-by: Alex Forencich <alex@alexforencich.com>
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Alex Forencich
2025-11-07 02:14:19 -08:00
parent 5f814e7da8
commit 004246608e
25 changed files with 265 additions and 265 deletions
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24
src/dma/rtl/taxi_dma_client_axis_sink.sv
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@@ -484,27 +484,27 @@ end
// output datapath logic (write data)
for (genvar n = 0; n < RAM_SEGS; n = n + 1) begin
reg [RAM_SEG_BE_W-1:0] ram_wr_cmd_be_reg = '0;
reg [RAM_SEG_ADDR_W-1:0] ram_wr_cmd_addr_reg = '0;
reg [RAM_SEG_DATA_W-1:0] ram_wr_cmd_data_reg = '0;
reg ram_wr_cmd_valid_reg = 1'b0;
logic [RAM_SEG_BE_W-1:0] ram_wr_cmd_be_reg = '0;
logic [RAM_SEG_ADDR_W-1:0] ram_wr_cmd_addr_reg = '0;
logic [RAM_SEG_DATA_W-1:0] ram_wr_cmd_data_reg = '0;
logic ram_wr_cmd_valid_reg = 1'b0;
reg [OUTPUT_FIFO_AW+1-1:0] out_fifo_wr_ptr_reg = '0;
reg [OUTPUT_FIFO_AW+1-1:0] out_fifo_rd_ptr_reg = '0;
reg out_fifo_half_full_reg = 1'b0;
logic [OUTPUT_FIFO_AW+1-1:0] out_fifo_wr_ptr_reg = '0;
logic [OUTPUT_FIFO_AW+1-1:0] out_fifo_rd_ptr_reg = '0;
logic out_fifo_half_full_reg = 1'b0;
wire out_fifo_full = out_fifo_wr_ptr_reg == (out_fifo_rd_ptr_reg ^ {1'b1, {OUTPUT_FIFO_AW{1'b0}}});
wire out_fifo_empty = out_fifo_wr_ptr_reg == out_fifo_rd_ptr_reg;
(* ram_style = "distributed", ramstyle = "no_rw_check, mlab" *)
reg [RAM_SEG_BE_W-1:0] out_fifo_wr_cmd_be[2**OUTPUT_FIFO_AW];
logic [RAM_SEG_BE_W-1:0] out_fifo_wr_cmd_be[2**OUTPUT_FIFO_AW];
(* ram_style = "distributed", ramstyle = "no_rw_check, mlab" *)
reg [RAM_SEG_ADDR_W-1:0] out_fifo_wr_cmd_addr[2**OUTPUT_FIFO_AW];
logic [RAM_SEG_ADDR_W-1:0] out_fifo_wr_cmd_addr[2**OUTPUT_FIFO_AW];
(* ram_style = "distributed", ramstyle = "no_rw_check, mlab" *)
reg [RAM_SEG_DATA_W-1:0] out_fifo_wr_cmd_data[2**OUTPUT_FIFO_AW];
logic [RAM_SEG_DATA_W-1:0] out_fifo_wr_cmd_data[2**OUTPUT_FIFO_AW];
reg [OUTPUT_FIFO_AW+1-1:0] done_count_reg = 0;
reg done_reg = 1'b0;
logic [OUTPUT_FIFO_AW+1-1:0] done_count_reg = 0;
logic done_reg = 1'b0;
assign ram_wr_cmd_ready_int[n] = !out_fifo_half_full_reg;

2
src/dma/rtl/taxi_dma_if_pcie_us_rd.sv
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@@ -1537,7 +1537,7 @@ always_comb begin
end
end
reg [1:0] active_tx_count_ovf;
logic [1:0] active_tx_count_ovf;
always_comb begin
{active_tx_count_ovf, active_tx_count_next} = $signed({1'b0, active_tx_count_reg}) + $signed({1'b0, inc_active_tx});