From 1112545d0a5a7d8b2d8a2145c23455a342628cf1 Mon Sep 17 00:00:00 2001 From: Alex Forencich Date: Sun, 16 Feb 2025 22:22:43 -0800 Subject: [PATCH] Update readme Signed-off-by: Alex Forencich --- README.md | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/README.md b/README.md index afccd7e..39321fc 100644 --- a/README.md +++ b/README.md @@ -36,6 +36,12 @@ To facilitate the dual-license model, contributions to the project can only be a * Pipeline register * Pipeline FIFO * Ethernet + * 10/100 MII MAC + * 10/100 MII MAC + FIFO + * 10/100/1000 GMII MAC + * 10/100/1000 GMII MAC + FIFO + * 10/100/1000 RGMII MAC + * 10/100/1000 RGMII MAC + FIFO * 1G MAC * 1G MAC + FIFO * 10G MAC @@ -43,6 +49,21 @@ To facilitate the dual-license model, contributions to the project can only be a * 10G MAC/PHY * 10G MAC/PHY + FIFO * 10G PHY + * MII PHY interface + * GMII PHY interface + * RGMII PHY interface +* General input/output + * Switch debouncer + * Generic IDDR + * Generic ODDR + * Source-synchronous DDR input + * Source-synchronous DDR differential input + * Source-synchronous DDR output + * Source-synchronous DDR differential output + * Source-synchronous SDR input + * Source-synchronous SDR differential input + * Source-synchronous SDR output + * Source-synchronous SDR differential output * Linear-feedback shift register * Parametrizable combinatorial LFSR/CRC module * CRC computation module