From 1abe3c936e428bfdbe4817cec867b5dc7f075e1d Mon Sep 17 00:00:00 2001 From: Alex Forencich Date: Sat, 4 Jul 2026 01:01:56 -0700 Subject: [PATCH] eth: Add AN resolution outputs to 1000BASE-X modules Signed-off-by: Alex Forencich --- src/eth/rtl/taxi_eth_mac_phy_1g_basex.sv | 10 +++++++++- src/eth/rtl/taxi_eth_mac_phy_1g_basex_fifo.sv | 8 ++++++++ src/eth/rtl/taxi_eth_phy_1g_basex.sv | 10 +++++++++- src/eth/rtl/taxi_eth_phy_1g_basex_an.sv | 15 ++++++++++++++- src/eth/rtl/us/taxi_eth_mac_1g_basex_us.sv | 8 ++++++++ src/eth/rtl/us/taxi_eth_mac_1g_basex_us_ch.sv | 8 ++++++++ .../test_taxi_eth_mac_1g_basex_us.sv | 8 ++++++++ .../test_taxi_eth_mac_phy_1g_basex.sv | 8 ++++++++ .../test_taxi_eth_mac_phy_1g_basex_fifo.sv | 8 ++++++++ 9 files changed, 80 insertions(+), 3 deletions(-) diff --git a/src/eth/rtl/taxi_eth_mac_phy_1g_basex.sv b/src/eth/rtl/taxi_eth_mac_phy_1g_basex.sv index 35b6eaf..5381b5b 100644 --- a/src/eth/rtl/taxi_eth_mac_phy_1g_basex.sv +++ b/src/eth/rtl/taxi_eth_mac_phy_1g_basex.sv @@ -90,6 +90,10 @@ module taxi_eth_mac_phy_1g_basex # output wire logic an_timeout, input wire logic [15:0] an_adv_ability = 16'h0020, output wire logic [15:0] an_lp_adv_ability, + output wire logic [1:0] an_lp_remote_fault, + output wire logic an_res_full_duplex, + output wire logic an_res_tx_pause, + output wire logic an_res_rx_pause, /* * PTP @@ -443,7 +447,11 @@ if (AN_EN) begin : an .an_complete(an_complete), .an_timeout(an_timeout), .an_adv_ability(an_adv_ability), - .an_lp_adv_ability(an_lp_adv_ability) + .an_lp_adv_ability(an_lp_adv_ability), + .an_lp_remote_fault(an_lp_remote_fault), + .an_res_full_duplex(an_res_full_duplex), + .an_res_tx_pause(an_res_tx_pause), + .an_res_rx_pause(an_res_rx_pause) ); end else begin : an diff --git a/src/eth/rtl/taxi_eth_mac_phy_1g_basex_fifo.sv b/src/eth/rtl/taxi_eth_mac_phy_1g_basex_fifo.sv index 40bf763..323e263 100644 --- a/src/eth/rtl/taxi_eth_mac_phy_1g_basex_fifo.sv +++ b/src/eth/rtl/taxi_eth_mac_phy_1g_basex_fifo.sv @@ -103,6 +103,10 @@ module taxi_eth_mac_phy_1g_basex_fifo # output wire logic an_timeout, input wire logic [15:0] an_adv_ability = 16'h0020, output wire logic [15:0] an_lp_adv_ability, + output wire logic [1:0] an_lp_remote_fault, + output wire logic an_res_full_duplex, + output wire logic an_res_tx_pause, + output wire logic an_res_rx_pause, /* * PTP clock @@ -379,6 +383,10 @@ mac_phy_inst ( .an_timeout(an_timeout), .an_adv_ability(an_adv_ability), .an_lp_adv_ability(an_lp_adv_ability), + .an_lp_remote_fault(an_lp_remote_fault), + .an_res_full_duplex(an_res_full_duplex), + .an_res_tx_pause(an_res_tx_pause), + .an_res_rx_pause(an_res_rx_pause), /* * PTP diff --git a/src/eth/rtl/taxi_eth_phy_1g_basex.sv b/src/eth/rtl/taxi_eth_phy_1g_basex.sv index fa65bfb..dffe0b0 100644 --- a/src/eth/rtl/taxi_eth_phy_1g_basex.sv +++ b/src/eth/rtl/taxi_eth_phy_1g_basex.sv @@ -80,6 +80,10 @@ module taxi_eth_phy_1g_basex # output wire logic an_timeout, input wire logic [15:0] an_adv_ability = 16'h0020, output wire logic [15:0] an_lp_adv_ability, + output wire logic [1:0] an_lp_remote_fault, + output wire logic an_res_full_duplex, + output wire logic an_res_tx_pause, + output wire logic an_res_rx_pause, /* * Status @@ -173,7 +177,11 @@ if (AN_EN) begin : an .an_complete(an_complete), .an_timeout(an_timeout), .an_adv_ability(an_adv_ability), - .an_lp_adv_ability(an_lp_adv_ability) + .an_lp_adv_ability(an_lp_adv_ability), + .an_lp_remote_fault(an_lp_remote_fault), + .an_res_full_duplex(an_res_full_duplex), + .an_res_tx_pause(an_res_tx_pause), + .an_res_rx_pause(an_res_rx_pause) ); end else begin : an diff --git a/src/eth/rtl/taxi_eth_phy_1g_basex_an.sv b/src/eth/rtl/taxi_eth_phy_1g_basex_an.sv index 9382140..06c2c69 100644 --- a/src/eth/rtl/taxi_eth_phy_1g_basex_an.sv +++ b/src/eth/rtl/taxi_eth_phy_1g_basex_an.sv @@ -48,7 +48,11 @@ module taxi_eth_phy_1g_basex_an # output wire logic an_complete, output wire logic an_timeout, input wire logic [15:0] an_adv_ability = 16'h0020, - output wire logic [15:0] an_lp_adv_ability + output wire logic [15:0] an_lp_adv_ability, + output wire logic [1:0] an_lp_remote_fault, + output wire logic an_res_full_duplex, + output wire logic an_res_tx_pause, + output wire logic an_res_rx_pause ); localparam logic [15:0] AN_ACK = 16'h4000; @@ -95,6 +99,15 @@ assign an_complete = an_complete_reg; assign an_timeout = an_timeout_reg; assign an_lp_adv_ability = an_lp_adv_ability_reg; +// extract remote fault bits from link partner ability value +assign an_lp_remote_fault = an_lp_adv_ability_reg[13:12]; +// fall back to half duplex only if both ends support it and at least one end does not support full duplex +assign an_res_full_duplex = !((an_adv_ability[6] && an_lp_adv_ability_reg[6]) && (!an_adv_ability[5] || !an_lp_adv_ability_reg[5])); +// both sides support symmetric pause, or asymmetric pause towards link partner +assign an_res_tx_pause = (an_adv_ability[7] && an_lp_adv_ability_reg[7]) || (an_adv_ability[8:7] == 2'b10 && an_lp_adv_ability_reg[8:7] == 2'b11); +// both sides support symmetric pause, or asymmetric pause towards local device +assign an_res_rx_pause = (an_adv_ability[7] && an_lp_adv_ability_reg[7]) || (an_adv_ability[8:7] == 2'b11 && an_lp_adv_ability_reg[8:7] == 2'b10); + always_comb begin state_next = STATE_START; diff --git a/src/eth/rtl/us/taxi_eth_mac_1g_basex_us.sv b/src/eth/rtl/us/taxi_eth_mac_1g_basex_us.sv index 1e29569..fa96d72 100644 --- a/src/eth/rtl/us/taxi_eth_mac_1g_basex_us.sv +++ b/src/eth/rtl/us/taxi_eth_mac_1g_basex_us.sv @@ -144,6 +144,10 @@ module taxi_eth_mac_1g_basex_us # output wire logic an_timeout[CNT], input wire logic [15:0] an_adv_ability[CNT] = '{CNT{16'h0020}}, output wire logic [15:0] an_lp_adv_ability[CNT], + output wire logic [1:0] an_lp_remote_fault[CNT], + output wire logic an_res_full_duplex[CNT], + output wire logic an_res_tx_pause[CNT], + output wire logic an_res_rx_pause[CNT], /* * PTP clock @@ -542,6 +546,10 @@ for (genvar n = 0; n < CNT; n = n + 1) begin : ch .an_timeout(an_timeout[n]), .an_adv_ability(an_adv_ability[n]), .an_lp_adv_ability(an_lp_adv_ability[n]), + .an_lp_remote_fault(an_lp_remote_fault[n]), + .an_res_full_duplex(an_res_full_duplex[n]), + .an_res_tx_pause(an_res_tx_pause[n]), + .an_res_rx_pause(an_res_rx_pause[n]), /* * PTP clock diff --git a/src/eth/rtl/us/taxi_eth_mac_1g_basex_us_ch.sv b/src/eth/rtl/us/taxi_eth_mac_1g_basex_us_ch.sv index c441865..6107bda 100644 --- a/src/eth/rtl/us/taxi_eth_mac_1g_basex_us_ch.sv +++ b/src/eth/rtl/us/taxi_eth_mac_1g_basex_us_ch.sv @@ -157,6 +157,10 @@ module taxi_eth_mac_1g_basex_us_ch # output wire logic an_timeout, input wire logic [15:0] an_adv_ability = 16'h0020, output wire logic [15:0] an_lp_adv_ability, + output wire logic [1:0] an_lp_remote_fault, + output wire logic an_res_full_duplex, + output wire logic an_res_tx_pause, + output wire logic an_res_rx_pause, /* * PTP clock @@ -637,6 +641,10 @@ if (COMBINED_MAC_PCS) begin : mac .an_timeout(an_timeout), .an_adv_ability(an_adv_ability), .an_lp_adv_ability(an_lp_adv_ability), + .an_lp_remote_fault(an_lp_remote_fault), + .an_res_full_duplex(an_res_full_duplex), + .an_res_tx_pause(an_res_tx_pause), + .an_res_rx_pause(an_res_rx_pause), /* * PTP diff --git a/src/eth/tb/taxi_eth_mac_1g_basex_us/test_taxi_eth_mac_1g_basex_us.sv b/src/eth/tb/taxi_eth_mac_1g_basex_us/test_taxi_eth_mac_1g_basex_us.sv index 4e0d79b..89f3f8b 100644 --- a/src/eth/tb/taxi_eth_mac_1g_basex_us/test_taxi_eth_mac_1g_basex_us.sv +++ b/src/eth/tb/taxi_eth_mac_1g_basex_us/test_taxi_eth_mac_1g_basex_us.sv @@ -122,6 +122,10 @@ logic an_complete[CNT]; logic an_timeout[CNT]; logic [15:0] an_adv_ability[CNT]; logic [15:0] an_lp_adv_ability[CNT]; +logic [1:0] an_lp_remote_fault[CNT]; +logic an_res_full_duplex[CNT]; +logic an_res_tx_pause[CNT]; +logic an_res_rx_pause[CNT]; logic ptp_clk; logic ptp_rst; @@ -366,6 +370,10 @@ uut ( .an_timeout(an_timeout), .an_adv_ability(an_adv_ability), .an_lp_adv_ability(an_lp_adv_ability), + .an_lp_remote_fault(an_lp_remote_fault), + .an_res_full_duplex(an_res_full_duplex), + .an_res_tx_pause(an_res_tx_pause), + .an_res_rx_pause(an_res_rx_pause), /* * PTP diff --git a/src/eth/tb/taxi_eth_mac_phy_1g_basex/test_taxi_eth_mac_phy_1g_basex.sv b/src/eth/tb/taxi_eth_mac_phy_1g_basex/test_taxi_eth_mac_phy_1g_basex.sv index ac0329b..3ce135d 100644 --- a/src/eth/tb/taxi_eth_mac_phy_1g_basex/test_taxi_eth_mac_phy_1g_basex.sv +++ b/src/eth/tb/taxi_eth_mac_phy_1g_basex/test_taxi_eth_mac_phy_1g_basex.sv @@ -84,6 +84,10 @@ logic an_complete; logic an_timeout; logic [15:0] an_adv_ability; logic [15:0] an_lp_adv_ability; +logic [1:0] an_lp_remote_fault; +logic an_res_full_duplex; +logic an_res_tx_pause; +logic an_res_rx_pause; logic ptp_clk; logic ptp_rst; @@ -286,6 +290,10 @@ uut ( .an_timeout(an_timeout), .an_adv_ability(an_adv_ability), .an_lp_adv_ability(an_lp_adv_ability), + .an_lp_remote_fault(an_lp_remote_fault), + .an_res_full_duplex(an_res_full_duplex), + .an_res_tx_pause(an_res_tx_pause), + .an_res_rx_pause(an_res_rx_pause), /* * PTP diff --git a/src/eth/tb/taxi_eth_mac_phy_1g_basex_fifo/test_taxi_eth_mac_phy_1g_basex_fifo.sv b/src/eth/tb/taxi_eth_mac_phy_1g_basex_fifo/test_taxi_eth_mac_phy_1g_basex_fifo.sv index 132c44f..a9f224a 100644 --- a/src/eth/tb/taxi_eth_mac_phy_1g_basex_fifo/test_taxi_eth_mac_phy_1g_basex_fifo.sv +++ b/src/eth/tb/taxi_eth_mac_phy_1g_basex_fifo/test_taxi_eth_mac_phy_1g_basex_fifo.sv @@ -98,6 +98,10 @@ logic an_complete; logic an_timeout; logic [15:0] an_adv_ability; logic [15:0] an_lp_adv_ability; +logic [1:0] an_lp_remote_fault; +logic an_res_full_duplex; +logic an_res_tx_pause; +logic an_res_rx_pause; logic ptp_clk; logic ptp_rst; @@ -228,6 +232,10 @@ uut ( .an_timeout(an_timeout), .an_adv_ability(an_adv_ability), .an_lp_adv_ability(an_lp_adv_ability), + .an_lp_remote_fault(an_lp_remote_fault), + .an_res_full_duplex(an_res_full_duplex), + .an_res_tx_pause(an_res_tx_pause), + .an_res_rx_pause(an_res_rx_pause), /* * PTP clock