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lss: Refactor UART module to split out and share baud rate generation logic

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Signed-off-by: Alex Forencich <alex@alexforencich.com>
This commit is contained in:
Alex Forencich
2025-03-11 23:09:19 -07:00
parent 7df14e54e5
commit 1c686391ab
5 changed files with 172 additions and 91 deletions
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26
rtl/lss/taxi_uart.sv
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@@ -51,6 +51,24 @@ module taxi_uart
);
wire baud_clk;
taxi_uart_brg
uart_brg_inst (
.clk(clk),
.rst(rst),
/*
* Baud rate pulse out
*/
.baud_clk(baud_clk),
/*
* Configuration
*/
.prescale(prescale)
);
taxi_uart_tx
uart_tx_inst (
.clk(clk),
@@ -72,9 +90,9 @@ uart_tx_inst (
.busy(tx_busy),
/*
* Configuration
* Baud rate pulse in
*/
.prescale(prescale)
.baud_clk(baud_clk)
);
taxi_uart_rx
@@ -100,9 +118,9 @@ uart_rx_inst (
.frame_error(rx_frame_error),
/*
* Configuration
* Baud rate pulse in
*/
.prescale(prescale)
.baud_clk(baud_clk)
);
endmodule