diff --git a/src/cndm/board/KCU105/fpga/fpga.xdc b/src/cndm/board/KCU105/fpga/fpga.xdc
index 851bdf9..0ce5a0e 100644
--- a/src/cndm/board/KCU105/fpga/fpga.xdc
+++ b/src/cndm/board/KCU105/fpga/fpga.xdc
@@ -45,6 +45,10 @@ create_clock -period 8.000 -name clk_125mhz [get_ports clk_125mhz_p]
 #set_property -dict {LOC C23 IOSTANDARD LVDS} [get_ports clk_user_sma_n] ;# J35
 #create_clock -period 10.000 -name clk_user_sma [get_ports clk_user_sma_p]
 
+# User SMA GPIO J36/J37
+#set_property -dict {LOC H27 IOSTANDARD LVDS} [get_ports user_sma_gpio_p] ;# J36
+#set_property -dict {LOC G27 IOSTANDARD LVDS} [get_ports user_sma_gpio_n] ;# J37
+
 # LEDs
 set_property -dict {LOC AP8  IOSTANDARD LVCMOS18 SLEW SLOW DRIVE 8} [get_ports {led[0]}] ;# to DS7
 set_property -dict {LOC H23  IOSTANDARD LVCMOS18 SLEW SLOW DRIVE 8} [get_ports {led[1]}] ;# to DS6
@@ -172,7 +176,9 @@ set_property -dict {LOC P5  } [get_ports sfp_mgt_refclk_0_n] ;# MGTREFCLK0N_227
 #set_property -dict {LOC AH11 IOSTANDARD LVDS} [get_ports sfp_recclk_n] ;# to U57 CKIN1 SI5328
 
 set_property -dict {LOC AL8  IOSTANDARD LVCMOS18 SLEW SLOW DRIVE 8} [get_ports {sfp_tx_disable_b[0]}]
+set_property -dict {LOC K21  IOSTANDARD LVCMOS18} [get_ports {sfp_rx_los[0]}]
 set_property -dict {LOC D28  IOSTANDARD LVCMOS18 SLEW SLOW DRIVE 8} [get_ports {sfp_tx_disable_b[1]}]
+set_property -dict {LOC AM9  IOSTANDARD LVCMOS18} [get_ports {sfp_rx_los[1]}]
 
 # 156.25 MHz MGT reference clock
 create_clock -period 6.400 -name sfp_mgt_refclk_0 [get_ports sfp_mgt_refclk_0_p]
diff --git a/src/cndm/board/KCU105/fpga/rtl/fpga.sv b/src/cndm/board/KCU105/fpga/rtl/fpga.sv
index 13c84ac..eb13263 100644
--- a/src/cndm/board/KCU105/fpga/rtl/fpga.sv
+++ b/src/cndm/board/KCU105/fpga/rtl/fpga.sv
@@ -104,6 +104,7 @@ module fpga #
     input  wire logic        sfp_mgt_refclk_0_n,
 
     output wire logic [1:0]  sfp_tx_disable_b,
+    input  wire logic [1:0]  sfp_rx_los,
 
     /*
      * PCIe
@@ -996,6 +997,7 @@ core_inst (
     .sfp_mgt_refclk_0_n(sfp_mgt_refclk_0_n),
 
     .sfp_tx_disable_b(sfp_tx_disable_b),
+    .sfp_rx_los(sfp_rx_los),
 
     /*
      * PCIe
diff --git a/src/cndm/board/KCU105/fpga/rtl/fpga_core.sv b/src/cndm/board/KCU105/fpga/rtl/fpga_core.sv
index ffcdf7c..a93ff88 100644
--- a/src/cndm/board/KCU105/fpga/rtl/fpga_core.sv
+++ b/src/cndm/board/KCU105/fpga/rtl/fpga_core.sv
@@ -110,6 +110,7 @@ module fpga_core #
     input  wire logic                     sfp_mgt_refclk_0_n,
 
     output wire logic [1:0]               sfp_tx_disable_b,
+    input  wire logic [1:0]               sfp_rx_los,
 
     /*
      * PCIe
diff --git a/src/cndm/board/KCU105/fpga/tb/fpga_core/test_fpga_core.sv b/src/cndm/board/KCU105/fpga/tb/fpga_core/test_fpga_core.sv
index 7494664..812fbb9 100644
--- a/src/cndm/board/KCU105/fpga/tb/fpga_core/test_fpga_core.sv
+++ b/src/cndm/board/KCU105/fpga/tb/fpga_core/test_fpga_core.sv
@@ -94,6 +94,7 @@ logic sfp_mgt_refclk_0_p;
 logic sfp_mgt_refclk_0_n;
 
 logic [1:0] sfp_tx_disable_b;
+logic [1:0] sfp_rx_los;
 
 logic pcie_clk;
 logic pcie_rst;
@@ -281,6 +282,7 @@ uut (
     .sfp_mgt_refclk_0_n(sfp_mgt_refclk_0_n),
 
     .sfp_tx_disable_b(sfp_tx_disable_b),
+    .sfp_rx_los(sfp_rx_los),
 
     /*
      * PCIe